基于51单片机驱动SI4432无线模块收发C语言程序.doc

基于51单片机驱动SI4432无线模块收发C语言程序#include #include #include #include /-RF4432配置口定义-/sbit RF4432_PAC=P24; /收发模式切换控制端sbit RF4432_SDO=P35; /SPI数据输出sbit RF4432_SDI=P34; /SPI数据输入sbit RF4432_SCLK=P37; /SPI时钟输入端口sbit RF4432_SEL=P33; /SPI片选sbit RF4432_IRQ=P32; /SI4432工作状态指示端口sbit KEY=P36; /BLT53A上电控制端sbit LED_GREEN=P21;sbit P15=P15;/-射频芯片相关定义-#define RF4432_TxRxBuf_Len 32 /定义RF4432数据包长度char RF4432_TxRxBufRF4432_TxRxBuf_Len;unsigned char Packet30=9,20,30,21,15,58,56,69,25,23,12,25,56,22,23,24;/Transmit packetunsigned char Length=4;unsigned char Data_Buf10;unsigned char Data_Len;typedef enum _RF_ENUM RF_OK = 0x00, /function response parameters RF_ERROR_TIMING =0x01, RF_ERROR_PARAMETER = 0x02, RF_PACKET_RECEIVED= 0x03, RF_NO_PACKET=0x04, RF_CRC_ERROR = 0x05, RF_ENUM;/-RF4432 配置寄存器地址-#define DEVICE_TYPE 0x00#define EVICE_VERSION0x01 /版本号#define DEVICE_STATUS0x02 /设备状态#define INTERRUPT_STATUS_10x03#define INTERRUPT_STATUS_20x04#define INTERRUPT_ENABLE_1 0x05#define INTERRUPT_ENABLE_2 0x06#define OPERATING_FUNCTION_CONTROL_10x07 /工作模式和功能控制1#define OPERATING_FUNCTION_CONTROL_2 0x08 /工作模式和功能控制2#define CRYSTAL_OSCILLATOR_LOAD_CAPACITANCE0x09 /晶振负载电容设置#define MICROCONTROLLER_OUTPUT_CLOCK 0x0A#define GPIO0_CONFIGURATION 0x0B /GPIO0功能设置寄存器见英文文档第105页#define GPIO1_CONFIGURATION0x0C#define GPIO2_CONFIGURATION 0x0D#define IO_PORT_CONFIGURATION 0x0E#define ADC_CONFIGURATION0x0F#define ADC_SENSOR_AMPLIFIER_OFFSET0x10#define ADC_VALUE 0x11#define TEMPERATURE_SENSOR_CONTROL0x12 /温度传感器校准#define TEMPERATURE_VALUE_OFFSET 0x13#define WAKE_UP_TIMER_PERIOD_10x14#define WAKE_UP_TIMER_PERIOD_20x15#define WAKE_UP_TIMER_PERIOD_30x16#define WAKE_UP_TIMER_VALUE_1 0x17#define WAKE_UP_TIMER_VALUE_2 0x18#define LOW_DUTY_CYCLE_MODE_DURATION 0x19 #define LOW_BATTERY_DETECTOR_THRESHOLD0x1A /低压检测阈值寄存器#define BATTERY_VOLTAGE_LEVEL0x1B#define IF_FILTER_BANDWIDTH 0x1C /中频滤波器带宽寄存器#define AFC_LOOP_GEARSHIFT_OVERRIDE 0x1D#define AFC_TIMING_CONTROL0x1E#define CLOCK_RECOVERY_GEARSHIFT_OVERRIDE0x1F#define CLOCK_RECOVERY_OVERSAMPLING_RATIO 0x20#define CLOCK_RECOVERY_OFFSET_2 0x21#define CLOCK_RECOVERY_OFFSET_10x22#define CLOCK_RECOVERY_OFFSET_0 0x23#define CLOCK_RECOVERY_TIMING_LOOP_GAIN_10x24#define CLOCK_RECOVERY_TIMING_LOOP_GAIN_0 0x25#define RECEIVED_SIGNAL_STRENGTH_INDICATOR 0x26#define RSSI_THRESHOLD_FOR_CLEAR_CHANNEL_INDICATOR 0x27#define ANTENNA_DIVERSITY_REGISTER_1 0x28#define ANTENNA_DIVERSITY_REGISTER_2 0x29#define DATA_ACCESS_CONTROL 0x30#define EZMAC_STATUS 0x31#define HEADER_CONTROL_1 0x32 /Header 起始码设置#define HEADER_CONTROL_2 0x33#define PREAMBLE_LENGTH0x34 /前导码长度#define PREAMBLE_DETECTION_CONTROL0x35 /前导码检测设置#define SYNC_WORD_3 0x36 /同步字节#define SYNC_WORD_2 0x37#define SYNC_WORD_10x38#define SYNC_WORD_0 0x39#define TRANSMIT_HEADER_3 0x3A#define TRANSMIT_HEADER_2 0x3B#define TRANSMIT_HEADER_1 0x3C#define TRANSMIT_HEADER_00x3D#define TRANSMIT_PACKET_LENGTH0x3E /发送数据包长度，详细请看P125页#define CHECK_HEADER_30x3F#define CHECK_HEADER_20x40#define CHECK_HEADER_1 0x41#define CHECK_HEADER_00x42#define HEADER_ENABLE_3 0x43#define HEADER_ENABLE_2 0x44#define HEADER_ENABLE_1 0x45#define HEADER_ENABLE_0 0x46#define RECEIVED_HEADER_3 0x47#define RECEIVED_HEADER_2 0x48#define RECEIVED_HEADER_1 0x49#define RECEIVED_HEADER_0 0x4A#define RECEIVED_PACKET_LENGTH0x4B /接收数据包长度，详细请看P134页#define ANALOG_TEST_BUS0x50#define DIGITAL_TEST_BUS_ENSCTEST_ 0x51#define TX_RAMP_CONTROL0x52#define PLL_TUNE_TIME0x53 /锁相环切换时间#define CALIBRATION_CONTROL0x55#define MODEM_TEST0x56#define CHARGEPUMP_TEST0x57#define CHARGEPUMP_CURRENT_TRIMMING_OVERRIDE 0x58#define DIVIDER_CURRENT_TRIMMING 0x59#define VCO_CURRENT_TRIMMING 0x5A#define VCO_CALIBRATION_OVERRIDE 0x5B#define SYNTHESIZER_TEST 0x5C#define BLOCK_ENABLE_OVERRIDE_1 0x5D#define BLOCK_ENABLE_OVERRIDE_2 0x5E#define BLOCK_ENABLE_OVERRIDE_3 0x5F#define CHANNEL_FILTER_COEFFICIENT_ADDRESS 0x60#define CHANNEL_FILTER_COEFFICIENT_VALUE 0x61#define CRYSTAL_OSCILLATOR_CONTROL_TEST 0x62#define RC_OSCILLATOR_COARSE_CALIBRATION_OVERRIDE 0x63#define RC_OSCILLATOR_FINE_CALIBRATION_OVERRIDE 0x64#define LDO_CONTROL_OVERRIDE_ENSPOR 0x65#define LDO_LEVEL_SETTING 0x66#define DELTASIGMA_ADC_TUNING_1 0x67#define DELTASIGMA_ADC_TUNING_2 0x68#define AGC_OVERRIDE_1 0x69#define AGC_OVERRIDE_2 0x6A#define GFSK_FIR_FILTER_COEFFICIENT_ADDRESS 0x6B#define GFSK_FIR_FILTER_COEFFICIENT_VALUE 0x6C#define TX_POWER 0x6D /发射功率设置,详细请见P153#define TX_DATA_RATE_1 0x6E /数据发送波特率设置寄存器1#define TX_DATA_RATE_0 0x6F /数据发送波特率设置寄存器0#define MODULATION_MODE_CONTROL_10x70 /调制方式控制,详细请见P155#define MODULATION_MODE_CONTROL_2 0x71#define FREQUENCY_DEVIATION0x72#define FREQUENCY_OFFSET_1 0x73#define FREQUENCY_OFFSET_20x74#define FREQUENCY_BAND_SELECT 0x75 /频段选择,详细请见P157#define NOMINAL_CARRIER_FREQUENCY_10x76 /基准载波频率#define NOMINAL_CARRIER_FREQUENCY_00x77#define FREQUENCY_HOPPING_CHANNEL_SELECT 0x79 /跳频频道选择,详细请见P158#define FREQUENCY_HOPPING_STEP_SIZE 0x7A /跳频频道间隔#define TX_FIFO_CONTROL_10x7C#define TX_FIFO_CONTROL_2 0x7D#define RX_FIFO_CONTROL 0x7E#define FIFO_ACCESS 0x7F/FIFO读写方式设置，/-RF4432控制指令-#define RR 0x00#define WR 0x80 /-延时-void delay_10us(char n) int i; while(n-) for(i=0;i5;i+);void delay_ms(int num) int x,y; for(y=0;ynum;y+) for(x = 0;x 500;x) x+; /-SPI单字节读取函数-unsigned char SPI_Read(void) unsigned char i,rxdata; rxdata = 0x00; for (i = 0;i 8;i+) rxdata = rxdata1; RF4432_SCLK=1; RF4432_SDO=1; if (RF4432_SDO=1) /读取最高位，保存至最末尾，通过左移位完成整个字节 rxdata |= 0x01; else rxdata &= 0x01; delay_10us(2); RF4432_SCLK=0; delay_10us(2); return rxdata;/-SPI单字节写入函数-void SPI_Write(unsigned char txdata) unsigned char i; for (i = 0;i 8;i+) if (txdata&0x80) /总是发送最高位 RF4432_SDI=1; else RF4432_SDI=0; RF4432_SCLK=1; txdata = txdata1; RF4432_SCLK=0; /-RF4432寄存器读取函数-voidRF4432_ReadReg(unsigned charaddr, unsigned char *RegisterData) RF4432_SEL=0; SPI_Write(addr|RR); *RegisterData = SPI_Read(); RF4432_SEL=1; /-RF4432寄存器写入函数-voidRF4432_WriteReg(unsigned charaddr, unsigned char value) RF4432_SEL=0; SPI_Write(addr|WR); SPI_Write(value); RF4432_SEL=1; /-RF4432寄存器读取函数-void RF4432_ReadBurestReg(unsigned charaddr,unsigned char*p,unsigned charcount) unsigned char i; RF4432_SEL=0; SPI_Write(addr|RR); for(i=0;icount;i+) pi = SPI_Read(); RF4432_SEL=1; /-RF4432射频芯片初始化函数-void RF4432_Init(void) unsigned char RegisterData; /unsigned inti,j; delay_ms(20);delay_ms(20); delay_ms(20);delay_ms(20); delay_ms(20);delay_ms(20); RF4432_ReadReg(0x03,&RegisterData);/read the Interrupt Status1 register RF4432_ReadReg(0x04,&RegisterData);/read the Interrupt Status2 register /SW reset RF4432_WriteReg(0x07, 0x80);/write 0x80 to the Operating & Function Control1 register /wait for chip ready interrupt from the radio (while the nIRQ pin is high) while(RF4432_IRQ); /read interrupt status registers to clear the interrupt flags and release NIRQ pin RF4432_ReadReg(0x03, &RegisterData); RF4432_ReadReg(0x04, &RegisterData); /*set the physical parameters*/ /set the center frequency to 434 MHz RF4432_WriteReg(0x75, 0x57); /write 0x75 to the Frequency Band Select register RF4432_WriteReg(0x76, 0x19); /write 0xBB to the Nominal Carrier Frequency1 register RF4432_WriteReg(0x77, 0x00); /write 0x80 to the Nominal Carrier Frequency0 register /set the desired TX data rate (9.6kbps) RF4432_WriteReg(0x6E, 0x13); /write 0x4E to the TXDataRate 1 register RF4432_WriteReg(0x6F, 0xA9); /write 0xA5 to the TXDataRate 0 register RF4432_WriteReg(0x70, 0x2C); /write 0x2C to the Modulation Mode Control 1 register RF4432_WriteReg(0x58, 0x80); /VCO /set the TX power to MAX RF4432_WriteReg(0x6D, 0x1F); /write 0x1F to the TX Power register /*set the modem parameters according to the exel calculator(parameters: 4.8 kbps, deviation: 50 kHz, channel filter BW: 102.2 kHz*/ RF4432_WriteReg(0x1C, 0xAD);/write 0x1E to the IF Filter Bandwidth register RF4432_WriteReg(0x20, 0xE2);/write 0xD0 to the Clock Recovery Oversampling Ratio register RF4432_WriteReg(0x21, 0x80);/write 0x00 to the Clock Recovery Offset 2 register RF4432_WriteReg(0x22, 0x1A);/write 0x9D to the Clock Recovery Offset 1 register RF4432_WriteReg(0x23, 0x37);/write 0x49 to the Clock Recovery Offset 0 register RF4432_WriteReg(0x24, 0x00);/write 0x00 to the Clock Recovery Timing Loop Gain 1 register RF4432_WriteReg(0x25, 0x04);/write 0x24 to the Clock Recovery Timing Loop Gain 0 register RF4432_WriteReg(0x1D, 0x44);/enable afc RF4432_WriteReg(0x1E, 0x0A); RF4432_WriteReg(0x2A, 0x2C); RF4432_WriteReg(0x1F, 0x03); RF4432_WriteReg(0x69, 0x60);/write 0x40 to the AFC Loop Gearshift Override register RF4432_WriteReg(0x72, 0x70);/write 0x48 to the Frequency Deviation register /set the preamble length to 10bytes if the antenna diversity is used and set to 5bytes if not RF4432_WriteReg(0x34, 0xCF); /write 0x0C to the Preamble Length register /set preamble detection threshold to 20bits RF4432_WriteReg(0x35, 0x20); /write 0x2A to the Preamble Detection Control register /Disable header bytes; set variable packet length (the length of the payload is defined by the /received packet length field of the packet); set the synch word to two bytes long RF4432_WriteReg(0x33, 0x02); /write 0x02 to the Header Control2 register /Set the sync word pattern to 0x2DD4 RF4432_WriteReg(0x36, 0x2D); /write 0x2D to the Sync Word 3 register RF4432_WriteReg(0x37, 0xD4); /write 0xD4 to the Sync Word 2 register /enable the TX & RX packet handler and CRC-16 (IBM) check RF4432_WriteReg(0x30, 0x8D); /write 0x8D to the Data Access Control register /Disable the receive header filters RF4432_WriteReg(0x32, 0x00 ); /write 0x00 to the Header Control1 register /enable FIFO mode and GFSK modulation RF4432_WriteReg(0x71, 0x2B); /write 0x63 to the Modulation Mode Control 2 register /*set the GPIOs according the testcard type*/ RF4432_WriteReg(0x0B, 0x0A); /write 0x12 to the GPIO0 Configuration(set the TX state) RF4432_WriteReg(0x0C, 0x0A); /write 0x15 to the GPIO1 Configuration(set the RX state) /set the AGC RF4432_WriteReg(0x69, 0x35); /write 0x0B to the AGC Override 2 register /set ADC reference voltage to 0.9V RF4432_WriteReg(0x68, 0x07); /write 0x04 to the Deltasigma ADC Tuning 2 register /set Crystal Oscillator Load Capacitance register RF4432_WriteReg(0x09, 0x7F); /write 0xD7 to the Crystal Oscillator Load Capacitance register RF4432_WriteReg(0x73,0x00); RF4432_WriteReg(0x74,0x00); /TxFIFOReset(); RF4432_WriteReg(0x08, 0x01); RF4432_WriteReg(0x08, 0x00); /RxFIFOReset(); RF4432_WriteReg(0x08, 0x02); RF4432_WriteReg(0x08, 0x00);/-RF4432设置接收模式函数-void RF4432_SetRxMode(void) unsigned char RegisterData; RF4432_WriteReg(0x0E, 0x02);/Rx_EN; /enable the packet valid interrupt RF4432_WriteReg(0x05, 0xFF); RF4432_WriteReg(0x06, 0x00); RF4432_ReadReg(0x03, &RegisterData); RF4432_ReadReg(0x04, &RegisterData); /enable receiver chain RF4432_WriteReg(0x07, 0x05);/-RF4432数据包接收函数-unsigned char RF4432_RxPacket(void) unsigned char temp; RF4432_IRQ=1; if(!RF4432_IRQ) RF4432_ReadReg(INTERRUPT_STATUS_1,&temp); if(temp&0x02) return 1; return 0;void RFIdle(void) unsigned char RegisterData; RF4432_WriteReg(0x07, 0x01); /diasble all ITs RF4432_WriteReg(0x05, 0x00); RF4432_WriteReg(0x06, 0x00); RF4432_ReadReg(0x03, &RegisterData); RF4432_ReadReg(0x04, &RegisterData); void RFTransmit(unsigned char * packet, unsigned char length) unsigned char temp; unsigned char RegisterData; RF4432_WriteReg(0x0E, 0x01);/Tx_EN; RF4432_WriteReg(0x3e, length); for(temp=0;templength;temp+) RF4432_WriteReg(0x7f,packettemp); /enable the wanted ITs RF4432_WriteReg(0x05, 0x04); RF4432_WriteReg(0x06, 0x00); RF4432_ReadReg(0x03, &RegisterData); RF4432_ReadReg(0x04, &RegisterData); /enable transmitter RF4432_WriteReg(0x07, 0x09); while(RF4432_IRQ);/while(GPIO_ReadInputDataBit(GPIOB,GPIO_Pin_12); RF4432_ReadReg(0x03, &RegisterData); RF4432_ReadReg(0x04, &RegisterData); RF_ENUM RFPacketReceived(unsign