vco压控振荡器.doc

All rights reserved. HSPICE, SYNOPSYS.In this document, you will see the circuit construction of a “voltage controlled oscillator” and how different key parameters are simulated with HSPICE RF.VCO Voltage controlled oscillator (VCO) is widely used in wireless communication systems, such as frequency synthesizer. A high performance VCO should be carefully considered from a lot of aspects. HSPICERF provides powerful tools, which take care of every characteristics of VCO and make complicated design easy to implement.Below is the circuit schematic that we will discuss in this document:Figure 1. VCO schematicIn this part, a vco is designed to oscillate at 1.6v.1. Oscillator Simulation Steady-State Signal SimulationIn this figure, M4M7 are parallel connected PMOS, which are used as varactors for frequency tuning purpose; M1M3 offers negative conductance to fulfill the oscillating pre-condition; R0 and R1 is used to represent the parasitic resistance of L0 and L1; m_mult is a parameter, which is defined as the parallel connected PMOSs number. By tuning the m_mult value, we can get a frequency value that more close to 1.6GHz.In order to achieve a proper m_mult, we can use sn sweep function. Here, Synospsys SIMIF is used to setup new analysis and generate netlist. The setting is shown below.This setting will insert a command as .sn tone=1.6g nharms=10 trinit=100n oscnode=out1 SWEEP m_mult LIN 10 500 560 into netlist.Several ways can be used to stimulate an oscillator Using IC on an inductor Using a PWL source to inject a pulse or ramp VDD. Using UIC option in the analysis command.Here, we use the first method.Add a probe command in an include file (inc1.spi) as .probe snfd param=Hertz1The sn result will be So, we can set m_mult=518 as the number that we will use later.2. PhasenoiseAs other analog circuits, oscillators are susceptible to noise. In noisy environment, output signal will change in amplitude and period. Phasenoise is used to evaluate oscillators random deviation of the frequency. HSPICERF has the special .phasenoise command to support non-autonomous circuit simulation.Phasenoise can only be used with .sn or .hb. Below is SIMIF setting to perform phasenoise analysis:It will insert .phasenoise v(out1) DEC 10 1K 10e6 into the netlist.And the simulation result is So, the phasenoise is -96.25dBc60KHz.3. JitterPhasenoise can also be explained as JITTER. So jitter calculation is based on the phasenoise analysis. If the keyword JITTER is added following a phasenoise print/probe, for example .probe/print PHASENOISE phnoise jitter. Then jitter value will be dumped to a *.snjt#/*.printsnjt0.Another way to evaluate jitter value is jitter measurement. Z-2007.03 hspicerf release supports RMS jitter, phase jitter, tracking jitter, period jitter, long-term jitter and cycle-to-cycle jitter.The following sentences will be inserted into inc.sp file to produce jitter.*measurement command*.measure phasenoise rms_jitter RMSJITTER phnoise from = 1K to = 1MEG.measure phasenoise per_jitter PERJITTER phnoise from = 1K to = 1MEG.measure phasenoise lt_jitter LTJITTER phnoise from = 1K to = 1MEG.measure phasenoise ctc_jitter CTCJITTER phnoise from = 1K to = 1MEG* end *Jitter result is stored in *.msnnoi#.DATA1 SOURCE=HSPICERF VERSION=Z-2007.03.TITLE * Generated by: Simulation Interface Version Z-2006.06-SP2-ENG2 ctc_jitter lt_jitter per_jitter rms_jitter temper alter# 3.674322e-17 5.745042e-12 1.617088e-15 4.062358e-12 25.000000 14. VCO gain (tuning characteristic)Use SWEEP option in SN command will produce the oscillating frequency VS control voltage.Set the control voltage as a parameter first, named v_ctrl. Then sweep this parameter. Below is the SIMIF setting:This setting will produce a command - .sn tone=1.6g nharms=10 trinit=100n oscnode=out1 SWEEP v_ctrl LIN 6 0.2 0.7 Another sentence is necessary in order to achieve an intuitionistic result. .probe snfd param=Hertz1The result is stored in *.snf#.K0 = 41.8 MEG/V5. SummarySupply voltage1.8VOscillating frequency1.6Gphasenoise-96.25dBc60KHzCTC jitter3.674322e-17Period jitter1.617088e-15RMS jitter4.062358e-12VCO gain41.8 MEG/V6. Reference1 Behzad Razavi, “ RF Microelectronics”, Chapter 7.2 James F. parker and Daniel Ray, “A 1.6-GHz CMOS PLL with On-Chip Loop Filter”.3 “HSPICE RF user guide Synopsys”, Chapter 9, Steady-State Sho