EPWM-总结(1).doc

DSP2808之EPWM笔记一、EPWM有什么模式和功能6个EPWM包含子模式This guide describes the Enhanced Pulse Width Modulator (ePWM) Module. It includes an overview of the module and information about each of the sub-modules:TB- Time-Base ModuleCC- Counter Compare ModuleAQ- Action Qualifier ModuleDB- Dead-Band Generator ModulePC- PWM Chopper (PC) Module(斩波)TZ- Trip Zone ModuleET- Event Trigger ModuleThe ePWM peripheral performs a digital to analog (DAC) function, where the duty cycle is equivalent to a DAC analog value; it is sometimes referred to as a Power DAC.the ePWM is built up from smaller single channel modules with separatere sources and that can operate together as required to form a system一个完整的PWM通道有两个PWM输出组成：EPWMxA EPWMxBThe ePWM modules are chained together via a clock synchronization scheme that allows them to operate as a single system when required. -ECAP extended capture peripheral modules每个EPWM支持功能：1、专门的带周期和频率控制的16位计数器2、两路PWM的输出（A,B）可以被配置为 Two independent PWM outputs with single-edge operation Two independent PWM outputs with dual-edge symmetric operation One independent PWM output with dual-edge asymmetric operation 双边不对称操作？3、 Asynchronous override control of PWM signals through software.4、Programmable phase-control support for lag or lead operation relative to other ePWM module5、Hardware-locked (synchronized) phase relationship on a cycle-by-cycle basis.6、Dead-band generation with independent rising and falling edge delay control.7、Programmable trip zone allocation of both cycle-by-cycle trip and one-shot trip on fault conditions.8、A trip condition can force either high, low, or high-impedance state logic levels at PWM output9、All events can trigger both CPU interrupts and ADC start of conversion (SOC) 如何理解10、Programmable event prescaling minimizes CPU overhead on interrupts.11、PWM chopping by high-frequency carrier signal, useful for pulse transformer gate drives.结构时基的同步信号only for EPWM1为什么传给GPtrigger ADC同步信号传输one for each sequencer（ET）通过GPIO外设，死区信号可以被设置成异步输入信号。Peripheral BusThe peripheral bus is 32-bits wide and allows both 16-bit and 32-bit writes to the ePWM register file.PWM模块内部功能连接：Chopper：A device that interrupts an electric current or a beam of radiation（光束）.计数器值输出限幅这几处输入输出的信号波形具体为什么样子EPWMxAEPWMxBCHOPPER电路详细：4个shadow模式寄存器（尽量使用shadow，保证数据安全）HRPWM (High Resolution PWM)仅初始化。事件管理器上的区别（2808 2812）二、七种子模式的配置方法定义在sys_marco.h文件中Table 2-1. Submodule Configuration ParametersSubmodule Configuration Parameter or OptionTime-base (TB) Scale the time-base clock (TBCLK) relative to the system clock (SYSCLKOUT). Configure the PWM time-base counter (TBCTR) frequency or period. Set the mode for the time-base counter: count-up mode: used for asymmetric PWM count-down mode: used for asymmetric PWM count-up-and-down mode: used for symmetric PWM Configure the time-base phase relative to another ePWM module. Synchronize the time-base counter between modules through hardware or software. Configure the direction (up or down) of the time-base counter after a synchronization event. Configure how the time-base counter will behave when the device is halted by an emulator. Specify the source for the synchronization output of the ePWM module: Synchronization input signal Time-base counter equal to zero Time-base counter equal to counter-compare B (CMPB) No output synchronization signal generated.Counter-compare (CC) Specify the PWM duty cycle for output EPWMxA and/or output EPWMxB Specify the time at which switching events occur on the EPWMxA or EPWMxB outputAction-qualifier (AQ) Specify the type of action taken when a time-base or counter-compare submodule event occurs: No action taken Output EPWMxA and/or EPWMxB switched high Output EPWMxA and/or EPWMxB switched low Output EPWMxA and/or EPWMxB toggled Force the PWM output state through software control Configure and control the PWM dead-band through softwareDead-band (DB) Control of traditional complementary dead-band relationship between upper and lower switches Specify the output rising-edge-delay value Specify the output falling-edge delay value Bypass the dead-band module entirely. In this case the PWM waveform is passed through without modification.PWM-chopper (PC) Create a chopping (carrier) frequency. Pulse width of the first pulse in the chopped pulse train. Duty cycle of the second and subsequent pulses. Bypass the PWM-chopper module entirely. In this case the PWM waveform is passed throughwithout modification.Trip-zone (TZ) Configure the ePWM module to react to one, all, or none of the trip-zone pins. Specify the tripping action taken when a fault occurs: Force EPWMxA and/or EPWMxB high Force EPWMxA and/or EPWMxB low Force EPWMxA and/or EPWMxB to a high-impedance state Configure EPWMxA and/or EPWMxB to ignore any trip condition. Configure how often the ePWM will react to each trip-zone pin: One-shot Cycle-by-cycle Enable the trip-zone to initiate an interrupt. Bypass the trip-zone module entirely.Event-trigger (ET) Enable the ePWM events that will trigger an interrupt. Enable ePWM events that will trigger an ADC start-of-conversion event. Specify the rate at which events cause triggers (every occurrence or every second or third occurrence) Poll, set, or clear event flagsTB结构图Generate the following events: CTR = PRD: Time-base counter equal to the specified period (TBCTR = TBPRD) .This signal is generated whenever the counter value is equal to the active period register value. That is when TBCTR = TBPRD. CTR = Zero: Time-base counter equal to zero (TBCTR = 0x0000).This signal is generated whenever the counter value is zero. That is when TBCTR equals 0x0000. CTR = CMPBThis event is generated by the counter-compare submodule and used by the synchronization out logicCTR_max： Time-base counter equal max value. (TBCTR = 0xFFFF)/*- EPWM相关宏定义 -*/*时基控制*/=/-#define PWM_PERIOD 12625 /PWM 计数周期#define HALF_PWM_PERIOD 6312 /PWM 计数周期一半#define DEAD_BAND_COUNT 160 /死区时间 3.2us dead time=DEAD_BAND_COUNT/TBCLK/*计数方式*/#defineTB_COUNT_UP 0x0 /增计数，增至TBPRD，从零开始重计#defineTB_COUNT_DOWN 0x1 /减计数，从TBPRD减至0，再重复#defineTB_COUNT_UPDOWN0x2 /连续增减计数 PWM12356均设置为2/增至(TBPRD) value is reached.后再减到0#defineTB_FREEZE 0x3 /停止/ PHSEN bit =0设置为主动模式，=1设置为从动模式 PWM1为主，其余为从#defineTB_DISABLE 0x0 / Phase loading disabled#defineTB_ENABLE 0x1 / Phase loading enabled/ PRDLD bit #defineTB_SHADOW 0x0 / TBPRD is loaded from its shadow register when TBCTR is equal to zero. / A write or read to the TBPRD register accesses the shadow register.#defineTB_IMMEDIATE 0x1/ Load the TBPRD register immediately./ A write or read to the TBPRD register directly accesses the active register./ SYNCOSEL bits#defineTB_SYNC_IN 0x0#defineTB_CTR_ZERO 0x1#defineTB_CTR_CMPB 0x2#defineTB_SYNC_DISABLE 0x3/ HSPCLKDIV and CLKDIV bits#defineTB_DIV1 0x0 #defineTB_DIV2 0x1#defineTB_DIV4 0x2/ PHSDIR bit#defineTB_DOWN0x0#defineTB_UP 0x1/ CMPCTL (Compare Control)/=/ 计数器重载方式#defineCC_CTR_ZERO0x0 /计数器为0时,重新装载#defineCC_CTR_PRD0x1 /周期匹配时,重新装载#defineCC_CTR_ZERO_PRD0x2 /周期匹配或计数器为零时,重新装载#defineCC_LD_DISABLE 0x3 /禁止重新装载/ SHDWAMODE and SHDWBMODE bits#defineCC_SHADOW0x0 / PWM12356均设置为shadow#defineCC_IMMEDIATE 0x1/ AQCTLA and AQCTLB (Action Qualifier Control)/=/ ZRO, PRD, CAU, CAD, CBU, CBD bits#defineAQ_NO_ACTION0x0 /匹配时无动作(输出电平保持不变) #defineAQ_CLEAR0x1 /匹配时输出低电平#defineAQ_SET0x2 /匹配时输出高电平#defineAQ_TOGGLE0x3 /匹配时电平翻转/ DBCTL (Dead-Band Control)/=/ OUT MODE bits /第0位控制S0，第1位控制S1#defineDB_DISABLE0x0 / POLSEL和IN MODE不起作用/00 绕开死区，EPWMxA in和EPWMxB in输出信号直接传给PWM斩波器子模式。#defineDBA_ENABLE0x1/01 不允许上升沿delay，A直接输出；下降沿delay，B通过死区输出#defineDBB_ENABLE0x2/10 与01情况相反#defineDB_FULL_ENABLE0x3/11 死区全部使能，The input signal for the delay is determined by DBCTLIN_MODE/ POLSEL bits /Polarity Select Control极性选择控制 /第2位控制S2，第3位控制S3翻转极性有什么用法程序初始化为1#defineDB_ACTV_HI0x0 /默认不翻转极性#defineDB_ACTV_LOC0x1 /A翻转 #defineDB_ACTV_HIC0x2 /B翻转#defineDB_ACTV_LO0x3 /A、B都翻转/ IN MODE /第4位控制S4，第5位控制S5/To produce classical dead-band waveforms the default is EPWMxA In is the source for both（0）#define DBA_ALL 0x0 /程序初始化为0#define DBB_RED_DBA_FED 0x1#define DBA_RED_DBB_FED 0x2#define DBB_ALL 0x3void DisablePWM(void) PWM_EN = 0; /disable PWM output all PWM forced high/EPwm1Regs.DBCTL.bit.POLSEL = DB_ACTV_HI;/EPwm2Regs.DBCTL.bit.POLSEL = DB_ACTV_HI;/EPwm3Regs.DBCTL.bit.POLSEL = DB_ACTV_HI; EPwm1Regs.DBCTL.bit.OUT_MODE = 0; /旁路死区EPwm2Regs.DBCTL.bit.OUT_MODE = 0; /旁路死区EPwm3Regs.DBCTL.bit.OUT_MODE = 0; /旁路死区 EPwm1Regs.AQCSFRC.bit.CSFA =2;EPwm1Regs.AQCSFRC.bit.CSFB =2; EPwm2Regs.AQCSFRC.bit.CSFA =2;EPwm2Regs.AQCSFRC.bit.CSFB =2; EPwm3Regs.AQCSFRC.bit.CSFA =2;EPwm3Regs.AQCSFRC.bit.CSFB =2; void EnablePWM(void) /EPwm1Regs.DBCTL.bit.POLSEL = DB_ACTV_LOC;/EPwm2Regs.DBCTL.bit.POLSEL = DB_ACTV_LOC;/EPwm3Regs.DBCTL.bit.POLSEL = DB_ACTV_LOC;EPwm1Regs.DBCTL.bit.OUT_MODE = 3;EPwm2Regs.DBCTL.bit.OUT_MODE = 3;EPwm3Regs.DBCTL.bit.OUT_MODE = 3; EPwm1Regs.AQCSFRC.bit.CSFA =0;EPwm1Regs.AQCSFRC.bit.CSFB =0; EPwm2Regs.AQCSFRC.bit.CSFA =0;EPwm2Regs.AQCSFRC.bit.CSFB =0; EPwm3Regs.AQCSFRC.bit.CSFA =0;EPwm3Regs.AQCSFRC.bit.CSFB =0; / CHPCTL (chopper control)/=/ CHPEN bit#defineCHP_DISABLE0x0#defineCHP_ENABLE0