深入理解计算机系统chapter4

第六组小组成员 AsFigureillustrates eachinstructioninaY86programcanreadandmodifysomepartoftheprocessorstate Thisisreferredtoastheprogrammer visiblestate wherethe programmer inthiscaseiseithersomeonewritingprogramsinassemblycodeoracompilergeneratingmachine levelcode WewillseeinourprocessorimplementationsthatwedonotneedtorepresentandorganizethisstateinexactlythemannerimpliedbytheISA aslongaswecanmakesurethatmachine levelprogramsappeartohaveaccesstotheprogrammer visiblestate Thereareeightprogramregisters eax ecx edx ebx esi edi esp and ebp Eachofthesestoresaword Register espisusedasastackpointerbythepush pop call andreturninstructions Otherwise theregistershavenofixedmeaningsorvalues 4 1 1Programmer VisibleState Therearethreesingle bitconditioncodes ZF SF andOF storinginformationabouttheeffectofthemostrecentarithmeticorlogicalinstruction Theprogramcounter PC holdstheaddressoftheinstructioncurrentlybeingexecuted 4 1 1Programmer VisibleState Thememoryisconceptuallyalargearrayofbytes holdingbothprogramanddata Y86programsreferencememorylocationsusingvirtualaddresses Acombinationofhardwareandoperatingsystemsoftwaretranslatestheseintotheactual orphysical addressesindicatingwherethevaluesareactuallystoredinmemory wecanthinkofthevirtualmemorysystemasprovidingY86programswithanimageofamonolithicbytearray 4 1 1Programmer VisibleState AfinalpartoftheprogramstateisastatuscodeStat indicatingtheoverallstateofprogramexecution Itwillindicateeithernormaloperation orthatsomesortofexceptionhasoccurred suchaswhenaninstructionattemptstoreadfromaninvalidmemoryaddress 4 1 1Programmer VisibleState 4 1 2Y86Instructions Figure4 2givesaconcisedescriptionoftheindividualinstructionsintheY86ISA Weusethisinstructionsetasatargetforourprocessorimplementations ThesetofY86instructionsincludesonly4 byteintegeroperations hasfeweraddressingmodes andincludesasmallersetofoperations Sinceweonlyuse4 bytedata wecanrefertotheseas words withoutanyambiguity Inthisfigure weshowtheassembly coderepresentationoftheinstructionsontheleftandthebyteencodingsontheright 4 1 2Y86Instructions Therearefourintegeroperationinstructions showninFigure4 2asOP1 Theseareadd1 sub1 and1 andxor1 Theyoperateonlyonregisterdata TheseinstructionssetthethreeconditioncodesZF SF andOF zero sign andoverflow 4 1 2Y86Instructions Thesevenjumpinstructions showninFigure4 2asjXX arejmp jle jl je jne jge andjg Branchesaretakenaccordingtothetypeofbranchandthesettingsoftheconditioncodes 4 1 2Y86Instructions Therearesixconditionalmoveinstructions showninFigure4 2ascmovXX cmov1e cmov1 cmove cmovne cmovge andcmovg Thesehavethesameformatastheregister registermoveinstructionrrmovl butthedestinationregisterisupdatedonlyiftheconditioncodessatisfytherequiredconstraints 4 1 2Y86Instructions Thecallinstructionpushesthereturnaddressonthestackandjumpstothedestinationaddress Theretinstructionreturnsfromsuchacall Thepush1andpop1instructionsimplementpushandpop justastheydoinIA32 Thehaltinstructionstopsinstructionexecution ForY86 executingthehaltinstructioncausestheprocessortostop withthestatuscodesettoHLT SeeSection4 1 4 4 1 3InstructionEncoding Figure4 2alsoshowsthebyte levelencodingoftheinstructions Eachinstructionrequiresbetween1and6bytes dependingonwhichfieldsarerequired Everyinstructionhasaninitialbyteidentifyingtheinstructiontype Thisbyteissplitintotwo4 bitparts thehigh order orcode andthelow order orfunction AsyoucanseeinFigure4 2 codevaluesrangefrom0to0 xB Thefunctionvaluesaresignificantonlyforthecaseswhereagroupofrelatedinstructionsshareacommoncode ThesearegiveninFigure4 3 showingthespecificencodingsoftheintegeroperation conditionalmove andbranchinstructions Observethatrrmovlhasthesameinstructioncodeastheconditionalmoves Itcanbeviewedasan unconditionalmove justasthejmpinstructionisanunconditionaljump bothhavingfunctioncode0 4 1 3InstructionEncoding Oneimportantpropertyofanyinstructionsetisthatthebyteencodingsmusthaveauniqueinterpretation Anarbitrarysequenceofbyteseitherencodesauniqueinstructionsequenceorisnotalegalbytesequence ThispropertyholdsforY86 becauseeveryinstructionhasauniquecombinationofcodeandfunctioninitsinitialbyte andgiventhisbyte wecandeterminethelengthandmeaningofanyadditionalbytes Thispropertyensuresthataprocessorcanexecuteanobject codeprogramwithoutanyambiguityaboutthemeaningofthecode Evenifthecodeisembeddedwithinotherbytesintheprogram wecanreadilydeterminetheinstructionsequenceaslongaswestartfromthefirstbyteinthesequence Ontheotherhand ifwedonotknowthestartingpositionofacodesequence wecannotreliablydeterminehowtosplitthesequenceintoindividualinstructions Thiscausesproblemsfordisassemblersandothertoolsthatattempttoextractmachine levelprogramsdirectlyfromobject codebytesequences 4 1 4Y86Exceptions Theprogrammer visiblestateforY86includesastatuscodeStatdescribingtheoverallstateoftheexecutingprogrammer Inamorecompletedesign theprocessorwouldtypicallyinvokeanexceptionhandler aproceduredesignatedtohandlethespecifictypeofexceptionencountered 4 1 5Y86Programmer intSum int Start intCount intsum 0 while Count sum Start Start Count returnsum theIA32codewasgeneratedbytheGCCcompiler TheY86codeisessentiallythesame exceptthatY86sometimesrequirestwoinstructionstoaccomplishwhatcanbedonewithasingleIA32instruction Ifwehadwrittentheprogrammerusingarrayindexing however theconversiontoY86codewouldbemoredifficult sinceY86doesnothavescaledaddressingmodes ThiscodewouldfollowmanyofconventionswehaveseenforIA32 includingtheuseofthestackandframepointers Forsimplicity itdoesnotfollowstheIA32conventionofhavingsomeregistersdesignatedascallee saveregister diffrence Y86coderequiremultipleinstructionstoperformwhatcanbedonewithasingleIA32instruction intSum int Start intCount 1Sum 2pushl ebp3movl esp ebp4movl8 ebp ecxecx Start5movl12 ebp edxedx Count6xorl edx edxsum 07testl edx edx8je L349 L35 10addl ecx eax11addl 4 ecxStart 12decl edxCount 13jnz L35Stopwhen014 L34 15movl ebp esp16popl ebp17ret intSum int Start intCount 1Sum 2pushl ebp3rrmovl esp ebp4mrmovl8 ebp ecxecx Start5mrmovl12 ebp edxedx Count6xorl12 ebp edxsum 07andl edx edxSetconditioncodes8je L349Loop 10mrmovl ecx esiget Start11addl ecx eaxaddtosum12irmovl 4 ebx13addl 4 ecxStart 14irmovl 1 ebx15addl ebx edxCount 16jneLoopStopwhen017End 18rrmovl ebp esp19popl ebp20ret 4 1 5Y86Programmer Thedirective pose0 line2 indicatesthattheassemblershouldbegingeneratingcodestartingataddress0 lines3and4 initializethestackandframepointers line47 labelStackisdeclared line46 indicateaddress0 x100usinga posdirectiveOurstackwillthereforestartatthisaddressandgrowtowardloweraddresses lines9to13 declareanarrayoffourwords havingvalues0 xd 0 xc0 oxb00and0 xa000 Thelabelarraydenotesthestartofthisarray andisalignedona4 byteboundary usingthe aligndirective lines15to24 a main procedurethatcallsthefunctionSumonthefour wordarrayandthenhalts ouronlytoolforcreatingY86codeisanassembler theprogrammermustpreformtasksweordinarilydelegatetothecompiler linker andrun timesystem wehaveimplementedaninstructionsetsimulatorwecallYIS thepurposeofwhichistomodeltheexcutionofaY86codeprogram withoutattemptingtomodelthebehaviorofanyspecificprocessorimplementation Thisformofsimulationisusefulfordebuggingprogramsbeforeactualhardwareisavailable andforcheckingtheresultofeithersimulatingthehardwareorrunningtheprogramonthehardwareitself MostY86instructionstransformtheprogramstateinastraightforwardmanner andsodefiningtheintendedeffectofeachinstructionisnotdifficult Twounusualinstructioncombinations however requirespecialattention Thepushlinstructionbothdecrementsthestackpointerby4andwritesaregistervaluetomemory Itisthereforenottotallyclearwhattheprocessorshoulddowhenexecutingtheinstructionpushl esp sincetheregisterbeingpushedisbeingchangedbythesameinstruction Twodifferentconventionsarepossible pushtheoriginalvalueof esppushthedecrementedvalueof esp 4 1 6SomeY86InstructionDetails Asimilarambiguityoccursfortheinstructionpopl esp Itcouldeitherset esptothevaluereadfrommemoryortotheincrementedstackpointer 1 text2 globlpushtest3pushtest 4pushl ebp5movl esp ebp6movl esp eaxCopystackpointer7pushl espPushstackpointer8popl edxPopitback9subl edx eaxSubtractnewfromoldstackpointer10leaveRestorestack framepointers11ret Inourexperiments wefindthatfunctionpushtestalwaysreturnszero PracticeProblem4 6 4 1 6SomeY86InstructionDetails PracticeProblem4 7 1 text2 globlpoptest3poptest 4pushl ebp5movl esp ebp6pushl 0 xabcdPushtestvalue7popl espPoptostackpointer8movl esp eaxSetpoppedvalueasreturnvalue9leaveRestorestackandframepointers10ret Inourexperiments Wefindthisfunctionalwaysreturns0 xabcd 4 1 6SomeY86InstructionDetails ForIA 32processorsfromtheIntel286on thePUSHESPinstructionpushesthevalueoftheESPregisterasitexistedbeforetheinstructionwasexecuted FortheIntelR8086processor thePUSHSPinstructionpushesthenewvalueoftheSPregister Whatthisnotestatesisthatdifferentmodelsofx86processorsdodifferentthingswheninstructedtopushthestackpointerregister Somepushtheoriginalvalue whileotherspushthedecrementedvalue Therearetwodrawbackstothisinconsistency 不一致 Itdecreasescodeportability Itcomplicates 使复杂 thedocumentation AsideGettingthedetailsright Inconsistenciesacrossx86models 4 1 6SomeY86InstructionDetails 4 2LogicDesignandtheHardwareControlLanguageHCL Inhardwaredesign electroniccircuitsareusedtocomputefunctionsonbitsandtostorebitsindifferentkindsofmemoryelements Mostcontemporarycircuittechnologyrepresentsdifferentbitvaluesashighorlowvoltages 电压 onsignalwires Incurrenttechnology logicvalue1isrepresentedbyahighvoltageofaround1 0volt whilelogicvalue0isrepresentedbyalowvoltageofaround0 0volts Threemajorcomponentsarerequiredtoimplementadigitalsystem combinationallogictocomputefunctionsonthebitsmemoryelementstostorebitsclocksignalstoregulatetheupdatingofthememoryelements Aside ModernLogicDesign Nowadays mostdesignsareexpressedinahardwaredescriptionlanguage HDL atextualnotationthatlookssimilartoaprogramminglanguagebutthatisusedtodescribehardwarestructuresratherthanprogrambehaviors ThemostcommonlyusedlanguagesareVerilog havingasyntaxsimilartoC andVHDL havingasyntaxsimilartotheAdaprogramminglanguage Theselanguageswereoriginallydesignedforexpressingsimulationmodelsofdigitalcircuits 4 2LogicDesignandtheHardwareControlLanguageHCL Logicgatesarethebasiccomputingelementsfordigitalcircuits TheygenerateanoutputequaltosomeBooleanfunctionofthebitvaluesattheirinputs Logicgatesarealwaysactive 4 2 1LogicGates Byassemblinganumberoflogicgatesintoanetwork wecanconstructcomputationalblocksknownascombinationalcircuits Theoutputsoftwoormorelogicgatescannotbeconnectedtogether Thenetworkmustbeacyclic 非循环的 4 2 2CombinationalCircuitsandHCLBooleanExpressions Tworestrictionsareplacedonhowthenetworksareconstructed Figure4 10 Combinationalcircuittotestforbitequality Theoutputwillequal1whenbothinputsare0 orbothare1 booleq a b a b WewritethefunctionofthisnetworkinHCLas 4 2 2CombinationalCircuitsandHCLBooleanExpressions Figure4 10 Single bitmultiplexorcircuit Theoutputwillequalinputaifthecontrolsignalsis1andwillequalinputbwhensis0 boolout s WewritethefunctionofthisnetworkinHCLas 4 2 2CombinationalCircuitsandHCLBooleanExpressions OurHCLexpressionsdemonstrateaclearparallelbetweencombinationallogiccircuitsandlogicalexpres sionsinC TheybothuseBooleanoperationstocomputefunctionsovertheirinputs Severaldifferencesbetweenthesetwowaysofexpressingcomputationareworthnoting Sinceacombinationalcircuitconsistsofaseriesoflogicgates ithasthepropertythattheoutputscontinuallyrespondtochangesintheinputs LogicalexpressionsinCallowargumentstobearbitraryintegers interpreting0asFALSEandany thingelseasTRUE Incontrast ourlogicgatesonlyoperateoverthebitvalues0and1 4 2 2CombinationalCircuitsandHCLBooleanExpressions a a func b c LogicalexpressionsinChavethepropertythattheymightonlybepartiallyevaluated 4 2 2CombinationalCircuitsandHCLBooleanExpressions thefunctionfuncwillnotbecalled becausetheexpression a a evaluatesto0 Incontrast combinationallogicdoesnothaveanypartialevaluationrules Thegatessimplyrespondtochanginginputs 4 2 2Word LevelCombinationalCircuitandHCLIntegerExpressions P389 394 Word LevelCombinationalCircuit Byassemblinglargenetworksoflogicgates wecanconstructcombinationalcircuitsthatcomputemuchmorecomplexfunctions Typically wedesigncircuitsthatoperateondatawords Combinationalcircuitstoperformword levelcomputationsareconstructedusinglogicgatestocomputetheindividualbitsoftheoutputword basedontheindividualbitsoftheinputword 字级测试相等电路 当字A的每一位与字B中相应的位均相等时 输出1 InHCL wewilldeclareanyword levelsignalasanint HCLallowswordstobecomparedforequality andsothefunctionalityofthecircuitshown inFigure4 11canbeexpressedatthewordlevelasboolEq A B thecircuitforaword levelmultiplexor Thiscircuitgeneratesa32 bitwordOutequaltooneofthetwoinputwords AorB dependingonthecontrolinputbits Thecircuitconsistsof32identicalsubcircuits eachhavingastructuresimilartothebit levelmultiplexorfromFigure4 11 Butit sratherthansimplyreplicatingthebit levelmultiplexor32times theword levelversionreducesthenumberofinvertersbygenerating sonceandreusingitateachbitposition MultiplexingfunctionsaredescribedinHCLusingcaseexpressions Acaseexpressionhasthefollowinggeneralform Allowthedifferentselectionexpressionstobemutuallyexclusive Logically theselectionexpressionsareevaluatedinsequence andthecaseforthe rstoneyielding1isselected intOut s A 1 B TheselectionexpressionscanbearbitraryBooleanexpressions andtherecanbeanarbitrarynumberofcases Thisallowscaseexpressionstodescribeblockswheretherearemanychoicesofinputsignalswithcomplexselectioncriteria Forexample considerthefollowingdiagramofafour waymultiplexor Asa nalexample supposewewantdesignalogiccircuitthat ndstheminimumvalueamongasetofwordsA B andC diagrammedasfollows WecanexpressthisusinganHCLcaseexpressionas Combinationallogiccircuitscanbedesignedtoperformmanydifferenttypesofoperationsonword leveldata Oneimportantcombinationalcircuit knownasanarithmetic logicunit ALU isdiagrammedatanabstractlevelinFigure4 13 Thiscircuithasthreeinputs twod