外文翻译原文-基于51单片机兼容的PWM控制器的设计

1-4244-1253-6/07/$25.002007IEEEProceedingsofHDP07DesignofPWMControllerinaMCS-51CompatibleMCUYue-LiHu,WeiWangMicroelectronicResearch&DevelopmentCenter,KeyLaboratoryofAdvancedDisplayandSystemApplications(ShanghaiUniversity),MinistryofEducationCampusP.O.B.221,149YanchangRd,Shanghai200072,ChinaE-mail:AbstractThispaperpresentsadesignofPulse-WidthModulated(PWM)controllermoduleinaMCUbasedonMCS-51structure.Thedesigncangenerate2-channelprogrammableperiodicPWMsignals.TheseoutputPWMsignalsfromMCUcanbeusedforavarietyofapplicationsincludingmotorcontrol.Thefunctionofthedesignallowsuserstoselectindependentorcomplementaryinversiontimingrelationshipsbetween2PWMwaveforms.ThelattermodeselectionalsoincludesoptionaldeadtimefunctiontosupportdrivingH-bridgesandinverters.Therefore,userscancontroltheoutputPWMsignalsthroughsettingtheduty-cycleregisters.Afterthesuccessfulsimulationatthefrontend,practicalexperimentsmadeonaNIOSdevelopmentboardverifythedesign.1.IntroductionPWMtechnologyisakindofvoltageregulationmethodbycontrollingtheswitchfrequencyofDCpowerwithfixedvoltagetomodifythetwo-endvoltageofload.Thistechnologycanbeusedforavarietyofapplicationsincludingmotorcontrol,temperaturecontrolandpressurecontrolandsoon.InthemotorcontrolsystemshownasFig.1,throughadjustingthedutycycleofpowerswitch,thespeedofmotorcanbecontrolled.AsshowninFig.2,underthecontrolofPWMsignal,theaverageofvoltagethatcontrolsthespeedofmotorchangeswithDuty-cycle(D=t1/TinthisFigure),thusthemotorspeedcanbeincreasedwhenmotorpowerturnon,decreasedwhenpowerturnoff.Fig.1PWMcontrolblockdiagramFig.2:TheRelationshipbetweenVoltageofArmatureandDuty-cycleTherefore,themotorspeedcanbecontrolledwithregularlyadjustingthetimeofturn-onandturn-off.Therearethreemethodscouldachievetheadjustmentofdutycycle:(1)Adjustfrequencywithfixedpulse-width.(2)Adjustbothfrequencyandpulse-width.(3)Adjustpulse-widthwithfixedfrequency.Generally,therearefourmethodstogeneratethePWMsignalsasthefollowing:(1)Generatedbythedevicecomposedofseparatelogiccomponents.Thismethodistheoriginalmethodwhichnowhasbeendiscarded.(2)Generatedbysoftware.ThismethodneedCPUtocontinuouslyoperateinstructionstocontrolI/OpinsforgeneratingPWMoutputsignals,sothatCPUcannotdoanythingother.Therefore,themethodalsohasbeendiscardedgradually.(3)GeneratedbyASIC.TheASICmakesadecreaseofCPUburdenandsteadyworkgenerallyhasseveralfunctionssuchasover-currentprotection,dead-timeadjustmentandsoon.Thenthemethodhasbeenwidelyusedinmanykindsofoccasionnow.(4)GeneratedbyPWMfunctionmoduleofMCU.ThroughembeddingPWMfunctionmoduleinMCUandinitializingthefunction,PWMpinsofMCUcanalsoautomaticallygeneratePWMoutsignalswithoutCPUcontrollingonlywhenneedtochangeduty-cycle.Itisthemethodthatwillbeimplementedinthispaper.Inthispaper,weproposeaPWMmoduleembeddedina8051microcontroller.ThePWMmodulecansupportPWMpulsesignalsbyinitializingthecontrolregisterandduty-cycleregisterwiththreemethodsjustmentionedabovetoadjustthedutycycleandseveraloperationmodestoaddflexibilityforuser.ThefollowingsectionexplainsthearchitectureofthePWMmoduleandthearchitecturesofbasicfunctionalblocks.Section3describestwooperationmodes.Experimentalandsimulationresultsverifyingpropersystemoperationarealsoshowninthatsection.Dependingonmodeofoperation,thePWMmodulecreatesoneormorepulse-widthmodulatedsignals,whosedutyratioscanbeindependentlyadjusted.2.ImplementationofPWMmoduleinMCU2.1OverviewofthePWMmoduleAblockdiagramofPWMmoduleisshowninFig.3.Itisclearlyfromthediagramthatthewholemoduleiscomposedoftwosections:PWMsignalgeneratoranddead-timegeneratorwithchannelselectlogic.ThePWMfunctioncanbestartedbytheuserthroughimplementingsomeinstructionsforinitializingthePWMmodule.Inparticular,thefollowingpowerandmotioncontrolapplicationsaresupported:DCMotorUninterruptablelPowerSupply(UPS)ProceedingsofHDP07Fig.3ArchitectureofPWMModuleThePWMmodulealsohasthefollowingfeatures:TwoPWMsignaloutputswithcomplementaryorindependentoperationHardwaredead-timegeneratorsforcomplementarymodeDutycycleupdatesareconfigurabletobeimmediatedorsynchronizedtothePWM2.2Detailsofthearchitecture2.2.1PMWgeneratorThearchitectureofthe2-outputPWMgeneratorshowninFig.3isbasedona16-bitresolutioncounterwhichcreatesapulse-widthmodulatedsignal.Thesystemissynthesizedbyasystemclocksignalwhosefrequencycanbedividedby4timesor12timesthroughsettingthevalueofT3MforPWM0orT4MforPWM1inthespecialregisterPWMCONasshowninFig.4.ToPWM0generator,theclockto16-bitcounterwillbepre-dividedby4timesbydefaultwhenT3Missettozero.Andtheclockwillbedividedby12timeswhenT3Missetto1.ThisisalsotrueforPWM1.TheotherbitsinPWMCONareexplainedindetailinTable1.Fig.4BitMappingofPWMCONTable1:TheBitDefinitioninPWMCONBITDescriptionTF4InterruptRequestforPWM0TR4RUNbitforPWM0TF3InterruptRequestforPWM1TR3RUNbitforPWM1PSELChannelSelectinComplementaryModeCPWMModeSelectT4MClockPrescalerforPWM1T3MClockPrescalerforPWM02.2.2Channel-selectlogicThefollowFig.5showsthechannel-selectlogicwhichisusefulinComplementaryMode.Fromthisdiagram,itiscleartoknowthatsignalCPandCPWMcontrolthesourceofPWMHandPWML.Andthedetailsaboutthetwocontrolsignalswillbediscussedinthesection3,andthearchitectureofdead-timegeneratorwillalsobediscussedinsection3.1forthecontinuityofComplementaryMode.Fig.5DiagramofChannel-selectLogic3.OperationModeandSimulationResultsThedesignhastwooperationmodes:IndependentModeandComplimentaryMode.BysettingthecorrespondingbitCPWMinregisterPWMCONshowninFig.4,usercanselectoneofthetwooperationmodes.WhenCPWMissettozero,PWMmodulewillworkinIndependentMode,whereas,PWMmodulewillworkinComplimentaryMode.Inthefollowingofthissection,thetwooperationmodewillbeexplainedrespectivelyindetailandthesimulationresultsofthePWMmodulefromtheSynoposysVCSEDAplatformwhichverifythedesignwillalsobeshown.3.1IndependentPWMOutputModeAnIndependentPWMOutputmodeisusefulfordrivingloadssuchastheoneshowninFigure1.AparticularPWMoutputisintheIndependentOutputmodewhenthecorrespondingCPbitinthePWMCONregisterissettozero.Inthiscase,two-channelPWMoutputsareindependentofeachother.ThesignalonpinPWM0/PWMHisfromPWM0generator,andthesignalonpinPWM1/PWMLisfromPWM0generator.Theseparatecaseisachievedbythechannel-selectlogicshowninFig.6.ThePWMI/Opinsaresettoindependentmodebydefaultuponadvicereset.Thedead-timegeneratorisdisabledintheIndependentmode.ThesimulationresultisshowninFigure4asthefollowingFig.5.Tr4andtr3arerunbitstoPWM0andPWM1,respectively.Actually,fromthisdiagram,PinP15/P14ofMCUisusedforPWMH/PWMLornormalI/O,alternatively.Fig.6theWaveformofPWMOutputsinIndependentMode3.2ComplementaryPWMOutputModeTheComplementaryOutputmodeisusedtodriveinverterloadssimilartotheoneshowninFigure7.ThisinvertertopologyistypicalforDCapplications.InComplementaryOutputMode,thepairofPWMoutputscannotbeactivesimultaneously.ThePWMchannelandoutputpinpairareinternallyconfiguredthroughchannel-selectlogicasshowninFigure5.Adead-timemaybeoptionallyinsertedduringdeviceswitchingwherebothoutputsareinactiveforashortperiod.ProceedingsofHDP07Fig7:TypicalLoadforComplementaryPWMOutputsTheComplementarymodeisselectedforPWMI/OpinpairbysettingtheappropriateCPWMbitinPWMCON.Inthiscase,PSELisineffect.PWMHandPWMLwillcomefromPWM0generatorwhenPSELissettozero,whenthesignalsfromPWM1generatorisuseless,whereasPWMHandPWMLwillcomefromPWM1generatorwhenPSELissetto1,whenthesignalsfromPWM0generatorisuseless.IntheprocessofproducingthePWMoutputsinComplementaryMode,thedead-timewillbeinsertedtobediscussedinthefollowingsection.3.3Dead-timeControlDead-timegenerationisautomaticallyenabledwhenPWMI/OpinpairisoperatingintheComplementaryOutputmode.Becausethepoweroutputdevicescannotswitchinstantaneously,someamountoftimemustbeprovidedbetweentheturn-offeventofonePWMoutputinacomplementarypairandtheturn-oneventoftheothertransistor.The2-outputPWMmodulehasoneprogrammabledead-timewith8-bitregister.ThecomplementaryoutputpairforthePWMmodulehasan8-bitdowncounterthatisusedtoproducethedead-timeinsertion.AsshowninFigure8,thedeadtimeunithasarisingandfallingedgedetectorconnectedtoPWMsignalfromoneofPWMgenerator.ThedeadtimesisloadedintothetimeronthedetectedPWMedgeevent.Dependingonwhethertheedgeisrisingorfalling,oneofthetransitionsonthecomplementaryoutputsisdelayeduntilthetimercountsdowntozero.AtimingdiagramindicatingthedeadtimeinsertionforthepairofPWMoutputsisshowninFigure8.Fig.8Dead-timeUnitBlockDiagramFig.9theWaveformsofPWMOutputsinComplementaryModeConclusionsInthispaper,wehavedesignedPWMmodulebasedonan8-bitMCUcompatiblewith8051family.Thedesigncangenerate2-channelprogrammableperiodicPWMsignalswithtwooperationmode,IndependentModeandComplementaryModeinwhichdead-timewillbeinserted.ThesimulationresultsontheEDAplatformhaveprovenitscorrectnessandusefulness.AcknowledgmentsTheauthorswouldliketothankShanghaiLeadingAcademicDisciplineProject(ProjectNumber:T0103)forthefinancialsupport.References1.Xianghui-fangandHuyue-li,Computermeasurementandcontrol,14(7)p.942(2006)2.Huyue-lia