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The Application of Phase locked Loop Frequency Tracking in the Intelligence type Induction Heating Power Supply Yanfang Li1 a 1Yulin University Shaanxi province China alyf xiang Keywords Induction heating power supply Frequency tracking Phase locked loop Abstract As the induction heating power was working its load resonant frequency constantly changes In order to improve the efficiency of power supply it requires that the inverter output frequency can follow changes in natural frequency of the load namely the frequency tracking control Aiming at the deficiency of the frequency tracking control system this paper presents a method that the phase locked loop PLL tracking system works on real time control of the output frequency of the power supply and introduces a phase locked mathematical model which fits the inverter power supply and offers a simulated analysis by using PSPICE Through experiments the system proves to be good at frequency tracking Introduction Induction heating power supply in the process of heating due to the load factors such as temperature and melt furnace has charged load equivalent parameters changed causing the load inherent resonant frequency changed 1 In order to make the inverter in the power factor was close or equal to 1 quasi resonant or work under the resonant state phase locked loop was adopted in induction heating power supply frequency tracking technology 2 The basic principle of PLL frequency tracking and mathematical model The basic composition and principle of the PLL Phase locked frequency tracking loop is a phase of negative feedback control system 3 As shown in figure 1 it consists phase discriminator PD loop filter LPF and voltage control oscillator VCO of three basic parts Fig 1 The basic parts of a phase locked loop The working principle of phase locked loop First of all set the input signal angular frequency s 1 of Ui t is equal to 0 but the 0 is center frequency of VCO namely the frequency was when the control voltage Uc t 0 At this time Phase te is zero so the output of the phase discriminator is zero the output of the low pass filter is must be zero Therefore the output frequency of the VCO must be the center frequency Applied Mechanics and Materials Vols 541 542 2014 pp 445 451 Online available since 2014 Mar 12 at 2014 Trans Tech Publications Switzerland doi 10 4028 All rights reserved No part of contents of this paper may be reproduced or transmitted in any form or by any means without the written permission of TTP ID 117 43 17 121 National Cheng Kung University Tainan Taiwan 17 04 14 08 34 57 If the Ui t of the input signal s frequency is not equal 0 the output of the phase discriminator can produce non zero Ud t low pass filter will produce output signal Uc t This will reduce the center frequency of the VCO to differ in the direction of change Now assume that the frequency of the input signal at t0 time mutation the phase of input signal began from the phase of the output signal the two will produce a phase difference and increases with time At this point the output signals generated by phase discriminator Ud t also increases with time After filtering circuit delay Uc t also increases which makes the frequency of the VCO is raised phase difference decreases After a period of time the output frequency of the VCO will be precisely equal to the frequency of input signal its final phase difference whether reduced to zero or not it depends on the type of loop filter circuit to be used Mathematical model Phase locked loop mathematical model of the basic block diagram is shown in figure 2 Figure in Kd is phase discriminator sensitivity Kv is voltage controlled oscillator sensitivity F s is the loop filter transfer function 1s 2 s se Fig 2 Phase locked loop frequency domain model of the linear phase The phase detector PD is a proportional part its transfer function Gl s Kd 1 Loop filter belong to additional components its structure and parameter is unknown the transient G2 s to represent its transfer function According to the feedback control theory when the open loop transfer function is H system with good performance So can design for loop filter transfer function S S SFSG 1 2 2 1 2 In formula 2 111 CR 122 CR Voltage controlled oscillator VCO is a voltage and frequency conversion device its oscillation frequency as the input control voltage Uc t linear change Its instantaneous angular frequency v t controlled by Uc t for the control voltage make its frequency to be near the frequency of the input signal until the frequency difference disappeared the loop lock Angular frequency of the vco voltage characteristic is shown in figure 3 Figure on the center frequency is no vco control voltage Uc t 0 and 0 only when the bias of the oscillation frequency 0 known as the natural oscillation frequency v t with 0 as the center in a larger scope change v t should be Uc t into a linear relationship In the linear range the control characteristics represented by the following equation v t 0 Kv Uc t 3 Type in the Kv is a voltage controlled oscillator characteristic curve of the slope which represents the unit control voltage can make the angular frequency changes the size of the voltage controlled oscillator So is also known as voltage controlled oscillator control sensitivity unit is radians s v 446Engineering and Manufacturing Technologies Fig 3 Angular frequency of the vco voltage characteristic In the phase lock loop PLL from the point of view of phase characteristics voltage controlled oscillator output work on phase discriminator is not instantaneous angular frequency but its instantaneous phase The instantaneous phase can be obtained integration by formula 3 dtttdtt cvov UK 4 namely dttUKt cvo t 5 but in order to 0t as a reference of the output instantaneous phase dttt cvo UK 6 In frequency domain are represented as s s k s c v o U 7 So the transfer function of the voltage controlled oscillator VCO as s k s s s v e o U G 8 In formula 0 t is a output instantaneous phase with 0t as a reference Phase locked loop can be expressed as linear circuits of the basic equation tst ts 1evde SFKK 9 The open loop transfer function as 2 1 2dvv d s s1kk 1 s k s kso FG 10 The closed loop transfer function as s1kks s1kk s 2dv 2 1 2dv G 11 According to the mathematical model of phase locked loop and the system to the specific requirements of the phase locked loop below we will construct reasonable phase locked loop simulation model under Pspice software determine the reasonable system parameters make it has faster response speed and small steady state difference The establishment of the simulation modeling of PPL In Pspice software and simulation software there is no ready made model is available in order to realize the basic function of phase locked loop we must construct reasonable simulation model Applied Mechanics and Materials Vols 541 542447 The establishment of the simulation model of phase discriminator Fig 4 The simulation model of voltage type discriminator phase discriminator Figure 4 is a simulation model of the voltage type discriminator phase discriminator circuit the phase discriminator output is close to the Vm dc voltage error Figure 5 as waveform diagram for their work Fig 5 Working circuit waveform voltage type discriminator phase diagram The simulation model of the loop filter The loop filter LPF is an important part of the phase locked loop circuit the basic frequency is determined by the loop filter As shown in figure 6 active filter is the most close to the ideal filter from the perspective of an ideal simulation results the simulation using active proportional integral filter which have two independent adjustable parameters and lag advanced features its good at the stability of the loop Fig 6 Active proportional integral filter The simulation model of the voltage controlled oscillator In this paper we use the method of macro model to establish the simulation model of VCO 5 From the formula 8 visible voltage controlled oscillator in phase lock loop PLL is an ideal integral role Output voltage Vout voltage controlled oscillator can be expressed as tVV oooout tcos 12 In formula 12 Vo is amplitude of output signal of the voltage controlled oscillator 0 is angular frequency of the natural vibration voltage controlled oscillator t o is a phase which was 448Engineering and Manufacturing Technologies voltage controlled oscillator output signal with its inherent oscillation frequency with 0 t instantaneous as a reference dt t t oCV UK 13 Form the formula 12 and 13 Vout can be expressed as dt t tf2cos ooout CV UKVV 14 According to the formula 14 simulation model of VCO is constructed in the Pspice software As shown in figure 7 Fig 7 VCO simulation model The structure of the simulation model of phase locked loop Considering the complexity of the phase lock loop PLL Pspice software can be in phase discriminator PD and the voltage controlled oscillator VCO of sub circuit modular can get the model diagram of phase locked loop as shown in figure 8 Fig 8 The model diagram of phase locked loop Among them V1 is input square wave signals frequency f My PD is phase discriminator module its circuit as shown in figure 4 My VCO is voltage controlled oscillator VCO module its circuit as shown in figure 7 The Pspice simulation of Phase locked loop In the phase locked loop design process the specific parameters mainly include 12v K etc A mathematical model expression based on low pass filter is formula S S SFSG 1 2 2 1 111 CR CR2 2 Set the input signal frequency is f free oscillation frequency of the vco is f0 Phase locked loop simulation waveform is shown in figure 9 the solid line shows the input signal Ui dashed lines stands output signal Uo of VCO Applied Mechanics and Materials Vols 541 542449 Fig 9 a f f0 1MHz Fig 9 b f 1 1MHz f0 1MHz Fig 9 c f 0 9MHz f0 1MHz As can be seen from the figure 9 a when f f0 1 MHz due to the input signal frequency and voltage controlled oscillator frequency is consistent PLL implementation phase capture and finally realize the input and output has no difference capture time is about 6s As can be seen from the figure 9 b when f 1 1 MHz f0 1 MHz due to the input signal frequency and the feedback signal with 0 1 MHz frequency offset loop frequency capture first when the feedback signal steady at 1 1 MHz phase lock loop into the area the phase also finally reached the agreement between the two signals Capture time of about 20s As can be seen from the figure 9 c f 0 9 MHz f0 1 MHz due to the input signal frequency and the feedback signal with 0 1 MHz frequency offset loop frequency capture first when the feedback signal steady at 0 9 MHz phase lock loop into the area the phase also finally reached the agreement between the two signals Capture time of about 20s 450Engineering and Manufacturing Technologies Summary In this paper the phase locked loop frequency tracking control circuit was studied 6 The main contents include Phase locked loop simulation model is established and Pspcie simulation Design of frequency tracking circuit of induction heating power supply reasonable choice of various components reasonable matching circuit parameters make its can
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