OV9650寄存器配置详解.doc

OV9650寄存器配置之YUV Setting：*VGA mode*write_SCCB(0x12, 0x80); /CommonControl；Reset all registers to default valueswrite_SCCB(0x11, 0x81); /Data Format and Internal Clock；Enable double clock option, /meaning the maximum PCLK can be as high as input clock; /Internal clock pre-scalar=00001write_SCCB(0x6b, 0x0a); /DBLV,Reservedwrite_SCCB(0x6a, 0x3e); /Manual Banding Filter Value(effective only when COM110 is high)write_SCCB(0x3b, 0x09); write_SCCB(0x13, 0xe0);write_SCCB(0x01, 0x80);write_SCCB(0x02, 0x80);write_SCCB(0x00, 0x00);write_SCCB(0x10, 0x00);write_SCCB(0x13, 0xe5);/write_SCCB(0x39, 0x43);/50 for30fpswrite_SCCB(0x38, 0x12);/92 for30fpswrite_SCCB(0x37, 0x00);write_SCCB(0x35, 0x91);/81 for30fpswrite_SCCB(0x0e, 0x20);write_SCCB(0x1e, 0x04);/write_SCCB(0xa8, 0x80);write_SCCB(0x12, 0x40);write_SCCB(0x04, 0x00);write_SCCB(0x0c, 0x04);write_SCCB(0x0d, 0x80);write_SCCB(0x18, 0xc6);write_SCCB(0x17, 0x26);write_SCCB(0x32, 0xad);write_SCCB(0x03, 0x00);write_SCCB(0x1a, 0x3d);write_SCCB(0x19, 0x01);write_SCCB(0x3f, 0xa6);write_SCCB(0x14, 0x2e);write_SCCB(0x15, 0x02);write_SCCB(0x41, 0x02);write_SCCB(0x42, 0x08);/write_SCCB(0x1b, 0x00);write_SCCB(0x16, 0x06);write_SCCB(0x33, 0xe2);/c0 forinternalregulatorwrite_SCCB(0x34, 0xbf);write_SCCB(0x96, 0x04);write_SCCB(0x3a, 0x00);write_SCCB(0x8e, 0x00);/write_SCCB(0x3c, 0x77);write_SCCB(0x8b, 0x06);write_SCCB(0x94, 0x88);write_SCCB(0x95, 0x88);write_SCCB(0x40, 0xc1);write_SCCB(0x29, 0x3f);/2fforinternalregulatorwrite_SCCB(0x0f, 0x42);/write_SCCB(0x3d, 0x92);write_SCCB(0x69, 0x40);write_SCCB(0x5c, 0xb9);write_SCCB(0x5d, 0x96);write_SCCB(0x5e, 0x10);write_SCCB(0x59, 0xc0);write_SCCB(0x5a, 0xaf);write_SCCB(0x5b, 0x55);write_SCCB(0x43, 0xf0);write_SCCB(0x44, 0x10);write_SCCB(0x45, 0x68);write_SCCB(0x46, 0x96);write_SCCB(0x47, 0x60);write_SCCB(0x48, 0x80);write_SCCB(0x5f, 0xe0);write_SCCB(0x60, 0x8c);/0cforadvanced AWB(related to lens)write_SCCB(0x61, 0x20);write_SCCB(0xa5, 0xd9);write_SCCB(0xa4, 0x74);write_SCCB(0x8d, 0x02);write_SCCB(0x13, 0xe7);/write_SCCB(0x4f, 0x3a);write_SCCB(0x50, 0x3d);write_SCCB(0x51, 0x03);write_SCCB(0x52, 0x12);write_SCCB(0x53, 0x26);write_SCCB(0x54, 0x38);write_SCCB(0x55, 0x40);write_SCCB(0x56, 0x40);write_SCCB(0x57, 0x40);write_SCCB(0x58, 0x0d);/write_SCCB(0x8c, 0x23);write_SCCB(0x3e, 0x02);write_SCCB(0xa9, 0xb8);write_SCCB(0xaa, 0x92);write_SCCB(0xab, 0x0a);/write_SCCB(0x8f, 0xdf);write_SCCB(0x90, 0x00);write_SCCB(0x91, 0x00);write_SCCB(0x9f, 0x00);write_SCCB(0xa0, 0x00);write_SCCB(0x3a, 0x01);/write_SCCB(0x24, 0x70);write_SCCB(0x25, 0x64);write_SCCB(0x26, 0xc3);/write_SCCB(0x2a, 0x00);/10 for50Hz? / Dummy Pixel Insert MSB / Bit6:4: 3 MSB for dummy pixel insert in horizontal direction/Bit3:2: HSYNC falling edge delay 2 MSB/Bit1:0: HSYNC rising edge delay 2 MSBwrite_SCCB(0x2b, 0x00);/40 for50Hz? / Dummy Pixel Insert LSB/8 LSB for dummy pixel insert in horizontal direction/gammawrite_SCCB(0x6c, 0x40); /GSP; 6C-7B: Gamma curve(Gamma曲线)write_SCCB(0x6d, 0x30);write_SCCB(0x6e, 0x4b);write_SCCB(0x6f, 0x60);write_SCCB(0x70, 0x70);write_SCCB(0x71, 0x70);write_SCCB(0x72, 0x70);write_SCCB(0x73, 0x70);write_SCCB(0x74, 0x60);write_SCCB(0x75, 0x60);write_SCCB(0x76, 0x50);write_SCCB(0x77, 0x48);write_SCCB(0x78, 0x3a);write_SCCB(0x79, 0x2e);write_SCCB(0x7a, 0x28);write_SCCB(0x7b, 0x22);write_SCCB(0x7c, 0x04); /GST; 7C-8A: Gamma curvewrite_SCCB(0x7d, 0x07);write_SCCB(0x7e, 0x10);write_SCCB(0x7f, 0x28);write_SCCB(0x80, 0x36);write_SCCB(0x81, 0x44);write_SCCB(0x82, 0x52);write_SCCB(0x83, 0x60);write_SCCB(0x84, 0x6c);write_SCCB(0x85, 0x78);write_SCCB(0x86, 0x8c);write_SCCB(0x87, 0x9e);write_SCCB(0x88, 0xbb);write_SCCB(0x89, 0xd2);write_SCCB(0x8a, 0xe6);*SXGA mode*write_SCCB(0x12, 0x80); / Reset all registers to default values;write_SCCB(0x11, 0x80); /Data Format and Internal Clock；Enable double clock option, /meaning the maximum PCLK can be as high as input clock; /Internal clock pre-scalar=00000write_SCCB(0x6b, 0x0a); /Reservedwrite_SCCB(0x6a, 0x41); /Manual Banding Filter Value(effective only when COM110is high)write_SCCB(0x3b, 0x09); /light mode disable; /Average calculation window option: Use half frame/Manual banding filter modeCOM11write_SCCB(0x13, 0xe0); /Enable fast AGC/AEC algorithm /Unlimited AEC step size /Banding filter ONwrite_SCCB(0x01, 0x80); /AWB-Blue channel gain setting:80write_SCCB(0x02, 0x80); /AWB-Red channel gain setting:80write_SCCB(0x00, 0x00); /AGC7:0-Gain control gain setting:00write_SCCB(0x10, 0x00); /Exposure Value AEC9:2:00write_SCCB(0x13, 0xe5); /AGC enable; AEC enable/write_SCCB(0x39, 0x43);/50 for15fps?/ (Line buffer power down-must be set to 1 before chip power down)write_SCCB(0x38, 0x12);/93 for15fps? /ACOM; Reservedwrite_SCCB(0x37, 0x00); /ADC; Reservedwrite_SCCB(0x35, 0x91); /81 for15fps? /RSVD; Reservedwrite_SCCB(0x0e, 0x20); /Master mode /Bit7: system clock selection. If the system clock is 48MHz, this bit /should be set to high to get 15fps for YUV or RGBwrite_SCCB(0x1e, 0x04); /Mirror/VFlip Enabe: Normal image, VFlip disable/write_SCCB(0xa8, 0x80); /ACOM; Reservedwrite_SCCB(0x12, 0x00); /COM7; SCCB Register no changewrite_SCCB(0x04, 0x00); /COM1; do nothing(HREF No Skip)write_SCCB(0x0c, 0x00); /COM3; do nothingwrite_SCCB(0x0d, 0x00); /COM4; Tri-state for output clock and data at power-down periodwrite_SCCB(0x18, 0xbd); /HSTOP; Output format/Horizontal Frame(HREF column) end high 8-bit(low 3 bits are at HREF5:3)write_SCCB(0x17, 0x1d); /HSTART; Output format/Horizontal Frame(HREF column) end high 8-bit(low 3 bits are at HREF2:0)write_SCCB(0x32, 0xad); /HREF Control /Bit7:6: HREF edge offset to data output /Bit5:3: HREF end 3 LSB(high 8 MSB at register HSTOP) /Bit2:0: HREF start 3 LSB(high 8 MSB at register HSTART)write_SCCB(0x03, 0x12); /Vertical Frame Control /Bit7:6: AGC9:8 (see register GAINfor AGC7:0)/Bit5:3: VREF end low 3 bits (high 8 bits at VSTOP7:0/Bit2:0: VREF start low 3 bits (high 8 bits at VSTRT7:0 write_SCCB(0x1a, 0x81); /VSTOP; Output Format /Vertical Frame (row) end high 8-bit (low 3 bits are at VREF5:3)write_SCCB(0x19, 0x01); /VSATRT; Output Format /Vertical Frame (row) start high 8-bit (low 3 bits are at VREF2:0)write_SCCB(0x14, 0x2e); /COM9; Automatic Gain Ceiling-maximum AGC value:8x /Exposure timing can be less than limit of banding filter when light is to strong /Data format-VSYNC will drop when frame data drops /Enable drop frame when AEC step is larger than the Exposure Gapwrite_SCCB(0x15, 0x00); /COM10; PCLK always outputwrite_SCCB(0x3f, 0xa6); / Edge Enhancement Adjustment/Bit7:4: Edge enhancement threshold3:0/(see register COM227:6 for Edge threshold5:4)/Bit3:0: Edge enhancement factorwrite_SCCB(0x41, 0x02); /COM16; Color matrix coefficient double optionwrite_SCCB(0x42, 0x08); /COM17; do nothing/write_SCCB(0x1b, 0x00); / Data Format /Pixel Delay Select (delays timing of the D9:0 data relative to HREF in pixel units)/ Range: 00 (no delay) to FF (256 pixel delay which accounts for whole array)write_SCCB(0x16, 0x06); /Reservedwrite_SCCB(0x33, 0xe2);/c0 forinternalregulator?/Reservedwrite_SCCB(0x34, 0xbf); /Reservedwrite_SCCB(0x96, 0x04); /Reservedwrite_SCCB(0x3a, 0x00); /Line Buffer Test Option /Use normal UV output /Output sequence is Y U Y V /Digital BLC disablewrite_SCCB(0x8e, 0x00); /Reserved/write_SCCB(0x3c, 0x77); /No HREF when VREF is low /Enable UV averagewrite_SCCB(0x8b, 0x06); /Reservedwrite_SCCB(0x94, 0x88); /Reservedwrite_SCCB(0x95, 0x88); /Reservedwrite_SCCB(0x40, 0xc1); /Data format-output full range enable:00toFF /RGB 555/565 option(must set COM72high):Normal RGB outputwrite_SCCB(0x29, 0x3f); /fforinternalregulator? /Analog BLC and Regulator Control /Bypass Analog BLC /Bypass regulatorwrite_SCCB(0x0f, 0x42); /Disable HREF at optical black /Use 4-channel ADBLC /Reset all timing when format changes/write_SCCB(0x3d, 0x92); /Gamma used for Raw data before interpolation /Enable color matrix for RGB or YUV /Delay UV channel, output UV delay2:0=0x02write_SCCB(0x69, 0x40); /HV, Manual Banding Filter MSB , do nothingwrite_SCCB(0x5c, 0xb9); /Reservedwrite_SCCB(0x5d, 0x96); /Reservedwrite_SCCB(0x5e, 0x10); /Reservedwrite_SCCB(0x59, 0xc0); /Reservedwrite_SCCB(0x5a, 0xaf); /Reservedwrite_SCCB(0x5b, 0x55); /Reservedwrite_SCCB(0x43, 0xf0); /Reservedwrite_SCCB(0x44, 0x10); /Reservedwrite_SCCB(0x45, 0x68); /Reservedwrite_SCCB(0x46, 0x96); /Reservedwrite_SCCB(0x47, 0x60); /Reservedwrite_SCCB(0x48, 0x80); /Reservedwrite_SCCB(0x5f, 0xe0); /Reservedwrite_SCCB(0x60, 0x8c);/0cforadvanced AWB(Related to lens)? /Reservedwrite_SCCB(0x61, 0x20); /Reservedwrite_SCCB(0xa5, 0xd9); /Reservedwrite_SCCB(0xa4, 0x74); /Reservedwrite_SCCB(0x8d, 0x02); /Color gain optin:Digitalwrite_SCCB(0x13, 0xe7); /Enable fast AGC/AEC algorithm /AEC-Step size limit: Unlimited step size /Banding filter ON /AGC enable; AWB enable; AEC enable/write_SCCB(0x4f, 0x3a); /Matrix Coefficient 1write_SCCB(0x50, 0x3d); /Matrix Coefficient 2write_SCCB(0x51, 0x03); /Matrix Coefficient 3write_SCCB(0x52, 0x12); /Matrix Coefficient 4write_SCCB(0x53, 0x26); /Matrix Coefficient 5write_SCCB(0x54, 0x38); /Matrix Coefficient 6write_SCCB(0x55, 0x40); /Matrix Coefficient 7write_SCCB(0x56, 0x40); /Matrix Coefficient 8write_SCCB(0x57, 0x40); /Matrix Coefficient 9write_SCCB(0x58, 0x0d); /Matrix Coefficient Sign for coefficient 9 to 2/write_SCCB(0x8c, 0x23); /Edge enhancement threshold5:4/(see register EDGE7:4 for Edge threshold3:0)/De-noise enable(去噪)/White-pixel erase enable/White-pixel erase option: bit0=1write_SCCB(0x3e, 0x02); /Enable edge enhancement for YUV output /(effective only for YUV/RGB, no use for Raw data) /Edge enhancement factor = EDGE3:0write_SCCB(0xa9, 0xb8); /Reservedwrite_SCCB(0xaa, 0x92); /Reservedwrite_SCCB(0xab, 0x0a); /No this register!/write_SCCB(0x8f, 0xdf); / Bit3: Digital BLC B offset sign/ Bit2: Digital BLC R offset sign/ Bit1: Digital BLC Gb offset sign/ Bit0: Digital BLC Gr offset signwrite_SCCB(0x90, 0x00); /Digital BLC B Channel Offset Value7:0=0x00write_SCCB(0x91, 0x00); /Digital BLC R channel offset value Bit7:0=0x00write_SCCB(0x9f, 0x00); /Digital BLC Gb channel offset value Bit7:0=0x00write_SCCB(0xa0, 0x00); /Digital BLC Gr channel offset value Bit7:0=0x00write_SCCB(0x3a, 0x01); /Digital BLC enable/write_SCCB(0x24, 0x70); /AGC/AEC-Stable Operating Region(Upper Limit)write_SCCB(0x25, 0x64); /AGC/AEC-Stable Operating Region(Lower Limit)write_SCCB(0x26, 0xc3); / AGC/AEC Fast Mode Operating Region/Bit7:4: High nibble of upper limit/Bit3:0: High nibble of lower limit/write_SCCB(0x2a, 0x00);/10 for50Hz? / Dummy Pixel Insert MSB / Bit6:4: 3 MSB for dummy pixel insert in horizontal direction/Bit3:2: HSYNC falling edge delay 2 MSB/Bit1:0: HSYNC rising edge delay 2 MSBwrite_SCCB(0x2b, 0x00);/34 for50Hz? / Dummy Pixel Insert LSB/8 LSB for dummy pixel insert in horizontal direction/gammawrite_SCCB(0x6c, 0x40); /GSP; 6C-7B: Gamma curve(Gamma曲线)write_SCCB(0x6d, 0x30);write_SCCB(0x6e, 0x4b);write_SCCB(0x6f, 0x60);write_SCCB(0x70, 0x70);write_SCCB(0x71, 0x70);write_SCCB(0x72, 0x70);write_SCCB(0x73, 0x70);write_SCCB(0x74, 0x60);write_SCCB(0x75, 0x60);write_