IMX6硬件设计指南与硬件启动ppt课件.ppt

i MXHWDesignGuideandBoardBringUpFAE LindaLin Consolidatedbyi MXFAE Draftver0 2 Aug 6 2014 Topics 1 i MX6HWDesignReferenceBoard gothroughschematicofi MX6SDP 2 i MX6HardwareDevelopmentGuide IMX6DQ6SDLHDG pdf 3 i MXHWCheckingList Excelfileofi MX6HWDesignCheckingList 4 i MX6XPowerdesign5 DDRCalibrationandStressTest 6 IOMuxTool7 i MX6XHardwarebringup i MX6HWDesignReferenceBoard RelatedHardwarematerials SABRESDP DESIGNFILES zip SABRE AI DESIGNFILES zip SDP AIboardschematic layout IMX6DQ6SDLHDG pdf i MX6Xhardwaredesignguide includeschematic layoutcheckpoints iomuxtools bringup IBIS BSDL RMIIinterface IMX6DQ DLS A I CEC pdf i MX6XDatasheet includechipsetelectricalCharacteristicslikethevoltagerange MaxcurrentandPowersequence IMX6DQ DLS RM pdf i MX6XChipsetreferencemanual AN4509 i MX6DQPowerConsumptionMeasurement AN4576 i MX6DLSPowerConsumptionMeasurement IMX6 IOMUX TOOL iomuxconfigurationtools Mfgtools Rel 4 1 0 130816 MX6Q UPDATER tar gz MFGtools L3 0 35 4 1 0 130816 images MX6 tar gz linuxdemoimage HWDesignCheckingListfori Mx6Rev2 6 xlsx i MX6Xhardwarechecklist downloadfrom i MX6ReferenceSolutionRelatedMaterial Select SABREPlatformforSmartDevices HardwareMaterial Schematic PCB Gerber etc SABREBoardforSmartDevices SDB i MX6Quad1GhzCortex A9ProcessorCanbeconfiguredasi MX6DualFreescaleMMPF0100PMIC1GBDDR3memory nonterminated 3 x7 8 layerPCBDisplayconnectors2xLVDSconnectorsConnectorfor24bit4 3 800 x480WVGAwith4 wiretouchscreenHDMIConnectorAudioWolfsonAudioCodecMicrophoneandheadphonejacksExpansionConnectorCameraCSIportsignalsI2C SSI SPIsignals Connectivity2xFull sizeSD MMCcardslot22 pinSATAconnector10 100 1000Ethernetport1xhigh speedUSBOTGportmPCI econnectorDebugJTAGconnectorSerialtoUSBconnectorAdditionalFeatures3 axisFreescaleacceleCompassPowersupplyNobatterychargerOSSupportLinuxandAndroidJBfromFreescale Others supportby3rdparties ToolsSupportLauterbach ARM DS 5 Macraigordebug IDEtoolchain PartNumbers MCIMX6Q SDB 399 Display 9 7 MCIMX LVDS1 499 Display 4 3 MCIMX28LCD 199 SABREPlatformforSmartDevices SDP i MX6Quad1GHzCortex A9Processori MX6DualLite1GHzCortex A9ProcessorFreescaleMMPF0100PMIC1GBDDR3memory nonterminated 3 x7 8 layerPCBDisplayconnectorsNative1024x768LVDSdisplay comeswithkit 2ndLVDSconnectorConnectorfor24bit4 3 800 x480WVGAwith4 wiretouchscreenHDMIConnectorMIPIDSIconnectorAudioWolfsonAudioCodecMicrophoneandheadphonejacksDual1WSpeakersExpansionConnectorEnablesparallelLCDorHDMIoutputCameraCSIportsignalsI2C SSI SPIsignals Connectivity2xFull sizeSD MMCcardslot22 pinSATAconnector10 100 1000Ethernetport1xhigh speedUSBOTGportmPCI econnectorDebugJTAGconnectorSerialtoUSBconnectorAdditionalFeatures3 axisFreescaleaccelGPSreceiverAmbientLightSensoreCompassDual5MPCamerasPowersupplyBatteryChargerBatteryconnectorsOSSupportLinuxandAndroidJBfromFreescale Others supportby3rdparties ToolsSupportLauterbach ARM DS 5 Macraigordebug IDEtoolchain PartNumbers MCIMX6Q SDP 999 MCIMX6DL SDP 999 Display 4 3 MCIMX28LCD 199 WiFi SilexWiFimodule SABREPlatformforAutomotiveInfotainment AI PowerandMemoryFreescaleMMPF0100PMIC2GBDDR3memory i MX6Dual Quad 1GBDDR3memory i MX6Solo 32GBParallelNORFlashNANDSocketDisplayLVDSconnectorcompatiblewithMCIMX LVDS1ParallelRGBdisplayinterfaceHDMIoutputconnectorDebugJTAGconnectorDebugUARTconnectorConnectivityandExpansionSDCardSlotHighSpeedUSBOTGEthernetSATAMIPICSIPCIeMLB150INICconnector281 pinMXMcardedgeconnectorformainboardexpansion Canbereusedfromi MX53SABREAIConnectivityandExpansionSDcardslot WiFimoduleorSD BluetoothorBluetooth WiFiheaderAM FMtunerheaderSiriusXMModuleheader de pop d GPS UART moduleconnector2xCANDualHighSpeedUSBHostconnectorsMLB25 50INICconnectorSPINORflashDisplayI OLVDSconnectorcompatiblewithMCIMX LVDS1AnalogVideoInputLVDSInputAudioCirrusmultichannelaudiocodecUpto8outputsDualmicrophoneinputsStereoLineLevelInputSPDIFreceiverOSSupportLinuxOthers futuresupportby3rdparties CPUCardDetails BaseBoardDetails PartNumbers BaseBoard MCIMXABASEV1 699 CPUCards MCIMX6SAICPU1 799 MCIMX6QAICPU1 799 Display MCIMX LVDS1 499 i MX6SMARTDEVICESYSTEMBlockDiagram i MX6SMARTDEVICESYSTEMSchematic Here openi MX6SabreSDSchematic gothroughit i MX6HardwareDevelopmentGuide Suggestion Pre design Studythedatasheet powerconsumption schematictounderstandourchipsetrequirement In design Checkthehardwaredesignguide iomuxtoolsAfter design FilltheHWdesigncheckinglist providetheiomuxdatatosoftware Hardware bringup Checkthepower powersequence clock reset providethebootconfigurationtosoftware runddrtest Debugport SuggesttohaveUSBOTGPort Forimageprogram YoucanuseitasUSBhostport noproblem MFGjustuseUSBdevicemode Debugserialport i MX6Xubootcanchangetosupporteveryserialportasdebugport Sdcardslot SuggesttokeepatleastoneSdcardslot itwillhelptousetheSdcardboot whichcanburnimagedirectlyfromPCtoSdcard NoneedtodebugtheMFGkernel Jtag optional SuggesttousetheGPIOBoot cfgbutnotthefuseBoot cfg Andbootmodepincanbepulled becausewecanusethenon imageboottoenterthedownloadmode i MX6HardwareDevelopmentGuide Here open gothroughit 1 DesignChecklist2 i MX6SeriesLayoutRecommendations3 RequirementsforPowerManagement4 AvoidingBoardBring upProblems i MXHWCheckingList i MXHWCheckingList Here open gothroughit i MX6XPowerdesign i MX6PowerRelateddoc IMX6DQCEC pdf i MX6Dual 6QuadApplicationsProcessorsforConsumerProductsAN4509 pdf i MX6Dual 6QuadPowerConsumptionMeasurementIMX6SDLCEC pdf i MX6Solo 6DualLiteApplicationsProcessorsforConsumerProductsAN4576 pdf i MX6DualLitePowerConsumptionMeasurementSDPschematic PF0100 SPF 27392 pdfSaberliteschematic DiscreteDCDC fromboundarydevices IMX6DQ6SDLHDG pdf optional DesignChecklist Table2 6 Poweranddecouplerecommendations PowerSupply andCommonHardwareDesign i MX6System PowerDesignConsiderations SystemPowerRequirements oneachpowerrail MaxCurrentrequirementVoltagerangeSystemOver VoltageProtectionPowerOnSequencingSystemcontrolfunctionsLayout decouple i MX6PowerRailRequirements ToFunctionproperly thei MX6Processorrequiresninedifferentpowerrails Somemaybecombined VDDARMPowertoARMCoresAllowedvoltage 0 9V 1 5VVDDSOCVPPowertoonchipSystemPeripherals VDDSOC CAP HDMIPHY SATAPHY PCIEPHY ARMCoreCachePowertoImageprocessingmodules VDDPU CAP VPU GPU2D GPU3D OpenVGAllowedvoltage 0 9V 1 5V i MX6PowerRailRequirements con VDDHIGHVPHPowertoonchipSystemPeripherals VDDHIGH CAP MIPI HDMI SATA PCIE LVDS USB PLLsPowertomiscPeripherals NVCC PLL OUT USD PLLs 24MHzOsc SharedpowerofSNVSmoduleAllowedvoltage 2 7V 3 3VVSNVS32KHzOscillatorandSRTCfunctionsSharedpowerofSNVSmoduleAllowedvoltage 2 8V 3 3V i MX6PowerRailRequirements con USB H1 OTG VBUSPowertoUSBPHYAllowedvoltage 4 4V 5 25VNVCC DRAMPowersupplyforDRAMmemoryAllowedvoltage 1 14V 1 575V DependsontypeDRAM EthernetIOpins NVCC RGMII Allowedvoltage 1 14 1 9VGeneralIOpins NVCC Typically1 8Vor3 3VAllowedvoltage 1 65V 3 6V i MX6PowerRailRequirements Summary Inatypicalapplication sixdifferentvoltagesarerequiredfortheprocessortofunction i MX6PowerRequirements VDDARM VDDSOC DatasheetMaxRequirementsforVDDARM 3920mADatasheetMaxRequirementsforVDDSOC 1890mATypicalMaximumCurrentRequirements AN4509 Showingthreeseparatevideooutputs1080pVideoplaybackHDMI1080pVideoplaybackIPUParallelport LCD 3DgraphicsthroughLVDSportVDDARM 1625mAVDDSOC 1250mA i MX6PowerRequirements VDDHIGH VSNVS DatasheetMaxRequirementsforVSNVS 300uAPullUpresistorsonVSNVSwilladdtocurrentrequirementsDatasheetMaxRequirementsforVDDHIGH 160mATypicalMaximumCurrentRequirements AN4509 VDDHIGH 85mA i MX6PowerRequirements DRAM IOPins DatasheetMaxRequirementsforDRAM 1900mATypicalMaximumCurrentRequirements AN4509 DRAM 1390mADatasheetrequirementsforIOPins use I A NxCxVx 0 5xF N NumberofIOpinssuppliedC Equivalentexternalcapacitiveload Farads V IOvoltage Volts 0 5xF Datachangerate whereF Frequency Hz Typical 2 3mAfora3 3Vpin SummaryPowerRequirements Maximumvaluesaremutuallyexclusive TypicalConsumerDevicePowerRequirements GrandTotalPowerRequirements i MX6System PowerDesignConsiderations TotalSystemPowerRequirementsTypicalSystemrequirements 5Vsource 2 9ATypicalSystemrequirements 3 7Vsource 4 1ASystemOver VoltageProtectionSelectPowercomponentswithhighvoltagetoleranceDesignOver Voltageprotectionsub systemUserbatterychargingcircuitwithprotection PowerOnSequencingSystemcontrolfunctionsStand by reducedpoweroptions i MX6System PowerOn OffSequencing PowerOnSequencingVDD SNVS IN VDDHIGH IN anyotherpowersupply FSLsuggestVDDHIGN INpowerwithVDD SNVS INorinstep2 VDDARM IN VDDSOC IN 1ms Vvddarm cap Vvddsoc cap 50mV IfVDDARM INandVDDSOC INareconnectedtodifferentexternalsupplysourcesPowerOffSequencingN ANotes Needtoensurethatthereisnobackvoltage leakage fromanysupplyontheboardtowardsthe3 3Vsupply forexample fromtheexternalcomponentsthatuseboththe1 8Vand3 3Vsupplies USB OTG VBUSandUSB H1 VBUSarenotpartofthepowersupplysequenceandmaybepoweredatanytime IMX6DQ6SDLHDG Table2 6 Poweranddecouplerecommendations VGEN5forVDDHIGH INandincreaseto3VtoalignwithdatasheetOnlyone22 Fbulkcapacitorshouldbeconnectedtoeachoftheseon chipLDOregulatoroutputs VDD ARM 23 SOC PU CAPasnearaspossiblewithpins vias Thedistanceshouldbelessthan50milbetweenbulkcapandVDD xx CAPpins ripplenoiseshouldbelessthan5 Vp pofsupplyvoltageaveragevalueNVCC LVDS2P5mustbepowered onevenwhennotusingtheLVDSinterfacebecauseTheDDRpre driverssharetheNVCC LVDS2P5powerrailwiththeLVDSinterface 33 i MX6Dual Quad 5vINPUT PFUSE100 SDP 34 i MX6Dual Quad 5vDiscretePower DevelopToolsDDRStressTest DDRStressTestTool WhatisDDRStressTesterkit Itisdownloadabletestapplicationarchitecture AprogramrunningonPC DDR Stress Tester exe whichrunningonCommandPromptwindow willdownloadthetestimagetotargetboard sIRAMwiththehelpofUART USBconnection ThetestimagewilldotheDDRstresstestandtheresultwillbesenttoPCthroughUART USBandbeprintedontheCommandPromptwindow Formx6dq mx6dlsormx6sl UARTisnotsupported Supportmx53 mx51 mx6dq mx6dlsandmx6sl DDRStressTestToolcont TestLogLink DevelopToolsIOMuxTool IOMUXTool ApplicationWindowOverview DownloadandInstalltheMicrosoft NETFramework4 0 SelectModulesandSignalsforBoard ChecktheUARTS UART1 UART2andUART3 ExpandallsignalsunderUART3 AccessingMuxed SignalInfo AccessingMuxed SignalInfo ResolveConflictingSignals SelectALT4 EIM D30 J20 forUART3 CTS SelectALT4 EIM D31 H21 forUART3 RTS SelectALT2 SD4 CLK E16 forUART3 RXD MUX SelectALT2 SD4 CMD B17 forUART3 TXD MUX AddingCommentsforClarity Right clicktheUART2 TXD MUXrowintheSignalstabtobringupthecontextmenu Clickingonthemenuwillbringupatextentryfieldwheretheusermayentertext AddingCommentsforClarity BallDiagramView Pads Spreadsheet View ConfiguringIOMUXCRegisters SelectUART3 RXD MUXintheleft handpane AlloftheIOMUXCRegistersassociatedwiththeAD4 CLK E16 padareshownontheRegistersTabintheright handpane DragaSignaltoanotherModule RenameSignaltoMatchSchematics CAN1ModulewithAllSignals Commentsauto generatedtodenoteoriginalModule Signal CodeReflectsAddedSignals BasicCodeStyleasaTooltip GenerateConfigurationCode SeveralCode StylesavailableintheCodeMenu ExamplesareshownintheUser sGuide Click GenerateCode tocreatethefilesforthecurrentdesign Tryit i MX6XHardwarebringup i MX6XHardwarebringup Doc Tools IMX6DQ6SDLHDG pdf Chapter8AvoidingBoardBring upProblems IMX6XRM pdf Chapter7SystemBoot Chapter60 SystemResetController SRC MFGtools DDRtesttools USBline 有源可限流电源 万用表 示波器 i MX6XHardwarebringup Step1目视检查 检查主要器件是否有错贴的情况 比如说二极管 三极管 有没有安装位置反向或旋转的问题 可以在PCBA时使用X光检查 有条件的使用BSDL检查来确认焊接与连线 i MX6XHardwarebringup Step2电源检查 使用万用表 先空板检查每个电源有没有对地短路的情况 使用限流电源上电 检查i MX6X每路电源的电压是否符合我们datasheet要求 量测电压是要求在电源输出端和i MX6X电源输入端 越近越好 如在滤波电容上量测 都量测一下 以避免IR跌落 VDD ARM SOC IN供给i MX6X内部逻辑电路 需要仔细检查 VDD SNVS IN NVCC JTAG NVCC DRAM也对正常启动很重要 NVCC LVDS2V5也供给了DDRI OPads 也必须要正常供给 i MX6X在各路电源稳定后 才能释放reset POR B 如前电源上电时序要求 检查上电时序 i MX6XHardwarebringup Step3时钟检查 一般在电源电压正确 无跌落 24Mhz和32K晶体会自动起振 可使用示波器量测这两个时钟 如果24Mhz不工作 则系统不能启动 如果外部没有32K 或32K不工作 则i MX6X会自动使用内部晶振 但根据newerrataIM6DQCERev 4 07 2014 ERR007926ROM 32kHzinternaloscillatortiminginaccuracymayaffectSD MMC NAND andOneNANDboot 由于内部romcode的GPT使用这个时钟 而GPT被用于外设访问中一些event和timeout控制 所以不稳定的时钟有可能导致romcodes读取外设失败 所以建议连接外部32K i MX6XHardwarebringup Step4准备bringup文档 一般硬件工程师需要准备三份文档描述板级设计电源文档 每一路电源的源 供给到 输出 输入电压 测量点 时序 如SDPschematic i MX6XHardwarebringup Step4准备bringup文档 IOMUX文档 可以使用iomux工具导出 也可以手动准备 内容最好包括 以方便软件工程师配置IOMUX 这个表应该至少包括所有数字管脚 软件工程师根据这个表来配置iomux文件 arch arm mach mx6 Board mx6q sabersd hstaticiomux v3 cfg tmx6q sabresd pads UART1fordebug MX6Q PAD CSI0 DAT10 UART1 TXD CSI0 DAT10为管脚名 UART1 TX会功能名 Notes 1i MX6X基本所有的可做为GPIO的pin在reset状态下都是iomux设为gpio gpio设为输入高阻 iopad设为100K上拉的 2i MX6X的datasheet中也列出了一些例外 Formostofthesignals thestateduringresetissameasthestateafterreset However therearefewsignalsforwhichthestateduringresetisdifferentfromthestateafterreset EIM A16 A25 EIM DA0 DA15 EIM EB1 EB3 EIM LBA RW WAIT GPIO 17 19 KEY COL0 请注意有一些pin是用于bootgpio的 i MX6XHardwarebringup Step4准备bringup文档 Boot Cfg文档 说明Boot cfg配置 以SDP的eMMCboot为例 i MX6XHardwarebringup Step4准备bringup文档 SDP的BootSelect为 所以eMMC启动的SBMR1 0Xxxx5860 i MX6XHardwarebringup Step5确认启动配置 i MX6X在上电正确 时钟正确 POR正确后 会首先执行内部的ROMcodes 这个ROMcodes 首先会读取SBMR2寄存器的值 来判断启动模式 如果为下载模式 则进入下载模式 如果为正常启动模式则会根据读取SBMR1寄存器的值来初始化相应启动设备的控制器 并尝试去读取相应设备上的镜像 并认证 如果认证成功 则根据镜像开头的数据结构来初始化外部DDR 然后将镜像拷贝到外存 并跳转到外存执行bootloader 如果镜像认证失败 则又进入下载模式 进入下载模式后 i MX6X会通过USBOTG口与hostPC联系 并报告为一个HID设备 所以从PC上可以看到一个USBHID设备信息 如果有这个信息报出 证明i MX6X的最小系统工作了 电源 时钟 POR 内部ROMcodes已经执行并进入了下载模式 如果我们已经设置为正常启动模式 并且配置boot cfg相应的GPIO 则可以使用示波器量测启动设备上相应的时钟 Nand CEpinfor