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折叠式级联运放的仿真,1,TheTypicalPerformanceofOp-Amp,Open-LoopDifferentialGain(AV)Common-modeRejectionRatio(CMRR)PowerSignalRejectionRatio(PSRR)PhaseMargin(PM)InputCommonModeRange(ICMR)OutputSwingRange(OSR)Input/OutputImpedance(CIN/ROUT)SlewRateNoise,2,TheSchematicofFoldedCascodeOp-Amp,InordertodeceasethepowerConsumption,IBIASisonly30nA.,3,CreateSchematicandSymbolinSpectre,Tocreateasymbolofaschematic:FromDesign-CreateCellview-FromCellview,4,Open-LoopDifferentialGain,DCSweepVP-VN(largesignal)ACSweepVP-VNwithfixedfrequency(smallsignal),TwomethodsofsimulatingOpen-LoopDifferentialGainisavailableinADE(AnalogDesignEnvironment),5,Test-BenchofOpen-LoopDifferentialGain(method1),DCSweepVP-VN(largesignal),Inthismethod,VP=VCM_IN+x,andVN=VCM_IN-xWhere,VCM_INisthecommonvoltage,xisadesignvariables.,SetupVN,SetupVP,6,ADEofOpen-LoopDifferentialGain(method1),ToaddamodelforthesimulationFromADE-Setup-Modellibraries,TocreateaDCSweepFromADE-Analyses-Choose-DC,7,WaveformofOpen-LoopDifferentialGain(method1),Where,DifferentialGainis71.56dB,ToobtainVCOM_OUTFromCalculator-SpecialFunctions-Value,VOUT-VCOM_OUT,ToobtainDCgainFromCalculator-SpecialFunctions-deriv,8,Test-BenchofOpen-LoopDifferentialGain(method2),ACSweepVP-VNwithfixedfrequency,SetupVN,SetupVP,Inthismethod,VP=VCM_IN+x+VAC,andVN=VCM_INWhere,VCM_INistheinputcommonvoltage,xisadesignvariables,VACisaACvoltageforACSweep.,9,ADEofOpen-LoopDifferentialGain(method2),ToaddamodelforthesimulationFromADE-Setup-Modellibraries,TocreateaACSweepFromADE-Analyses-Choose-AC,FixedFreq,10,WaveformofOpen-LoopDifferentialGain(method2),DifferentialGainis65.56dB,Theresultsofthetwomethodsaredifferent,Infact,method1ismoreaccurateforDCgain.,11,Common-modeRejectionRatio,Youcangetdetailillustrationfrom“CMOSAnalogCircuitDesign”,PhillipE.Allen,OxfordUniversityPress,Inc.,12,Test-BenchofCMRR,Where,VCOM_INistheinputcommonvoltage,VACisaACvoltageforACSweep.,13,ADEofCMRR,ToaddamodelforthesimulationFromADE-Setup-Modellibraries,TocreateaACSweepFromADE-Analyses-Choose-AC,14,WaveformofCMRR,1/CMRR,CMRR,ToobtainCMRR:FromCalculator-1/x,1/CMRRandCMRRplotdirectly.,15,WaveformofCMRR,ToobtainmagnitudePlotofCMRR:FromCalculator-dB20,FrequencyresponseofCMRRTheCMRRis72.14dBatlowfrequencyrange.,ToobtainphasePlotofCMRR:FromCalculator-phase,16,PowerSignalRejectionRatio,Youcangetdetailillustrationfrom“CMOSAnalogCircuitDesign”,PhillipE.Allen,OxfordUniversityPress,Inc.,17,Test-BenchofPSRR,Where,VACisaACvoltageforACSweep,andVDCisaDCvoltage,18,ADEofPSRR,ToaddamodelforthesimulationFromADE-Setup-Modellibraries,TocreateaACSweepFromADE-Analyses-Choose-AC,19,WaveformofPSRR,1/PSRR,PSRR,ToobtainCMRR:FromCalculator-1/x,1/PSRRandPSRRplotdirectly.,20,WaveformofPSRR,ToobtainmagnitudePlotofPSRR:FromCalculator-dB20,FrequencyresponseofPSRRTheCMRRis79.17dBatlowfrequencyrange.,ToobtainphasePlotofPSRR:FromCalculator-phase,21,PhaseMarginofOpen-loopfrequencyResponse,Where,VCM_INistheinputcommonvoltage,VACisaACvoltageforACSweep,AndCListheloadingcapacitor.,22,Test-BenchofPM,VCM_IN,VAC,ThedominantpoleiscontrolledbyCLinfoldedCascodeopamp.,23,ADEofPM,ToaddamodelforthesimulationFromADE-Setup-Modellibraries,TocreateaACSweepFromADE-Analyses-Choose-AC,24,WaveformofPM,ToobtainmagnitudePlotofopen-loop:FromCalculator-dB20,open-loopfrequencyresponseThePMis74owhenCLis5pf.,ToobtainphasePlotofopen-loop:FromCalculator-phase,Therehavetwopolesinopen-loopfrequencyresponse,oneisthedominantpoleofoutputnet,andtheanotheristhemirrorpolecausedbyactivecurrentmirror.,25,InputCommon-modeRange,Where,xisadesignvariablesandCListheloadingcapacitor.,26,Test-BenchofICMR,27,ADEofICMR,ToaddamodelforthesimulationFromADE-Setup-Modellibraries,TocreateaDCSweepFromADE-Analyses-Choose-DC,28,WaveformofICMR,ICMR,Theinputcommon-moderangeis04.2V,29,OutputSwingRange,Where,VCM_INistheinputcommonvoltage,xisadesignvariables.,ToobtainOSR,30,Test-BenchofOSR,DCSweepVP-VN,Inthismethod,VP=VCM_IN+x,andVN=VCM_IN-xWhere,VCM_INisthecommonvoltage,xisadesignvariables.,SetupVN,SetupVP,31,ADEofOSR,ToaddamodelforthesimulationFromADE-Setup-Modellibraries,TocreateaDCSweepFromADE-Analyses-Choose-DC,32,WaveformofOSR,Youcangettheleftwaveformfrompage8.,OSR,Theoutputswingrangeisfrom842.5mVto4.381V.,PS:OSRisdependenceofapplicationsandisnotconstant.,33,InputCapacitor,Where,VCM_INistheinputcommonvoltage,VACisACvoltageforACSweep.,34,Test-BenchofCIN,VCM_IN,VAC,35,ADEofCIN,ToaddamodelforthesimulationFromADE-Setup-Modellibraries,TocreateaACSweepFromADE-Analyses-Choose-AC,36,WaveformofCIN,Theinputcapacitorisapproximateof5pf,37,OutputResistance,Theschematicofobtainingopen-loopoutputresistanceRO.,TheequivalentmodelbyusingTheveninformOntheopamp.,Thus,simulatingROUTandknowingAVallowsonetocalculatetheoutputresistanceROoftheopamp.,38,Test-BenchofROUT,IOUT,VOUT,200R,R=1G,VIN=0V,39,ADEofROUT,ToaddamodelforthesimulationFromADE-Setup-Modellibraries,TocreateaTRANSweepFromADE-Analyses-Choose-TRAN,40,WaveformofROUT,IOUT,ROUT,41,SlewRate,Theunity-gainconfigurationplacestheseverestrequirementsonstabilityandslewratebecauseitsfeedbackisthelargest,resultinginthelargestvaluesofloop-gain,andshouldalwaysbeusedasaworst-casemeasurement.,42,Test-benchofSlewRate,Theinputstepmagnitudeis2V.,43,ADEofSR,ToaddamodelforthesimulationFromADE-Setup-Modellibraries,TocreateaTranFromADE-Analyses-Choose-Tran,44,WaveformofSR,SR=95.1KV/s,45,Noise,ThermalNoise(A)channelnoise(id)(A)RSnoise(rs)(A)RDnoise(rd)FlickerNoise(fn),46,Test-BenchofNoise,VCM_IN,VAC,Thedominantpolei
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