外文翻译--单片机工作原理_第1页
外文翻译--单片机工作原理_第2页
外文翻译--单片机工作原理_第3页
外文翻译--单片机工作原理_第4页
外文翻译--单片机工作原理_第5页
已阅读5页,还剩4页未读 继续免费阅读

下载本文档

版权说明:本文档由用户提供并上传,收益归属内容提供方,若内容存在侵权,请进行举报或认领

文档简介

英文原文THEPRINCIPLEOFMICROCONTROLLERINOPERATIONTHESINGLECHIPMICROCOMPUTERSCMISCONNECTEDTOAHOSTPCMICROCOMPUTERVIAASERIALPORTTHECONNECTINGCABLEISINCLUDEDWITHTHEUNITTHESCMISSUPPLIEDFITTEDWITHAN8751CHIPTHISCHIPFEATURESINTERNALROMCONTAININGVERSATILE,REALTIMEMONITORTOCOMMUNICATEWITHAPCVIATHEBUILTINSERIALPORTTHEMONITORINCLUDESALINEASSEMBLER,DISASSEMBLER,BREAKPOINTS,SINGLESTEPPINGANDTHEFACILITYTOEXAMINEANDEXCHANGEMEMORYORREGISTERCONTENTSASPECIALFUNCTIONOFTHEMONITORISTOSTORETHEPROGRAMUNDERDEVELOPMENTINTHERAMOFTHESCMDEVELOPMENTBOARDTHEGREATADVANTAGEOFTHEMETHODTHATISDIRECTACCESSTOTHEI/OPORTSISPROVIDEDBYTHE8051ISRETAINEDAND,CONSEQUENTLY,THENEEDFORACOSTLYINCIRCUITEMULATIONICEPACKAGEISNOTREQUIREDONCEAPROGRAMHASBEENCOMPLETEDONTHESCMDEVELOPMENTSYSTEMITCANBEEASILYTRANSFERREDINTOTHEROMOFANOTHER8751VIAANEPROMPROGRAMMERTHISSECOND8751,NOWCONTAININGTHECONTROLPROGRAM,CANBEREMOVEDFROMTHEPROGRAMMERANDINSTALLEDINTOTHESCMTBTARGETBOARDMOSTIMPORTANTLY,BECAUSEDIRECTACCESSTOTHEINPUT/OUTPUTPORTSOFTHE8751HASBEENRETAINEDDURINGTHEDEVELOPMENTSTAGETHEREISNONEEDFORPERIPHERALI/OANDADDRESSDECODINGCHIPSONLYTHE8751CHIPISREQUIREDTHUSTHESINGLECHIPMICROCONTROL,NOTMULTICHIPCONTROLISREALISEDTHESCMTBTARGETBOARDFEATUREASINGLE40WAYDILSOCKETFORTHEMICROCONTROLLERCHIPPLUSTERMINATIONFACILITIESIDENTICALTOTHESCMDEVELOPMENTBOARDFORSIMPLEANDCONVENIENTTRANSFEROFANYCONNECTINGCABLES8751ICSSHOULDBEPURCHASEDSEPARATELYFORTHETARGETBOARDINADDITIONTOTHESINGLECHIPDEVELOPMENTSYSTEMANDTARGETBOARD,ANUMBEROFADDONBOARDSAREAVAILABLETHESEINCLUDEAPORTMONITORBOARD,MULTICHANNELADC,SCREWTERMINALBOARDANDOUTPUTDRIVERBOARDVOICEINPUTTOAMACHINEISTHEMOSTNATURALFORMOFMANMACHINECOMMUNICATIONSRESEARCHCOMINGTOFRUITIONOVERTHEPASTSEVERALYEARSINDICATESTHATTHETECHNIQUESOFMANMACHINECOMMUNICATIONBYVOICECONSTITUTEAWHOLENEWRANGEOFCOMMUNICATIONSERVICESSERVICESTHATCANEXTENDMANSCAPABILITIES,SERVEHISSOCIALNEEDS,ANDINCREASEHISPRODUCTIVITYSPEECHRECOGNITIONCANBEDEFINEDASTHETECHNOLOGYWHICHMAKESITPOSSIBLEFORACOMPUTERTOACCEPTVOICEDATAASINPUTANDTHENIDENTIFYTHEWORDORPHRASESTHEREISATWOFOLDRATIONALEFORASPEECHRECOGNITIONSYSTEA1ITISANEASIERMEANSFORNONCOMPUTERPROFESSIONALSTOENTERDATAINTOTHECOMPUTER2INCERTAINAPPLICATIONS,SUCHASINSEMIAUTOMATEDQUALITYCONTROLINSPECTIONPROCEDURES,COMPUTERUSERSNEEDTOUSETHEIRHANDSFOROTHERTASKSSPEECHRECOGNITIONISAPARTOFABROADERSPEECHPROCESSINGTECHNOLOGYINVOLVINGCOMPUTERIDENTIFICATIONORVERIFICATIONOFSPEAKERS,COMPUTERSYNTHESISOFSPEECH,PRODUCTIONOFSTOREDSPOKENRESPONSES,COMPUTERANALYSISOFTHEPHYSICALANDPSYCHOLOGICALSTATEOFTHESPEAKER,EFFICIENTTRANSMISSIONOFSPOKENCONVERSATIONS,DETECTIONOFSPEECHPATHOLOGIES,ANDAIDSTOTHEHANDICAPPED,TAKINGMACHINESTALKANDLISTENTOHUMANSDEPENDSUPONECONOMICALIMPLEMENTATIONOFSPEECHSYNTHESISANDSPEECHRECOGNITIONANUMBEROFDIFFERENTFEATURESETSHAVEBEENPROPOSEDTOREPRESENTSPEECHSIGNALSTHESEINCLUDEENERGYANDZEROCROSSINGRATES,FORMANTFILTERING,SHORTTIMESPECTRUM,WAVEFORMDIGITIZATIONANDLINEARPREDICTIVECODINGLPCTHEMOTIVATIONFORCHOOSINGONEFEATURESETOVERANOTHERISOFTENCOMPLEXANDHIGHLYDEPENDENTANCONSTRAINTSIMPOSEDUPONTHESYSTEM,EG,COST,SPEED,RESPONSETIME,COMPUTATIONALCOMPLEXITY,ETCOFALLTHEMANYAVAILABLEFEATURESETS,LINEARPREDICTIVECODINGISUSUALLYTHEMOSTEFFECTIVEONETHEREAREMANYCLASSIFICATIONSFORCOMPUTERS,RANGINGFROMINEXPENSIVEMICROCOMPUTERSUSEDINHOMESANDOFFICES,TOLIQUIDCOOLEDSUPERCOMPUTERSUSEDINUNIVERSITIESANDRESEARCHLABORATORIESTHEPRESENTINVENTIONRELATESTOMICROCOMPUTERS,ALSOKNOWNAS“PERSONALCOMPUTERS“OR“PCS“AMICROCOMPUTERCANBEDEFINEDASA“COMPUTERHAVINGAMASSPRODUCEDINTEGRATEDCIRCUITMICROPROCESSOR“,SUCHAS,FOREXAMPLE,THEINTEL8086FAMILYOFPRODUCTSWHICHPRESENTLYINCLUDESTHE8086,80286,80386AND80486MICROPROCESSORSALTHOUGHTHEMICROPROCESSORISTHEHEARTANDDEFININGFEATUREOFAMICROCOMPUTER,ITISNOTVERYUSEFULUNLESSITISINTEGRATEDWITHAMEMORYANDASETOFINPUT/OUTPUT“I/O“DEVICES,ALSOKNOWNASPERIPHERALSTHESETHREECLASSESOFDEVICESCOMMUNICATEAMONGTHEMSELVESOVERASHAREDSETOFDIGITALSIGNALLINESCALLEDABUSTHEBUSISLOGICALLYORGANIZEDINTOSETSOFADDRESS,DATA,ANDCONTROLLINESTHEADDRESSLINESAREFORCOMMUNICATINGDEVICEADDRESSESWHICHUNIQUELYIDENTIFYAPARTICULARDEVICEONTHEBUSTHEDATALINESAREFORCOMMUNICATINGBINARYDATABETWEENTWOBUSDEVICES,ABUSMASTER,WHICHINITIATESADATATRANSFERBYPLACINGANADDRESSONTHEADDRESSLINES,ANDABUSSLAVE,WHICHREADSANDDECODESTHEADDRESSGENERATEDBYTHEBUSMASTERASITSOWNTHECONTROLLINESAREFORCOORDINATINGACCESSTOTHEBUSANDSELECTINGAMODEOFOPERATIONONTHEBUSSUCHASWRITEDATAORREADDATAMODESFOREXAMPLE,IFTHEBUSMASTERISAMICROPROCESSORANDTHEBUSSLAVEISAMEMORY,THEMICROPROCESSORMAYDIRECTTHEMEMORYTOBEREADBYPLACINGTHEPROPERLOGICLEVELONAWRITE/READCONTROLLINEINTHISWAY,THEMICROPROCESSORGAINSACCESSTOTHEDATASTOREDINTHEMEMORYLOCATIONSPECIFIEDBYTHELOGICLEVELSPLACEDONTHEADDRESSLINESBYTHEMICROPROCESSORABUSCYCLEBEGINSWHENTHEBUSMASTERDIRECTSAWRITEORAREADONTHEBUSTHEBUSCYCLEISCOMPLETEDAFTERALLDATAHASBEENTRANSFERREDACROSSTHEBUSANDTHEBUSMASTERRELEASESCONTROLOFTHEBUSIFTHETWODEVICESCOMMUNICATINGWITHEACHOTHEROVERTHEBUSOPERATEATTHESAMESPEED,THENABUSCYCLEMAYBEACHIEVEDOVERAMINIMUMNUMBEROFCLOCKCYCLESIF,ONTHEOTHERHAND,ABUSDEVICECANONLYTRANSMITORRECEIVEDATAOVERMANYCLOCKCYCLES,THENADELAYMUSTBEINJECTEDINTOTHESTATESEQUENCINGOFTHEFASTERDEVICEINSUCHCASES,A“READY“CONTROLLINEISTYPICALLYACTIVATEDBYTHESLOWERDEVICETOINDICATETOTHEFASTERDEVICETHATDATAISAVAILABLEONTHEBUSORHASBEENTAKENFROMTHEBUSBUSESMAYBEGENERALLYCLASSIFIEDASSYNCHRONOUSORASYNCHRONOUS,WHERESYNCHRONOUSBUSESAREDISTINGUISHEDBYTHEREQUIREMENTTHATALLBUSDEVICESSYNCHRONIZETHEIRUSEOFTHEBUSBYASINGLECLOCKSOURCEORAFUNDAMENTALFREQUENCYANEXAMPLEOFASYNCHRONOUSBUSUSEDINAMICROCOMPUTERISTHEIBMPCATI/OCHANNEL,ATBUSORINDUSTRYSTANDARDARCHITECTUREBUS“ISABUS“PRESENTBUSFREQUENCYSTANDARDSFORTHEISABUSARE8MHZAND10MHZTHEISABUS,ANEXAMPLEOFASYNCHRONOUSBUS,ISUSEDWITHTHEINTEL80386MICROPROCESSORTHEISABUSPROVIDESA16BITDATABUSANDA24BITADDRESSBUSFORPURPOSESOFTHISDISCUSSION,THECONTROLLINESOFTHEISABUSINCLUDEFOURBUSCYCLEDEFINITIONLINESTHEBUSCYCLEDEFINITIONLINESDEFINETHETYPEOFBUSCYCLEBEINGPERFORMEDINTHEFOLLOWINGDEFINITIONS,ANDTHROUGHOUTTHEREMAINDEROFTHISPATENTDOCUMENT,ALLSIGNALNAMESTHATARETERMINATEDWITHANASTERISKINDICATEANACTIVELOWSIGNALABUSCYCLEDEFINITIONLINECALLEDMEMORYREAD“MEMR“ISACTIVEWHENDATAISTOBEREADFROMMEMORYABUSCYCLEDEFINITIONLINECALLEDMEMORYWRITE“MEMW“ISACTIVEWHENDATAISTOBEWRITTENTOMEMORYABUSCYCLEDEFINITIONLINECALLEDI/OREAD“IOR“ISACTIVEWHENDATAISTOBEREADFROMAPERIPHERALDEVICEABUSCYCLEDEFINITIONLINECALLEDI/OWRITE“IOW“ISACTIVEWHENDATAISTOBEWRITTENTOAPERIPHERALDEVICEINADDITIONTOTHEABOVEMENTIONEDBUSCYCLEDEFINITIONSIGNALSTHEREARESOMEMICROPROCESSORSPECIFICSIGNALSTHATAREUSEDINMOSTMICROCOMPUTERSFORSPECIFICALLYINTERFACINGTHEINTEL8086MICROPROCESSORFAMILYTHEREARETWOBUSCONTROLSIGNALSANDTWOBUSARBITRATIONSIGNALSOFPARTICULARIMPORTANCEFORBUSINTERFACINGTHEBUSCONTROLSIGNALSALLOWTHEMICROPROCESSORTOINDICATEWHENABUSCYCLEHASBEGUN,ANDALLOWSOTHERBUSDEVICESTOINDICATEABUSCYCLETERMINATIONTHEADDRESSSTATUS“ADS“SIGNALINDICATESTHATAVALIDBUSCYCLEDEFINITION,ANDADDRESS,ISBEINGDRIVENATTHEOUTPUTPINSOFTHE80386MICROPROCESSORTHETRANSFERACKNOWLEDGE“READY“SIGNALINDICATESTHATTHECURRENTBUSCYCLEISCOMPLETEONESKILLEDINTHETECHNOLOGYWILLUNDERSTANDTHEOPERATIONOFTHEISABUS,OTHERAPPLICABLEINDUSTRYSTANDARDBUSES,ANDTHEINTEL8086MICROPROCESSORFAMILYATLEASTTWOREFERENCESAREAVAILABLEONTHESUBJECTINCLUDINGTHEIBMPCFROMTHEINSIDEOUT,REVISEDEDITION,BYMURRAYSARGENTIIIANDRICHARDLSHOEMAKERANDIBMPCATTECHNICALREFERENCEPUBLISHEDBYIBMCORPORATIONSYNCHRONOUSBUSESAREORDINARILYPREFERREDFORMICROCOMPUTERSSINCETHEYCANOFTENTRANSFERDATAFASTERTHANASYNCHRONOUSBUSESCERTAINAPPLICATIONS,HOWEVER,ESPECIALLYWHERELENGTHYCOMMUNICATIONDISTANCESAREINVOLVED,REQUIREASYNCHRONOUSOR“HANDSHAKEONLY“TYPEBUSESWHENDEVICESARESEPARATEDBYSOMEDISTANCE,THESAMEPHASETRANSITIONOFACOMMONCLOCKCANNOTBEGUARANTEEDTHEPRIMARYDISADVANTAGEOFTHESYNCHRONOUSISABUSHASONLYRECENTLYBEENRECOGNIZEDBASICALLY,MICROCOMPUTERSAREEVOLVINGDOWNTWOSEPARATEPATHSOFVARIABLESONESETOFVARIABLESISASSOCIATEDWITHTHEBUSDESIGNANDTHEOTHERSETISASSOCIATEDWITHTHEMICROPROCESSORANDMEMORYDESIGNSASYNCHRONOUSBUS,SUCHASTHEISABUS,SHOULDREMAINCONSTANTSOTHATMICROCOMPUTERSINASINGLEPRODUCTLINEAREALLCOMPATIBLETHATIS,APERIPHERALSUCHASAMODEM,PRINTERANDSOONWILLOPERATETHROUGHARESPECTIVECONTROLLERATTHECLOCKFREQUENCYDEFINEDINTHEBUSSPECIFICATIONTHEREFORE,THEBUSSHOULDONLYCHANGETHROUGHMOREEFFICIENTIE,COSTEFFECTIVEDESIGNSWHICHMEETTHESAMESPECIFICATIONSFOREXAMPLE,THEOPERATINGFREQUENCYOFTHEBUSSHOULDREMAINCONSTANTTOASSUREPROPEROPERATIONOFALLPERIPHERALSCONSTRUCTEDINACCORDANCEWITHTHEBUSSTANDARDINCONTRAST,MICROPROCESSORANDMEMORYTECHNOLOGIESARERAPIDLYEVOLVINGINFUNCTIONALITYANDPERFORMANCEFOREXAMPLE,THEMICROPROCESSORCHANGESINARCHITECTURALDEFINITIONEG,NUMBEROFPINS,INSTRUCTIONSETS,ETCANDCLOCKFREQUENCYEG,16MHZ,25MHZ,33MHZ,THECACHEBECOMESMORESOPHISTICATED,COPROCESSORSBECOMEAPARTOFTHEMICROCOMPUTERARCHITECTUREEG,INTEL80387NUMERICCOPROCESSOR,ANDMAINMEMORYBECOMESFASTERASANEXAMPLEOFMEMORYEVOLUTION,CONSIDERDYNAMICRANDOMACCESSMEMORY,OR“DRAM“ASDRAMTECHNOLOGYIMPROVES,THEOPPORTUNITYFORIMPROVEDSYSTEMPERFORMANCEBECOMESCLEARINTHEEARLYDAYSOFPERSONALCOMPUTERS,THECOMMONDRAMCHIPBEINGUSEDINMICROCOMPUTERSWAS64K165,5361BITS,HAVINGANACCESSTIMEOF150NANOSECONDSRECENTLY,ASTANDARDIE,READILYAVAILABLEANDCOSTEFFECTIVEDRAMSIZEUSEDBYMICROCOMPUTERMANUFACTURERSWAS256K1,HAVINGANACCESSTIMEOF100NANOSECONDSPRESENTLY,ADRAMCHIPSTANDARDOF1M1IE,1,048,5761BITS,HAVINGANACCESSTIMEOF80NANOSECONDSORLESSISEVOLVINGASACOMMERCIALLYFEASIBLESTANDARD,ANDTHETECHNOLOGYTRENDISTOWARDA16MBY1BITCHIPITISDESIREABLETOISOLATETHEMEMORYANDMICROPROCESSORFROMTHESYNCHRONOUSI/OBUSDESIGNSOTHATDIFFERENTDRAMANDMICROPROCESSORSATDIFFERENTOPERATINGFREQUENCIESCANBEUSEDWITHOUTAFFECTINGTHESYNCHRONOUSI/OBUSDESIGNOTHERWISE,IFTHESYNCHRONOUSBUSISNOTISOLATEDFROMTHECOMPUTATIONANDSTORAGEELEMENTS,EACHTECHNOLOGICALIMPROVEMENTINMEMORYORMICROPROCESSORPRODUCTSWILLREQUIREUNIQUEINTERFACECIRCUITRYTOSCALEDOWNCOMMUNICATIONSPEEDWITHOTHERDEVICESACROSSTHESYNCHRONOUSBUSCONSEQUENTLY,ANEEDEXISTSFORIMPROVEMENTSINMICROCOMPUTERSYSTEMSTOISOLATEI/OCHANNELDESIGNFROMMEMORYANDMICROPROCESSORDESIGNS中文译文单片机工作原理在通过端口把单片机连接到个人电脑上的操作中连接电缆也包含在这个系统中。单片机安装有一个8751芯片,这个芯片内部的ROM包含多种功能实时监控器通过PC的串行端口进行联系。监控器包含一个行汇编,反汇编,断点,单步和检验及存储器、寄存器间内容进行交换的设备。监控器的一个特殊功能是存储单片机开发板RAM中的程序。该方法的优点是直接进入到由8051保存的I/O端口,因此,一个昂贵的电路仿真(ICE)包是不必需的。一旦单片机开发系统方案已经完成便可以轻松地通过一个EPROM将程序转移到另一个8751ROM。第二个8751芯片现在包含控制程序,可以从程序编程器中移除并且安装到单片机。最重要的,因为直接访问输入/输出端口的8751一直保留在开发阶段,因此外围I/O和地址解码芯片是不需要的,只有8751芯片是必需的。因此,单片机控制,不是多芯片控制得以实现。单片机集成板的特点为微控制器芯片与单片机的终端设备都为40WAYDIL插座。板子的开发为电缆连接更加简单方便。8751ICS应该是单独购买。除了单片机开发系统和目标板,一系列附加板子是单独提供的这些包括端口显示器,多通道ADC,螺丝终端板和输出驱动板。将语音输入到一台计算机是人机通信最原始的形式。过去几年来的研究成果表明,通过声音进行人机通信的技术成为了一项全新的通信服务技术,这项服务可以提高人的能力,为社会服务,并提高生产力。语音识别可以被定义为一种把声音数据作为输入并能辨别单词和语法的技术。语音识别系统有两方面的优点(1)它是一种非常简单的技术手段,非专业的计算机人员也可以把数据输入电脑。(2)在某些应用方面,如半自动质量控制检查程序,计算机用户需要去做其它方面的任务。语音识别是更广泛的语音处理技术的一部分,它涉及电脑技术鉴定或对语音输入的核实,电脑语音合成,对已存储语音的反应,计算机的物理分析和对声音输入者心理状态的分析,高效率传输口语对话,语音检测,采取机器语言,并听取人类的口令依靠的是综合语音应用系统和语音识别。体现语音信号的许多不同特征已经被提出。这些包括能源和零交叉率,共振峰滤波,短时谱,波形数字化和线性预测编码(LPC)等。选择一个功能较另一组的动机往往是很复杂的,它受限于系统。如成本,速度,反应时间,电脑的复杂程度等所有可以考虑的特征。有很多分类的计算机,从家庭和办公室使用的廉价的微型计算机,到在大学和研究实验室使用的液体冷却的超级计算机。本发明涉及微型计算机,也称为“个人电脑”。微机可被定义为一个“由一个大规模的集成电路组成的微处理器”,例如英特尔8086的产品家族,目前包括8086,80286,80386和80486微处理器。虽然微处理器是微机的核心和主要特征,但它不是很有用,除非它和内存还有输入输出端口集成在一起,这三类设备间进行通信是在一个共享的数字信号线上称为总线。总线在逻辑上是由一系列的地址,数据和控制线构成。地址线是在总线上唯一被确定的通信设备的地址。数据线是在两个总线设备间传送二进制数据,总线主机是通过放置地址总线的一个地址进行数据转换,总线附属是读取和解码。把总线主机产生的地址作为自己的地址。控制总线是协调总线入口和选择一个操作总线的合适模式,例如数据输入模式和数据读出模式。例如,如果总线主机是微处理器,总线附属是一个内存,微处理器的内存可直接被读出通过在读写控制线上找寻合适的逻辑电平。这样,微处理器能够访问由微处理器的地址线的逻辑电平确定的存储单元中存储的数据。当总线主机开始在总线上的读写时一个总线周期便开始了。当所有数据在总线上翻译后总线周期释放了对总线的控制一个总线周期便完成了,如果两个设备通过总线操作以相同的速度进行通信,那么总线周期可能会用最小的周期。如果,另一方面,总线设备只能发送或接收数据的时钟周期,那么速度相对较快的设备必须进行延迟。在这种情况下,已经就绪的控制线通常是由慢的装置启动然后指示相对较快的设备总线可以使用或已经从总线接受了数据。总线一般可划分为同步或异步,同步总线是由同一时钟源下所有总线设备同时使用总线来区别的(或基本频率)。微机中一个同步总线的例子是IBM个人电脑的I/O通道。目前总线的ISA总线频率标准是8兆赫和10兆赫。ISA总线,同步总线一个的例子,用作INTEL80386的微处理器。在ISA总线提供了一个16位数据总线和24位地址总线。对于本次讨论目的,ISA总线的控制线,包括4个总线周期的

温馨提示

  • 1. 本站所有资源如无特殊说明,都需要本地电脑安装OFFICE2007和PDF阅读器。图纸软件为CAD,CAXA,PROE,UG,SolidWorks等.压缩文件请下载最新的WinRAR软件解压。
  • 2. 本站的文档不包含任何第三方提供的附件图纸等,如果需要附件,请联系上传者。文件的所有权益归上传用户所有。
  • 3. 本站RAR压缩包中若带图纸,网页内容里面会有图纸预览,若没有图纸预览就没有图纸。
  • 4. 未经权益所有人同意不得将文件中的内容挪作商业或盈利用途。
  • 5. 人人文库网仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对用户上传分享的文档内容本身不做任何修改或编辑,并不能对任何下载内容负责。
  • 6. 下载文件中如有侵权或不适当内容,请与我们联系,我们立即纠正。
  • 7. 本站不保证下载资源的准确性、安全性和完整性, 同时也不承担用户因使用这些下载资源对自己和他人造成任何形式的伤害或损失。

评论

0/150

提交评论