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AT89S52FEATURESCOMPATIBLEWITHMCS51PRODUCTS8KBYTESOFINSYSTEMPROGRAMMABLEISPFLASHMEMORYENDURANCE10,000WRITE/ERASECYCLES40VTO55VOPERATINGRANGEFULLYSTATICOPERATION0HZTO33MHZTHREELEVELPROGRAMMEMORYLOCK256X8BITINTERNALRAM32PROGRAMMABLEI/OLINESTHREE16BITTIMER/COUNTERSEIGHTINTERRUPTSOURCESFULLDUPLEXUARTSERIALCHANNELLOWPOWERIDLEANDPOWERDOWNMODESINTERRUPTRECOVERYFROMPOWERDOWNMODEWATCHDOGTIMERDUALDATAPOINTERPOWEROFFFLAGFASTPROGRAMMINGTIMEFLEXIBLEISPPROGRAMMINGBYTEANDPAGEMODEGREENPB/HALIDEFREEPACKAGINGOPTION1DESCRIPTIONTHEAT89S52ISALOWPOWER,HIGHPERFORMANCECMOS8BITMICROCONTROLLERWITH8KBYTESOFINSYSTEMPROGRAMMABLEFLASHMEMORYTHEDEVICEISMANUFACTUREDUSINGATMELSHIGHDENSITYNONVOLATILEMEMORYTECHNOLOGYANDISCOMPATIBLEWITHTHEINDUSTRYSTANDARD80C51INSTRUCTIONSETANDPINOUTTHEONCHIPFLASHALLOWSTHEPROGRAMMEMORYTOBEREPROGRAMMEDINSYSTEMORBYACONVENTIONALNONVOLATILEMEMORYPROGRAMMERBYCOMBININGAVERSATILE8BITCPUWITHINSYSTEMPROGRAMMABLEFLASHONAMONOLITHICCHIP,THEATMELAT89S52ISAPOWERFULMICROCONTROLLERWHICHPROVIDESAHIGHLYFLEXIBLEANDCOSTEFFECTIVESOLUTIONTOMANYEMBEDDEDCONTROLAPPLICATIONSTHEAT89S52PROVIDESTHEFOLLOWINGSTANDARDFEATURES8KBYTESOFFLASH,256BYTESOFRAM,32I/OLINES,WATCHDOGTIMER,TWODATAPOINTERS,THREE16BITTIMER/COUNTERS,ASIXVECTORTWOLEVELINTERRUPTARCHITECTURE,AFULLDUPLEXSERIALPORT,ONCHIPOSCILLATOR,ANDCLOCKCIRCUITRYINADDITION,THEAT89S52ISDESIGNEDWITHSTATICLOGICFOROPERATIONDOWNTOZEROFREQUENCYANDSUPPORTSTWOSOFTWARESELECTABLEPOWERSAVINGMODESTHEIDLEMODESTOPSTHECPUWHILEALLOWINGTHERAM,TIMER/COUNTERS,SERIALPORT,ANDINTERRUPTSYSTEMTOCONTINUEFUNCTIONINGTHEPOWERDOWNMODESAVESTHERAMCONTENTSBUTFREEZESTHEOSCILLATOR,DISABLINGALLOTHERCHIPFUNCTIONSUNTILTHENEXTINTERRUPTORHARDWARERESET2PINDESCRIPTION21VCCSUPPLYVOLTAGE22GNDGROUND23PORT0PORT0ISAN8BITOPENDRAINBIDIRECTIONALI/OPORTASANOUTPUTPORT,EACHPINCANSINKEIGHTTTLINPUTSWHEN1SAREWRITTENTOPORT0PINS,THEPINSCANBEUSEDASHIGHIMPEDANCEINPUTSPORT0CANALSOBECONFIGUREDTOBETHEMULTIPLEXEDLOWORDERADDRESS/DATABUSDURINGACCESSESTOEXTERNALPROGRAMANDDATAMEMORYINTHISMODE,P0HASINTERNALPULLUPSPORT0ALSORECEIVESTHECODEBYTESDURINGFLASHPROGRAMMINGANDOUTPUTSTHECODEBYTESDURINGPROGRAMVERIFICATIONEXTERNALPULLUPSAREREQUIREDDURINGPROGRAMVERIFICATION24PORT1PORT1ISAN8BITBIDIRECTIONALI/OPORTWITHINTERNALPULLUPSTHEPORT1OUTPUTBUFFERSCANSINK/SOURCEFOURTTLINPUTSWHEN1SAREWRITTENTOPORT1PINS,THEYAREPULLEDHIGHBYTHEINTERNALPULLUPSANDCANBEUSEDASINPUTSASINPUTS,PORT1PINSTHATAREEXTERNALLYBEINGPULLEDLOWWILLSOURCECURRENTIILBECAUSEOFTHEINTERNALPULLUPSINADDITION,P10ANDP11CANBECONFIGUREDTOBETHETIMER/COUNTER2EXTERNALCOUNTINPUTP10/T2ANDTHETIMER/COUNTER2TRIGGERINPUTP11/T2EX,RESPECTIVELY,ASSHOWNINTHEFOLLOWINGTABLEPORT1ALSORECEIVESTHELOWORDERADDRESSBYTESDURINGFLASHPROGRAMMINGANDVERIFICATIONPORTPINALTERNATEFUNCTIONSP10T2EXTERNALCOUNTINPUTTOTIMER/COUNTER2,CLOCKOUTP11T2EXTIMER/COUNTER2CAPTURE/RELOADTRIGGERANDDIRECTIONCONTROLP15MOSIUSEDFORINSYSTEMPROGRAMMINGP16MISOUSEDFORINSYSTEMPROGRAMMINGP17SCKUSEDFORINSYSTEMPROGRAMMING25PORT2PORT2ISAN8BITBIDIRECTIONALI/OPORTWITHINTERNALPULLUPSTHEPORT2OUTPUTBUFFERSCANSINK/SOURCEFOURTTLINPUTSWHEN1SAREWRITTENTOPORT2PINS,THEYAREPULLEDHIGHBYTHEINTERNALPULLUPSANDCANBEUSEDASINPUTSASINPUTS,PORT2PINSTHATAREEXTERNALLYBEINGPULLEDLOWWILLSOURCECURRENTIILBECAUSEOFTHEINTERNALPULLUPSPORT2EMITSTHEHIGHORDERADDRESSBYTEDURINGFETCHESFROMEXTERNALPROGRAMMEMORYANDDURINGACCESSESTOEXTERNALDATAMEMORYTHATUSE16BITADDRESSESMOVXDPTRINTHISAPPLICATION,PORT2USESSTRONGINTERNALPULLUPSWHENEMITTING1SDURINGACCESSESTOEXTERNALDATAMEMORYTHATUSE8BITADDRESSESMOVXRI,PORT2EMITSTHECONTENTSOFTHEP2SPECIALFUNCTIONREGISTERPORT2ALSORECEIVESTHEHIGHORDERADDRESSBITSANDSOMECONTROLSIGNALSDURINGFLASHPROGRAMMINGANDVERIFICATION26PORT3PORT3ISAN8BITBIDIRECTIONALI/OPORTWITHINTERNALPULLUPSTHEPORT3OUTPUTBUFFERSCANSINK/SOURCEFOURTTLINPUTSWHEN1SAREWRITTENTOPORT3PINS,THEYAREPULLEDHIGHBYTHEINTERNALPULLUPSANDCANBEUSEDASINPUTSASINPUTS,PORT3PINSTHATAREEXTERNALLYBEINGPULLEDLOWWILLSOURCECURRENTIILBECAUSEOFTHEPULLUPSPORT3RECEIVESSOMECONTROLSIGNALSFORFLASHPROGRAMMINGANDVERIFICATIONPORT3ALSOSERVESTHEFUNCTIONSOFVARIOUSSPECIALFEATURESOFTHEAT89S52,ASSHOWNINTHEFOLLOWINGTABLEPORTPINALTERNATEFUNCTIONSP30RXDSERIALINPUTPORTP31TXDSERIALOUTPUTPORTP32EXTERNALINTERRUPT0INT0P33EXTERNALINTERRUPT11P34T0TIMER0EXTERNALINPUTP35T1TIMER1EXTERNALINPUTP36EXTERNALDATAMEMORYWRITESTROBEWRP37EXTERNALDATAMEMORYREADSTROBED27RSTRESETINPUTAHIGHONTHISPINFORTWOMACHINECYCLESWHILETHEOSCILLATORISRUNNINGRESETSTHEDEVICETHISPINDRIVESHIGHFOR98OSCILLATORPERIODSAFTERTHEWATCHDOGTIMESOUTTHEDISRTOBITINSFRAUXRADDRESS8EHCANBEUSEDTODISABLETHISFEATUREINTHEDEFAULTSTATEOFBITDISRTO,THERESETHIGHOUTFEATUREISENABLED28ALE/ADDRESSLATCHENABLEALEISANOUTPUTPULSEFORPROGLATCHINGTHELOWBYTEOFTHEADDRESSDURINGACCESSESTOEXTERNALMEMORYTHISPINISALSOTHEPROGRAMPULSEINPUTDURINGPROGFLASHPROGRAMMINGINNORMALOPERATION,ALEISEMITTEDATACONSTANTRATEOF1/6THEOSCILLATORFREQUENCYANDMAYBEUSEDFOREXTERNALTIMINGORCLOCKINGPURPOSESNOTE,HOWEVER,THATONEALEPULSEISSKIPPEDDURINGEACHACCESSTOEXTERNALDATAMEMORYIFDESIRED,ALEOPERATIONCANBEDISABLEDBYSETTINGBIT0OFSFRLOCATION8EHWITHTHEBITSET,ALEISACTIVEONLYDURINGAMOVXORMOVCINSTRUCTIONOTHERWISE,THEPINISWEAKLYPULLEDHIGHSETTINGTHEALEDISABLEBITHASNOEFFECTIFTHEMICROCONTROLLERISINEXTERNALEXECUTIONMODE29PROGRAMSTOREENABLEISTHEREADSTROBETOEXTERNALPROGRAMPSENPSENMEMORYWHENTHEAT89S52ISEXECUTINGCODEFROMEXTERNALPROGRAMMEMORY,ISACTIVATEDTWICEEACHMACHINECYCLE,EXCEPTTHATTWOACTIVATIONSAREPSENSKIPPEDDURINGEACHACCESSTOEXTERNALDATAMEMORY210/VPPEXTERNALACCESSENABLEMUSTBESTRAPPEDTOGNDINORDERTOAEAENABLETHEDEVICETOFETCHCODEFROMEXTERNALPROGRAMMEMORYLOCATIONSSTARTINGAT0000HUPTOFFFFHNOTE,HOWEVER,THATIFLOCKBIT1ISPROGRAMMED,WILLBEEAINTERNALLYLATCHEDONRESETSHOULDBESTRAPPEDTOVCCFORINTERNALPROGRAMEXECUTIONSTHISPINALSORECEIVESTHE12VOLTPROGRAMMINGENABLEVOLTAGEVPPDURINGFLASHPROGRAMMING211XTAL1INPUTTOTHEINVERTINGOSCILLATORAMPLIFIERANDINPUTTOTHEINTERNALCLOCKOPERATINGCIRCUIT212XTAL2OUTPUTFROMTHEINVERTINGOSCILLATORAMPLIFIER3MEMORYORGANIZATIONMCS51DEVICESHAVEASEPARATEADDRESSSPACEFORPROGRAMANDDATAMEMORYUPTO64KBYTESEACHOFEXTERNALPROGRAMANDDATAMEMORYCANBEADDRESSED31PROGRAMMEMORYIFTHEPINISCONNECTEDTOGND,ALLPROGRAMFETCHESAREDIRECTEDTOEXTERNALEAMEMORYONTHEAT89S52,IFISCONNECTEDTOVCC,PROGRAMFETCHESTOADDRESSESE0000HTHROUGH1FFFHAREDIRECTEDTOINTERNALMEMORYANDFETCHESTOADDRESSES2000HTHROUGHFFFFHARETOEXTERNALMEMORY32DATAMEMORYTHEAT89S52IMPLEMENTS256BYTESOFONCHIPRAMTHEUPPER128BYTESOCCUPYAPARALLELADDRESSSPACETOTHESPECIALFUNCTIONREGISTERSTHISMEANSTHATTHEUPPER128BYTESHAVETHESAMEADDRESSESASTHESFRSPACEBUTAREPHYSICALLYSEPARATEFROMSFRSPACEWHENANINSTRUCTIONACCESSESANINTERNALLOCATIONABOVEADDRESS7FH,THEADDRESSMODEUSEDINTHEINSTRUCTIONSPECIFIESWHETHERTHECPUACCESSESTHEUPPER128BYTESOFRAMORTHESFRSPACEINSTRUCTIONSWHICHUSEDIRECTADDRESSINGACCESSTHESFRSPACEFOREXAMPLE,THEFOLLOWINGDIRECTADDRESSINGINSTRUCTIONACCESSESTHESFRATLOCATION0A0HWHICHISP2MOV0A0H,DATAINSTRUCTIONSTHATUSEINDIRECTADDRESSINGACCESSTHEUPPER128BYTESOFRAMFOREXAMPLE,THEFOLLOWINGINDIRECTADDRESSINGINSTRUCTION,WHERER0CONTAINS0A0H,ACCESSESTHEDATABYTEATADDRESS0A0H,RATHERTHANP2WHOSEADDRESSIS0A0HMOVR0,DATANOTETHATSTACKOPERATIONSAREEXAMPLESOFINDIRECTADDRESSING,SOTHEUPPER128BYTESOFDATARAMAREAVAILABLEASSTACKSPACE4WATCHDOGTIMERONETIMEENABLEDWITHRESETOUTTHEWDTISINTENDEDASARECOVERYMETHODINSITUATIONSWHERETHECPUMAYBESUBJECTEDTOSOFTWAREUPSETSTHEWDTCONSISTSOFA14BITCOUNTERANDTHEWATCHDOGTIMERRESETWDTRSTSFRTHEWDTISDEFAULTEDTODISABLEFROMEXITINGRESETTOENABLETHEWDT,AUSERMUSTWRITE01EHAND0E1HINSEQUENCETOTHEWDTRSTREGISTERSFRLOCATION0A6HWHENTHEWDTISENABLED,ITWILLINCREMENTEVERYMACHINECYCLEWHILETHEOSCILLATORISRUNNINGTHEWDTTIMEOUTPERIODISDEPENDENTONTHEEXTERNALCLOCKFREQUENCYTHEREISNOWAYTODISABLETHEWDTEXCEPTTHROUGHRESETEITHERHARDWARERESETORWDTOVERFLOWRESETWHENWDTOVERFLOWS,ITWILLDRIVEANOUTPUTRESETHIGHPULSEATTHERSTPIN41USINGTHEWDTTOENABLETHEWDT,AUSERMUSTWRITE01EHAND0E1HINSEQUENCETOTHEWDTRSTREGISTERSFRLOCATION0A6HWHENTHEWDTISENABLED,THEUSERNEEDSTOSERVICEITBYWRITING01EHAND0E1HTOWDTRSTTOAVOIDAWDTOVERFLOWTHE14BITCOUNTEROVERFLOWSWHENITREACHES163833FFFH,ANDTHISWILLRESETTHEDEVICEWHENTHEWDTISENABLED,ITWILLINCREMENTEVERYMACHINECYCLEWHILETHEOSCILLATORISRUNNINGTHISMEANSTHEUSERMUSTRESETTHEWDTATLEASTEVERY16383MACHINECYCLESTORESETTHEWDTTHEUSERMUSTWRITE01EHAND0E1HTOWDTRSTWDTRSTISAWRITEONLYREGISTERTHEWDTCOUNTERCANNOTBEREADORWRITTENWHENWDTOVERFLOWS,ITWILLGENERATEANOUTPUTRESETPULSEATTHERSTPINTHERESETPULSEDURATIONIS98XTOSC,WHERETOSC1/FOSCTOMAKETHEBESTUSEOFTHEWDT,ITSHOULDBESERVICEDINTHOSESECTIONSOFCODETHATWILLPERIODICALLYBEEXECUTEDWITHINTHETIMEREQUIREDTOPREVENTAWDTRESET42WDTDURINGPOWERDOWNANDIDLEINPOWERDOWNMODETHEOSCILLATORSTOPS,WHICHMEANSTHEWDTALSOSTOPSWHILEINPOWERDOWNMODE,THEUSERDOESNOTNEEDTOSERVICETHEWDTTHEREARETWOMETHODSOFEXITINGPOWERDOWNMODEBYAHARDWARERESETORVIAALEVELACTIVATEDEXTERNALINTERRUPTWHICHISENABLEDPRIORTOENTERINGPOWERDOWNMODEWHENPOWERDOWNISEXITEDWITHHARDWARERESET,SERVICINGTHEWDTSHOULDOCCURASITNORMALLYDOESWHENEVERTHEAT89S52ISRESETEXITINGPOWERDOWNWITHANINTERRUPTISSIGNIFICANTLYDIFFERENTTHEINTERRUPTISHELDLOWLONGENOUGHFORTHEOSCILLATORTOSTABILIZEWHENTHEINTERRUPTISBROUGHTHIGH,THEINTERRUPTISSERVICEDTOPREVENTTHEWDTFROMRESETTINGTHEDEVICEWHILETHEINTERRUPTPINISHELDLOW,THEWDTISNOTSTARTEDUNTILTHEINTERRUPTISPULLEDHIGHITISSUGGESTEDTHATTHEWDTBERESETDURINGTHEINTERRUPTSERVICEFORTHEINTERRUPTUSEDTOEXITPOWERDOWNMODETOENSURETHATTHEWDTDOESNOTOVERFLOWWITHINAFEWSTATESOFEXITINGPOWERDOWN,ITISBESTTORESETTHEWDTJUSTBEFOREENTERINGPOWERDOWNMODEBEFOREGOINGINTOTHEIDLEMODE,THEWDIDLEBITINSFRAUXRISUSEDTODETERMINEWHETHERTHEWDTCONTINUESTOCOUNTIFENABLEDTHEWDTKEEPSCOUNTINGDURINGIDLEWDIDLEBIT0ASTHEDEFAULTSTATETOPREVENTTHEWDTFROMRESETTINGTHEAT89S52WHILEINIDLEMODE,THEUSERSHOULDALWAYSSETUPATIMERTHATWILLPERIODICALLYEXITIDLE,SERVICETHEWDT,ANDREENTERIDLEMODEWITHWDIDLEBITENABLED,THEWDTWILLSTOPTOCOUNTINIDLEMODEANDRESUMESTHECOUNTUPONEXITFROMIDLE5UARTTHEUARTINTHEAT89S52OPERATESTHESAMEWAYASTHEUARTINTHEAT89C51ANDAT89C526TIMER0AND1TIMER0ANDTIMER1INTHEAT89S52OPERATETHESAMEWAYASTIMER0ANDTIMER1INTHEAT89C51ANDAT89C527TIMER2TIMER2ISA16BITTIMER/COUNTERTHATCANOPERATEASEITHERATIMERORANEVENTCOUNTERTHETYPEOFOPERATIONISSELECTEDBYBITC/INTHESFRT2CONTIMER2T2HASTHREEOPERATINGMODESCAPTURE,AUTORELOADUPORDOWNCOUNTING,ANDBAUDRATEGENERATORTHEMODESARESELECTEDBYBITSINT2CON,ASSHOWNINTABLE61TIMER2CONSISTSOFTWO8BITREGISTERS,TH2ANDTL2INTHETIMERFUNCTION,THETL2REGISTERISINCREMENTEDEVERYMACHINECYCLESINCEAMACHINECYCLECONSISTSOF12OSCILLATORPERIODS,THECOUNTRATEIS1/12OFTHEOSCILLATORFREQUENCYTABLE61TIMER2OPERATINGMODESRCLKTCLKCP/RL2TR2MODE00116BITAUTORELOAD01116BITCAPTURE1X1BAUDRATEGENERATORXX0OFFINTHECOUNTERFUNCTION,THEREGISTERISINCREMENTEDINRESPONSETOA1TO0TRANSITIONATITSCORRESPONDINGEXTERNALINPUTPIN,T2INTHISFUNCTION,THEEXTERNALINPUTISSAMPLEDDURINGS5P2OFEVERYMACHINECYCLEWHENTHESAMPLESSHOWAHIGHINONECYCLEANDALOWINTHENEXTCYCLE,THECOUNTISINCREMENTEDTHENEWCOUNTVALUEAPPEARSINTHEREGISTERDURINGS3P1OFTHECYCLEFOLLOWINGTHEONEINWHICHTHETRANSITIONWASDETECTEDSINCETWOMACHINECYCLES24OSCILLATORPERIODSAREREQUIREDTORECOGNIZEA1TO0TRANSITION,THEMAXIMUMCOUNTRATEIS1/24OFTHEOSCILLATORFREQUENCYTOENSURETHATAGIVENLEVELISSAMPLEDATLEASTONCEBEFOREITCHANGES,THELEVELSHOULDBEHELDFORATLEASTONEFULLMACHINECYCLE71CAPTUREMODEINTHECAPTUREMODE,TWOOPTIONSARESELECTEDBYBITEXEN2INT2CONIFEXEN20,TIMER2ISA16BITTIMERORCOUNTERWHICHUPONOVERFLOWSETSBITTF2INT2CONTHISBITCANTHENBEUSEDTOGENERATEANINTERRUPTIFEXEN21,TIMER2PERFORMSTHESAMEOPERATION,BUTA1TO0TRANSITIONATEXTERNALINPUTT2EXALSOCAUSESTHECURRENTVALUEINTH2ANDTL2TOBECAPTUREDINTORCAP2HANDRCAP2L,RESPECTIVELYINADDITION,THETRANSITIONATT2EXCAUSESBITEXF2INT2CONTOBESETTHEEXF2BIT,LIKETF2,CANGENERATEANINTERRUPT72AUTORELOADUPORDOWNCOUNTERTIMER2CANBEPROGRAMMEDTOCOUNTUPORDOWNWHENCONFIGUREDINITS16BITAUTORELOADMODETHISFEATUREISINVOKEDBYTHEDCENDOWNCOUNTERENABLEBITLOCATEDINTHESFRT2MODUPONRESET,THEDCENBITISSETTO0SOTHATTIMER2WILLDEFAULTTOCOUNTUPWHENDCENISSET,TIMER2CANCOUNTUPORDOWN,DEPENDINGONTHEVALUEOFTHET2EXPINTIMER2AUTOMATICALLYCOUNTINGUPWHENDCEN0INTHISMODE,TWOOPTIONSARESELECTEDBYBITEXEN2INT2CONIFEXEN20,TIMER2COUNTSUPTO0FFFFHANDTHENSETSTHETF2BITUPONOVERFLOWTHEOVERFLOWALSOCAUSESTHETIMERREGISTERSTOBERELOADEDWITHTHE16BITVALUEINRCAP2HANDRCAP2LTHEVALUESINTIMERINCAPTUREMODERCAP2HANDRCAP2LAREPRESETBYSOFTWAREIFEXEN21,A16BITRELOADCANBETRIGGEREDEITHERBYANOVERFLOWORBYA1TO0TRANSITIONATEXTERNALINPUTT2EXTHISTRANSITIONALSOSETSTHEEXF2BITBOTHTHETF2ANDEXF2BITSCANGENERATEANINTERRUPTIFENABLEDSETTINGTHEDCENBITENABLESTIMER2TOCOUNTUPORDOWN,ASSHOWNINFIGURE102INTHISMODE,THET2EXPINCONTROLSTHEDIRECTIONOFTHECOUNTALOGIC1ATT2EXMAKESTIMER2COUNTUPTHETIMERWILLOVERFLOWAT0FFFFHANDSETTHETF2BITTHISOVERFLOWALSOCAUSESTHE16BITVALUEINRCAP2HANDRCAP2LTOBERELOADEDINTOTHETIMERREGISTERS,TH2ANDTL2,RESPECTIVELYALOGIC0ATT2EXMAKESTIMER2COUNTDOWNTHETIMERUNDERFLOWSWHENTH2ANDTL2EQUALTHEVALUESSTOREDINRCAP2HANDRCAP2LTHEUNDERFLOWSETSTHETF2BITANDCAUSES0FFFFHTOBERELOADEDINTOTHETIMERREGISTERSTHEEXF2BITTOGGLESWHENEVERTIMER2OVERFLOWSORUNDERFLOWSANDCANBEUSEDASA17THBITOFRESOLUTIONINTHISOPERATINGMODE,EXF2DOESNOTFLAGANINTERRUPT8BAUDRATEGENERATORTIMER2ISSELECTEDASTHEBAUDRATEGENERATORBYSETTINGTCLKAND/ORRCLKINT2CONNOTETHATTHEBAUDRATESFORTRANSMITANDRECEIVECANBEDIFFERENTIFTIMER2ISUSEDFORTHERECEIVERORTRANSMITTERANDTIMER1ISUSEDFORTHEOTHERFUNCTIONSETTINGRCLKAND/ORTCLKPUTSTIMER2INTOITSBAUDRATEGENERATORMODETHEBAUDRATEGENERATORMODEISSIMILARTOTHEAUTORELOADMODE,INTHATAROLLOVERINTH2CAUSESTHETIMER2REGISTERSTOBERELOADEDWITHTHE16BITVALUEINREGISTERSRCAP2HANDRCAP2L,WHICHAREPRESETBYSOFTWARETHEBAUDRATESINMODES1AND3AREDETERMINEDBYTIMER2SOVERFLOWRATEACCORDINGTOTHEFOLLOWINGEQUATIONTHETIMERCANBECONFIGUREDFOREITHERTIMERORCOUNTEROPERATIONINMOSTAPPLICATIONS,ITISCONFIGUREDFORTIMEROPERATIONCP/0THETIMEROPERATIONIST2DIFFERENTFORTIMER2WHENITISUSEDASABAUDRATEGENERATORNORMALLY,ASATIMER,ITINCREMENTSEVERYMACHINECYCLEAT1/12THEOSCILLATORFREQUENCYASABAUDRATEGENERATOR,HOWEVER,ITINCREMENTSEVERYSTATETIMEAT1/2THEOSCILLATORFREQUENCY9PROGRAMMABLECLOCKOUTA50DUTYCYCLECLOCKCANBEPROGRAMMEDTOCOMEOUTONP10THISPIN,BESIDESBEINGAREGULARI/OPIN,HASTWOALTERNATEFUNCTIONSITCANBEPROGRAMMEDTOINPUTTHEEXTERNALCLOCKFORTIMER/COUNTER2ORTOOUTPUTA50DUTYCYCLECLOCKRANGINGFROM61HZTO4MHZFORA16MHZOPERATINGFREQUENCYTOCONFIGURETHETIMER/COUNTER2ASACLOCKGENERATOR,BITC/T2CON1MUSTBECLEAREDANDBITT2T2OET2MOD1MUSTBESETBITTR2T2CON2STARTSANDSTOPSTHETIMERTHECLOCKOUTFREQUENCYDEPENDSONTHEOSCILLATORFREQUENCYANDTHERELOADVALUEOFTIMER2CAPTUREREGISTERSRCAP2H,RCAP2L,ASSHOWNINTHEFOLLOWINGEQUATIONINTHECLOCKOUTMODE,TIMER2ROLLOVERSWILLNOTGENERATEANINTERRUPTTHISBEHAVIORISSIMILARTOWHENTIMER2ISUSEDASABAUDRATEGENERATORITISPOSSIBLETOUSETIMER2ASABAUDRATEGENERATORANDACLOCKGENERATORSIMULTANEOUSLYNOTE,HOWEVER,THATTHEBAUDRATEANDCLOCKOUTFREQUENCIESCANNOTBEDETERMINEDINDEPENDENTLYFROMONEANOTHERSINCETHEYBOTHUSERCAP2HANDRCAP2L10INTERRUPTSTHEAT89S52HASATOTALOFSIXINTERRUPTVECTORSTWOEXTERNALINTERRUPTSINT0AND,THREETIMERINTERRUPTSTIMERS0,1,AND2,ANDTHESERIALPORTINTERRUPTINT1EACHOFTHESEINTERRUPTSOURCESCANBEINDIVIDUALLYENABLEDORDISABLEDBYSETTINGORCLEARINGABITINSPECIALFUNCTIONREGISTERIEIEALSOCONTAINSAGLOBALDISABLEBIT,EA,WHICHDISABLESALLINTERRUPTSATONCENOTETHATBITPOSITIONIE6ISUNIMPLEMENTEDUSERSOFTWARESHOULDNOTWRITEA1TOTHISBITPOSITION,SINCEITMAYBEUSEDINFUTUREAT89PRODUCTSTIMER2INTERRUPTISGENERATEDBYTHELOGICALOROFBITSTF2ANDEXF2INREGISTERT2CONNEITHEROFTHESEFLAGSISCLEAREDBYHARDWAREWHENTHESERVICEROUTINEISVECTOREDTOINFACT,THESERVICEROUTINEMAYHAVETODETERMINEWHETHERITWASTF2OREXF2THATGENERATEDTHEINTERRUPT,ANDTHATBITWILLHAVETOBECLEAREDINSOFTWARETHETIMER0ANDTIMER1FLAGS,TF0ANDTF1,ARESETATS5P2OFTHECYCLEINWHICHTHETIMERSOVERFLOWTHEVALUESARETHENPOLLEDBYTHECIRCUITRYINTHENEXTCYCLEHOWEVER,THETIMER2FLAG,TF2,ISSETATS2P2ANDISPOLLEDINTHESAMECYCLEINWHICHTHETIMEROVERFLOWS11OSCILLATORCHARACTERISTICSXTAL1ANDXTAL2ARETHEINPUTANDOUTPUT,RESPECTIVELY,OFANINVERTINGAMPLIFIERTHATCANBECONFIGUREDFORUSEASANONCHIPOSCILLATOREITHERAQUARTZCRYSTALORCERAMICRESONATORMAYBEUSEDTODRIVETHEDEVICEFROMANEXTERNALCLOCKSOURCE,XTAL2SHOULDBELEFTUNCONNECTEDWHILEXTAL1ISDRIVEN,THEREARENOREQUIREMENTSONTHEDUTYCYCLEOFTHEEXTERNALCLOCKSIGNAL,SINCETHEINPUTTOTHEINTERNALCLOCKINGCIRCUITRYISTHROUGHADIVIDEBYTWOFLIPFLOP,BUTMINIMUMANDMAXIMUMVOLTAGEHIGHANDLOWTIMESPECIFICATIONSMUSTBEOBSERVEDOSCILATORFEQUNCYCLOCKOUTFREQNCY4653RCAP2H,L12IDLEMODEINIDLEMODE,THECPUPUTSITSELFTOSLEEPWHILEALLTHEONCHIPPERIPHERALSREMAINACTIVETHEMODEISINVOKEDBYSOFTWARETHECONTENTOFTHEONCHIPRAMANDALLTHESPECIALFUNCTIONSREGISTERSREMAINUNCHANGEDDURINGTHISMODETHEIDLEMODECANBETERMINATEDBYANYENABLEDINTERRUPTORBYAHARDWARERESETNOTETHATWHENIDLEMODEISTERMINATEDBYAHARDWARERESET,THEDEVICENORMALLYRESUMESPROGRAMEXECUTIONFROMWHEREITLEFTOFF,UPTOTWOMACHINECYCLESBEFORETHEINTERNALRESETALGORITHMTAKESCONTROLONCHIPHARDWAREINHIBITSACCESSTOINTERNALRAMINTHISEVENT,BUTACCESSTOTHEPORTPINSISNOTINHIBITEDTOELIMINATETHEPOSSIBILITYOFANUNEXPECTEDWRITETOAPORTPINWHENIDLEMODEISTERMINATEDBYARESET,THEINSTRUCTIONFOLLOWINGTHEONETHATINVOKESIDLEMODESHOULDNOTWRITETOAPORTPINORTOEXTERNALMEMORY13POWERDOWNMODEINTHEPOWERDOWNMODE,THEOSCILLATORISSTOPPED,ANDTHEINSTRUCTIONTHATINVOKESPOWERDOWNISTHELASTINSTRUCTIONEXECUTEDTHEONCHIPRAMANDSPECIALFUNCTIONREGISTERSRETAINTHEIRVALUESUNTILTHEPOWERDOWNMODEISTERMINATEDEXITFROMPOWERDOWNMODECANBEINITIATEDEITHERBYAHARDWARERESETORBYANENABLEDEXTERNALINTERRUPTRESETREDEFINESTHESFRSBUTDOESNOTCHANGETHEONCHIPRAMTHERESETSHOULDNOTBEACTIVATEDBEFOREVCCISRESTOREDTOITSNORMALOPERATINGLEVELANDMUSTBEHELDACTIVELONGENOUGHTOALLOWTHEOSCILLATORTORESTARTANDSTABILIZEAT89S52单片机主要性能与MCS51单片机产品兼容8K字节在系统可编程FLASH存储器1000次擦写周期全静态操作0HZ33HZ三级加密程序存储器32个可编程I/O口线三个16位定时器/计数器八个中断源全双工UART串行通道低功耗空闲和掉电模式掉电后中断可唤醒看门狗定时器双数据指针掉电标识符1功能特征描述AT89S52是一种低功耗、高性能CMOS8位微控制器，具有8K在系统可编程FLASH存储器。使用ATMEL公司高密度非易失性存储器技术制造，与工业80C51产品指令和引脚完全兼容。片上FLASH允许程序存储器在系统可编程，亦适于常规编程器。在单芯片上，拥有灵巧的8位CPU和在系统可编程FLASH，使得AT89S52为众多嵌入式控制应用系统提供高灵活、超有效的解决方案。AT89S52具有以下标准功能8K字节FLASH，256字节RAM，32位I/O口线，看门狗定时器，2个数据指针，三个16位定时器/计数器，一个6向量2级中断结构，全双工串行口，片内晶振及时钟电路。另外，AT89S52可降至0HZ静态逻辑操作，支持2种软件可选择节电模式。空闲模式下，CPU停止工作，允许RAM、定时器/计数器、串口、中断继续工作。掉电保护方式下，RAM内容被保存，振荡器被冻结，单片机一切工作停止，直到下一个中断或硬件复位为止。2引脚功能VCC电源GND接地P0口P0口是一个8位漏极开路的双向I/O口。作为输出口，每位能驱动8个TTL逻辑电平。对P0端口写“1”时，引脚用作高阻抗输入。当访问外部程序和数据存储器时，P0口也被作为低8位地址/数据复用。在这种模式下，P0具有内部上拉电阻。在FLASH编程时，P0口也用来接收指令字节；在程序校验时，输出指令字节。程序校验时，需要外部上拉电阻。24P1口P1口是一个具有内部上拉电阻的8位双向I/O口，P1输出缓冲器能驱动4个TTL逻辑电平。对P1端口写“1”时，内部上拉电阻把端口拉高，此时可以作为输入口使用。作为输入使用时，被