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THESERIESSCMOFAT8911AT89C511FEATURES4KBYTESOFINSYSTEMREPROGRAMMABLEFLASHMEMORYENDURANCE1,000WRITE/ERASECYCLESTHREELEVELPROGRAMMEMORYLOCK128X8BITINTERNALRAM32PROGRAMMABLEI/OLINESTWO16BITTIMER/COUNTERSSIXINTERRUPTSOURCESLOWPOWERIDLEANDPOWERDOWNMODES2DESCRIPTIONTHEAT89C51ISALOWPOWER,HIGHPERFORMANCECMOS8BITMICROCOMPUTERWITH4KBYTESOFFLASHPROGRAMMABLEANDERASABLEREADONLYMEMORYPEROMTHEDEVICEISMANUFACTUREDUSINGATMELSHIGHDENSITYNONVOLATILEMEMORYTECHNOLOGYANDISCOMPATIBLEWITHTHEINDUSTRYSTANDARDMCS51INSTRUCTIONSETANDPINOUTTHEONCHIPFLASHALLOWSTHEPROGRAMMEMORYTOBEREPROGRAMMEDINSYSTEMORBYACONVENTIONALNONVOLATILEMEMORYPROGRAMMERBYCOMBININGAVERSATILE8BITCPUWITHFLASHONAMONOLITHICCHIP,THEATMELAT89C51ISAPOWERFULMICROCOMPUTERWHICHPROVIDESAHIGHLYFLEXIBLEANDCOSTEFFECTIVE3PINCONFIGURATIONS4PINDESCRIPTIONVCCSUPPLYVOLTAGEGNDGROUNDFIGUREA1PORT0PORT0ISAN8BITOPENDRAINBIDIRECTIONALI/OPORTASANOUTPUTPORT,EACHPINCANSINKEIGHTTTLINPUTSWHEN1SAREWRITTENTOPORT0PINS,THEPINSCANBEUSEDASHIGHIMPEDANCEINPUTSPORT0MAYALSOBECONFIGUREDTOBETHEMULTIPLEXEDLOWORDERADDRESS/DATABUSDURINGACCESSESTOEXTERNALPROGRAMANDDATAMEMORYINTHISMODEP0HASINTERNALPULLUPSPORT0ALSORECEIVESTHECODEBYTESDURINGFLASHPROGRAMMING,ANDOUTPUTSTHECODEBYTESDURINGPROGRAMVERIFICATIONEXTERNALPULLUPSAREREQUIREDDURINGPROGRAMVERIFICATIONPORT1PORT1ISAN8BITBIDIRECTIONALI/OPORTWITHINTERNALPULLUPSTHEPORT1OUTPUTBUFFERSCANSINK/SOURCEFOURTTLINPUTSWHEN1SAREWRITTENTOPORT1PINSTHEYAREPULLEDHIGHBYTHEINTERNALPULLUPSANDCANBEUSEDASINPUTSASINPUTS,PORT1PINSTHATAREEXTERNALLYBEINGPULLEDLOWWILLSOURCECURRENTTTLBECAUSEOFTHEINTERNALPULLUPSPORT1ALSORECEIVESTHELOWORDERADDRESSBYTESDURINGFLASHPROGRAMMINGANDVERIFICATIONPORT2PORT2ISAN8BITBIDIRECTIONALI/OPORTWITHINTERNALPULLUPSTHEPORT2OUTPUTBUFFERSCANSINK/SOURCEFOURTTLINPUTSWHEN1SAREWRITTENTOPORT2PINSTHEYAREPULLEDHIGHBYTHEINTERNALPULLUPSANDCANBEUSEDASINPUTSASINPUTS,PORT2PINSTHATAREEXTERNALLYBEINGPULLEDLOWWILLSOURCECURRENTTTLBECAUSEOFTHEINTERNALPULLUPSPORT2EMITSTHEHIGHORDERADDRESSBYTEDURINGFETCHESFROMEXTERNALPROGRAMMEMORYANDDURINGACCESSESTOEXTERNALDATAMEMORYTHATUSE16BITADDRESSESMOVXDPTRINTHISAPPLICATION,ITUSESSTRONGINTERNALPULLUPSWHENEMITTING1SDURINGACCESSESTOEXTERNALDATAMEMORYTHATUSE8BITADDRESSESMOVXRI,PORT2EMITSTHECONTENTSOFTHEP2SPECIALFUNCTIONREGISTERPORT2ALSORECEIVESTHEHIGHORDERADDRESSBITSANDSOMECONTROLSIGNALSDURINGFLASHPROGRAMMINGANDVERIFICATIONPORT3PORT3ISAN8BITBIDIRECTIONALI/OPORTWITHINTERNALPULLUPSTHEPORT3OUTPUTBUFFERSCANSINK/SOURCEFOURTTLINPUTSWHEN1SAREWRITTENTOPORT3PINSTHEYAREPULLEDHIGHBYTHEINTERNALPULLUPSANDCANBEUSEDASINPUTSASINPUTS,PORT3PINSTHATAREEXTERNALLYBEINGPULLEDLOWWILLSOURCECURRENTTTLBECAUSEOFTHEPULLUPSPORT3ALSOSERVESTHEFUNCTIONSOFVARIOUSSPECIALFEATURESOFTHEAT89C51ASLISTEDBELOWPORT3ALSORECEIVESSOMECONTROLSIGNALSFORFLASHPROGRAMMINGANDVERIFICATIONRSTRESETINPUTAHIGHONTHISPINFORTWOMACHINECYCLESWHILETHEOSCILLATORISRUNNINGRESETSTHEDEVICEPSENPROGRAMSTOREENABLEISTHEREADSTROBETOEXTERNALPROGRAMMEMORYWHENTHEAT89C51ISEXECUTINGCODEFROMEXTERNALPROGRAMMEMORY,PSENISACTIVATEDTWICEEACHMACHINECYCLE,EXCEPTTHATTWOPSENACTIVATIONSARESKIPPEDDURINGEACHACCESSTOEXTERNALDATAMEMORYALE/PROGADDRESSLATCHENABLEOUTPUTPULSEFORLATCHINGTHELOWBYTEOFTHEADDRESSDURINGACCESSESTOEXTERNALMEMORYTHISPINISALSOTHEPROGRAMPULSEINPUTPROGDURINGFLASHPROGRAMMINGINNORMALOPERATIONALEISEMITTEDATACONSTANTRATEOF1/6THEOSCILLATORFREQUENCY,ANDMAYBEUSEDFOREXTERNALTIMINGORCLOCKINGPURPOSESNOTE,HOWEVER,THATONEALEPULSEISSKIPPEDDURINGEACHACCESSTOEXTERNALDATAMEMORYIFDESIRED,ALEOPERATIONCANBEDISABLEDBYSETTINGBIT0OFSFRLOCATION8EHWITHTHEBITSET,ALEISACTIVEONLYDURINGAMOVXORMOVCINSTRUCTIONOTHERWISE,THEPINISWEAKLYPULLEDHIGHSETTINGTHEALEDISABLEBITHASNOEFFECTIFTHEMICROCONTROLLERISINEXTERNALEXECUTIONMODEEA/VPPEXTERNALACCESSENABLEEAMUSTBESTRAPPEDTOGNDINORDERTOENABLETHEDEVICETOFETCHCODEFROMEXTERNALPROGRAMMEMORYLOCATIONSSTARTINGAT0000HUPTOFFFFHNOTE,HOWEVER,THATIFLOCKBIT1ISPROGRAMMED,EAWILLBEINTERNALLYLATCHEDONRESETEASHOULDBESTRAPPEDTOVCCFORINTERNALPROGRAMEXECUTIONSTHISPINALSORECEIVESTHE12VOLTPROGRAMMINGENABLEVOLTAGEVPPDURINGFLASHPROGRAMMING,FORPARTSTHATREQUIRE12VOLTVPPXTAL1INPUTTOTHEINVERTINGOSCILLATORAMPLIFIERANDINPUTTOTHEINTERNALCLOCKOPERATINGCIRCUITXTAL2OUTPUTFROMTHEINVERTINGOSCILLATORAMPLIFIER5OSCILLATORCHARACTERISTICSXTAL1ANDXTAL2ARETHEINPUTANDOUTPUT,RESPECTIVELY,OFANINVERTINGAMPLIFIERWHICHCANBECONFIGUREDFORUSEASANONCHIPOSCILLATOR,ASSHOWNINFIGURE1EITHERAQUARTZCRYSTALORCERAMICRESONATORMAYBEUSEDTODRIVETHEDEVICEFROMANEXTERNALCLOCKSOURCE,XTAL2SHOULDBELEFTUNCONNECTEDWHILEXTAL1ISDRIVENASSHOWNINFIGURE2THEREARENOREQUIREMENTSONTHEDUTYCYCLEOFTHEEXTERNALCLOCKSIGNAL,SINCETHEINPUTTOTHEINTERNALCLOCKINGCIRCUITRYISTHROUGHADIVIDEBYTWOFLIPFLOP,BUTMINIMUMANDMAXIMUMVOLTAGEHIGHANDLOWTIMESPECIFICATIONSMUSTBEOBSERVED6IDLEMODEINIDLEMODE,THECPUPUTSITSELFTOSLEEPWHILEALLTHEONCHIPPERIPHERALSREMAINACTIVETHEMODEISINVOKEDBYSOFTWARETHECONTENTOFTHEONCHIPRAMANDALLTHESPECIALFUNCTIONSREGISTERSREMAINUNCHANGEDDURINGTHISMODETHEIDLEMODECANBETERMINATEDBYANYENABLEDINTERRUPTORBYAHARDWARERESETITSHOULDBENOTEDTHATWHENIDLEISTERMINATEDBYAHARDWARERESET,THEDEVICENORMALLYRESUMESPROGRAMEXECUTION,FROMWHEREITLEFTOFF,UPTOTWOMACHINECYCLESBEFORETHEINTERNALRESETALGORITHMTAKESCONTROLONCHIPHARDWAREINHIBITSACCESSTOINTERNALRAMINTHISEVENT,BUTACCESSTOTHEPORTPINSISNOTINHIBITEDTOELIMINATETHEPOSSIBILITYOFANUNEXPECTEDWRITETOAPORTPINWHENIDLEISTERMINATEDBYRESET,THEINSTRUCTIONFOLLOWINGTHEONETHATINVOKESIDLESHOULDNOTBEONETHATWRITESTOAPORTPINORTOEXTERNALMEMORY7POWERDOWNMODEINTHEPOWERDOWNMODE,THEOSCILLATORISSTOPPED,ANDTHEINSTRUCTIONTHATINVOKESPOWERDOWNISTHELASTINSTRUCTIONEXECUTEDTHEONCHIPRAMANDSPECIALFUNCTIONREGISTERSRETAINTHEIRVALUESUNTILTHEPOWERDOWNMODEISTERMINATEDTHEONLYEXITFROMPOWERDOWNISAHARDWARERESETRESETREDEFINESTHESFRSBUTDOESNOTCHANGETHEONCHIPRAMTHERESETSHOULDNOTBEACTIVATEDBEFOREVCCISRESTOREDTOITSNORMALOPERATINGLEVELANDMUSTBEHELDACTIVELONGENOUGHTOALLOWTHEOSCILLATORTORESTARTANDSTABILIZE8PROGRAMMEMORYLOCKBITSONTHECHIPARETHREELOCKBITSWHICHCANBELEFTUNPROGRAMMEDUORCANBEPROGRAMMEDPTOOBTAINTHEADDITIONALFEATURESLISTEDINTHETABLEBELOW9PROGRAMMINGTHEFLASHTHEAT89C51ISNORMALLYSHIPPEDWITHTHEONCHIPFLASHMEMORYARRAYINTHEERASEDSTATETHATIS,CONTENTSFFHANDREADYTOBEPROGRAMMEDTHEPROGRAMMINGINTERFACEACCEPTSEITHERAHIGHVOLTAGE12VOLTORALOWVOLTAGEVCCPROGRAMENABLESIGNALTHELOWVOLTAGEPROGRAMMINGMODEPROVIDESACONVENIENTWAYTOPROGRAMTHEAT89C51INSIDETHEUSERSSYSTEM,WHILETHEHIGHVOLTAGEPROGRAMMINGMODEISCOMPATIBLEWITHCONVENTIONALTHIRDPARTYFLASHOREPROMPROGRAMMERSTHEAT89C51ISSHIPPEDWITHEITHERTHEHIGHVOLTAGEORLOWVOLTAGEPROGRAMMINGMODEENABLEDTHERESPECTIVETOPSIDEMARKINGANDDEVICESIGNATURECODESARELISTEDINTHEFOLLOWINGTABLETHEAT89C51CODEMEMORYARRAYISPROGRAMMEDBYTEBYBYTEINEITHERPROGRAMMINGMODETOPROGRAMANYNONBLANKBYTEINTHEONCHIPFLASHMEMORY,THEENTIREMEMORYMUSTBEERASEDUSINGTHECHIPERASEMODEPROGRAMMINGALGORITHMBEFOREPROGRAMMINGTHEAT89C51,THEADDRESS,DATAANDCONTROLSIGNALSSHOULDBESETUPACCORDINGTOTHEFLASHPROGRAMMINGMODETABLEANDFIGURE3ANDFIGURE4TOPROGRAMTHEAT89C51,TAKETHEFOLLOWINGSTEPS（1）INPUTTHEDESIREDMEMORYLOCATIONONTHEADDRESSLINES（2）INPUTTHEAPPROPRIATEDATABYTEONTHEDATALINES（3）ACTIVATETHECORRECTCOMBINATIONOFCONTROLSIGNALS（4）RAISEEA/VPPTO12VFORTHEHIGHVOLTAGEPROGRAMMINGMODE（5）PULSEALE/PROGONCETOPROGRAMABYTEINTHEFLASHARRAYORTHELOCKBITSTHEBYTEWRITECYCLEISSELFTIMEDANDTYPICALLYTAKESNOMORETHAN15MS（6）REPEATSTEPS1THROUGH5,CHANGINGTHEADDRESSANDDATAFORTHEENTIREARRAYORUNTILTHEENDOFTHEOBJECTFILEISREACHEDDATAPOLLINGTHEAT89C51FEATURESDATAPOLLINGTOINDIATETHEENDOFAWRITECYCLEDURINGAWRITECYCLE,ANATTEMPTEDREADOFTHELASTBYTEWRITTENWILLRESULTINTHECOMPLEMENTOFTHEWRITTENDATUMONP07ONCETHEWRITECYCLEHASBEENCOMPLETED,TRUEDATAAREVALIDONALLOUTPUTS,ANDTHENEXTCYCLEMAYBEGINDATAPOLLINGMAYBEGINANYTIMEAFTERAWRITECYCLEHASBEENINITIATEDREADY/BUSYTHEPROGRESSOFBYTEPROGRAMMINGCANALSOBEMONITOREDBYTHERDY/BSYOUTPUTSIGNALP34ISPULLEDLOWAFTERALEGOESHIGHDURINGPROGRAMMINGTOINDICATEBUSYP34ISPULLEDHIGHAGAINWHENPROGRAMMINGISDONETOINDICATEREADYPROGRAMVERIFYIFLOCKBITSLB1ANDLB2HAVENOTBEENPROGRAMMED,THEPROGRAMMEDCODEDATACANBEREADBACKVIATHEADDRESSANDDATALINESFORVERIFICATIONTHELOCKBITSCANNOTBEVERIFIEDDIRECTLYVERIFICATIONOFTHELOCKBITSISACHIEVEDBYOBSERVINGTHATTHEIRFEATURESAREENABLEDCHIPERASETHEENTIREFLASHARRAYISERASEDELECTRICALLYBYUSINGTHEPROPERCOMBINATIONOFCONTROLSIGNALSANDBYHOLDINGALE/PROGLOWFOR10MSTHECODEARRAYISWRITTENWITHALL“1”STHECHIPERASEOPERATIONMUSTBEEXECUTEDBEFORETHECODEMEMORYCANBEREPROGRAMMEDREADINGTHESIGNATUREBYTESTHESIGNATUREBYTESAREREADBYTHESAMEPROCEDUREASANORMALVERIFICATIONOFLOCATIONS030H,031H,AND032H,EXCEPTTHATP36ANDP37MUSTBEPULLEDTOALOGICLOWTHEVALUESRETURNEDAREASFOLLOWS030H1EHINDICATESMANUFACTUREDBYATMEL031H51HINDICATES89C51032HFFHINDICATES12VPROGRAMMING032H05HINDICATES5VPROGRAMMING12AT89C52THEAT89C52ISALOWPOWER,HIGHPERFORMANCECMOS8BITMICROCOMPUTERWITH8KBYTESOFFLASHPROGRAMMABLEANDERASABLEREADONLYMEMORYPEROMTHEDEVICEISMANUFACTUREDUSINGATMELSHIGHDENSITYNONVOLATILEMEMORYTECHNOLOGYANDISCOMPATIBLEWITHTHEINDUSTRYSTANDARD80C51AND80C52INSTRUCTIONSETANDPINOUTTHEONCHIPFLASHALLOWSTHEPROGRAMMEMORYTOBEREPROGRAMMEDINSYSTEMORBYACONVENTIONALNONVOLATILEMEMORYPROGRAMMERBYCOMBININGAVERSATILE8BITCPUWITHFLASHONAMONOLITHICCHIP,THEATMELAT89C52ISAPOWERFULMICROCOMPUTERWHICHPROVIDESAHIGHLYFLEXIBLEANDCOSTEFFECTIVESOLUTIONTOMANYEMBEDDEDCONTROLAPPLICATIONSTHEAT89C52PROVIDESTHEFOLLOWINGSTANDARDFEATURES8KBYTESOFFLASH,256BYTESOFRAM,32I/OLINES,THREE16BITTIMER/COUNTERS,ASIXVECTORTWOLEVELINTERRUPTARCHITECTURE,AFULLDUPLEXSERIALPORT,ONCHIPOSCILLATOR,ANDCLOCKCIRCUITRYINADDITION,THEAT89C52ISDESIGNEDWITHSTATICLOGICFOROPERATIONDOWNTOZEROFREQUENCYANDSUPPORTSTWOSOFTWARESELECTABLEPOWERSAVINGMODESTHEIDLEMODESERIALPORT,ANDINTERRUPTSYSTEMTOCONTINUEFUNCTIONINGTHEPOWERDOWNMODESAVESTHERAMCONTENTSBUTFREEZESTHEOSCILLATOR,DISABLINGALLOTHERCHIPFUNCTIONSUNTILTHENEXTHARDWARERESETFEATURESCOMPATIBLEWITHMCS51PRODUCTS8KBYTESOFINSYSTEMREPROGRAMMABLEFLASHMEMORYENDURANCE1,000WRITE/ERASECYCLESFULLYSTATICOPERATION0HZTO24MHZTHREELEVELPROGRAMMEMORYLOCK256X8BITINTERNALRAM32PROGRAMMABLEI/OLINESTHREE16BITTIMER/COUNTERSEIGHTINTERRUPTSOURCESPROGRAMMABLESERIALCHANNELLOWPOWERIDLEANDPOWERDOWNMODESPINDESCRIPTIONVCCSUPPLYVOLTAGEGNDGROUNDAT89系列单片机11AT89C511、特性内含4KB的FLASH存储器，擦写次数1000次；具有可编程的3级程序锁定器；内含128字节的RAM；具有32根可编程的I/O线；具有2个16位可编程定时器；具有6个中断源；两种低功耗工作模式，即空闲模式和掉电模式；2、概述AT89C51是一种低功耗，高性能，采用CMOS工艺的8KB的可在线编程的FLASH存储器。该单片机采用了ATMEL公司的高密度、非易失性存储器技术，与工业标准型MCS51单片机的指令系统和引脚完全兼容；片内的FLASH存储器可在线重新编程，或使用通用的非易失性存储器编程器；通用的8位CPU与在线可编程FLASH集成在一块芯片上，从而使AT89C51功能更加完善，应用更加灵活；具有较高的性能价格比3、AT89C51单片机的封装形式4、引脚描述VCC电源电压输入引脚。GND电源地。P0口8位、开漏极、双向I/O口。P0口可用作通用I/O口，但须外接上拉电阻，每个引脚可吸收8个TTL灌电流，当作为输入时，首先应将引脚置1。P0口也可用作访问外部程序存储器和数据存储器时的低8位地址/数据总线的复用线。在该模式下，P0口含有内部上拉电阻。在FLASH编程时，P0口接收代码字节数据；在编程校验时，P0口输出代码字节数据。P1口8位、双向I/O口，内部含有上拉电阻。P1口可作普通I/O口。输出缓冲器可驱动4个TTL负载；用作输入时，先将引脚置1，由片内上拉电阻将其抬到高电平。P1口的引脚可由外部负载拉到低电平，通过上拉电阻提供拉电流。在FLASH并行编程和校验时，P1口可输入地字节地址。P2口具有内部上拉电阻的8位双向I/O口。P2口用作输出口时，可驱动4个TTL负载；用做输入口时，先将引脚置1，由内部上拉电阻将其提高到高电平。若负载为低电平，则通过内部上拉电阻向外输出电流。CPU访问外部16位地址的存储器时，在FLASH并行编程和校验时，P2口可输入高字节地址和某些控制信号。在P3口具有内部上拉电阻的8位双向口。P3口用做输出口时，输出缓冲器可吸收4个TTL的灌电流；用做输入口时，首先将引脚置1，由内部上拉电阻抬为高电平。若外部的负载是低电平，则通过内部上拉电阻向外输出电流。在与FLASH并行编程和校验时，P3口可输入某些控制信号。P3口除了通用I/O功能外，还有替代功能。RST复位输入信号，高电平有效。在振荡器稳定工作时，在RST脚施加两个机器周期（即24个晶振周期）以上的高电平，将器件复位。PSEN片外程序存储器读选通信号PSEN（PROGRAMSTOREENABLE）,低电平有效。当AT89C51执行来自外部程序存储器的指令代码时，PSEN每个机器周期两次有效。在访问外部数据存储器时，PSEN无效。ALE/PROG低字节地址锁存信号ALE（ADDRESSLATCHENABLE）。在系统扩展时，ALE的下降沿将P0口输出的低8位地址琐存在外接的地址琐存器中，以实现低字节地址和数据的分时传送。此外，ALE端连续输出正脉冲，频率为晶振频率的1/6，可用做外部定时脉冲使用。但要注意，每次访问外RAM时要丢失一个ALE脉冲。再编程期间，该引脚输入编程脉冲（PROG）。如果需要，则通过SFR（8EH）的第0位置1，可禁止ALE操作，但在使用MOVC或MOVX指令时，ALE仍然有效。也就是说，ALE的禁止位不影响对外部存储器的访问。EA/VPP外部程序存储器访问允许信号EA（EXTERNALACCESSENABLE）。当信号接地时，CPU只执行片外程序存储器中的程序；当EA接VCC时，CPU首先执行片内程序存储器中的程序（0000H0FFFH），然后自动转向执行片外程序存储器中的程序（1000HFFFFH）。如果程序锁定位LB1被编程，那么值将在复位时由片内锁存。在与FLASH并行编程时，该引脚可接入12V的编程电压VPP。XTAL1是片内振荡器反相放大器和时钟发生器的输入端。XTAL2是片内振荡器反相放大器的输出端。5、振荡器的特性当使用片内振荡器时，片外振荡源和电容与XTAL1和XTAL2的接法如图B3所示。可以使用晶体谐振器和陶瓷谐振器。当使用外部振荡器信号时，外部时钟信号接入XTAL1引脚，XTAL2引脚悬空。对外部时钟信号的占空比没有要求，但高低电平持续时间不应过短。6、空闲模式在空闲模式下，CPU处于睡眠状态，振荡器和所有片内外围电路仍然有效。空闲模式可由软件设置进入。在这种模式下，片内RAM和SFR中的内容保持不变。空闲模式可通过任何一个允许中断或硬件复位退出。若用硬件复位方式结束空闲模式，则在片内复位控制逻辑发生作用前长达约两个机器周期时间内，器件从断点处开始执行程序。片内硬件禁止访问内部RAM，但不禁止访问端口。为避免采用复位方式退出空闲模式时对端口的不应有的访问，在紧随设置进入空闲指令的后面，不能是写端口或外部RAM的指令。7、掉电模式在掉电模式下，振荡器停止工作，CPU和片内所有外围部件均停止工作，但片内RAM和SFR中的内容保留不变，直到掉电模式结束。复位可重新设置SFR中的内容，但不改变片内RAM中的内容。在VCC电源恢复到正常值并维持足够长的时间之后，允许振荡器恢复并达到稳定，方可进行复位，以退出掉电模式。8、程序存储器锁定位AT89C51内含3个程序锁定位，可维持原来的非编程状态（U），或对其进行编程（P），从而得到不同的保护性能。9、FLASH存储器的编程方式AT89C51是在芯片擦除的状态下准备编程的，编程接口接受高电压或低电压编程信号。低电压编程为用户系统提供了一个方便的编程方式，而高电压编程与一般常用的EPROM编程器兼容。AT89C51有低电压和高电压编程两种模式，其顶端标志和型号。AT89C51存储器在编