汇编指令 ibm-pc汇编语言指令集（Assembly instruction, IBM-PC assembly language, instruction set）

1、汇编指令 ibm-pc汇编语言指令集（Assembly instruction, IBM-PC assembly language, instruction set）Assembly language instruction set IBM-PCData transfer instruction setMOVFunction: send the source operand to the destination operandSyntax: MOV, destination operand, source operandFormat: MOV, R1, R2MOV, R, MMOV, m, R

2、MOV, R, dataXCHGFunction: exchanging data of two operandsSyntax: XCHGFormat: XCHG, R1, R2, XCHG, m, R, XCHG, R, MPUSH, POPFunction: press operands into or take out the stackSyntax: PUSH operand, POP operandFormat: PUSH, R, PUSH, M, PUSH, data, POP, R, POP, MPUSHF, POPF, PUSHA, POPAStack instruction

3、groupFormat: PUSHF, POPF, PUSHA, POPALEA, LDS, LESFunction: take address to registerSyntax: LEA, R, m, LDS, R, m, LES, R, MXLAT (XLATB)Function: look-up table instructionSyntax: XLAT, XLAT, Marithmetic operationADD, ADCFunction: addition instructionSyntax: ADD, OP1, OP2, ADC, OP1, OP2Format: ADD, R1

4、, R2, ADD, R, m, ADD, m, R, ADD, R, dataImpact flags: C, P, A, Z, S, OSUB, SBBFunction: subtraction instructionSyntax: SUB, OP1, OP2, SBB, OP1, OP2Format: SUB, R1, R2, SUB, R, m, SUB, m, R, SUB, R, data, SUB, m, dataImpact flags: C, P, A, Z, S, OINC, DECFunction: add or subtract one from the value o

5、f OPSyntax: INC, OP, DEC, OPFormat: INC, r/m, DEC, r/mImpact flags: P, A, Z, S, ONEGFunction: inverting the symbol of OP (binary complement)Syntax: NEG OPFormat: NEG r/mImpact flags: C, P, A, Z, S, OMUL, IMULFunction: multiply instructionSyntax: MUL, OP, IMUL, OPFormat: MUL, r/m, IMUL, r/mImpact fla

6、gs: C, P, A, Z, S, O (IMUL only affects the S flag)DIV, IDIVFunction: Division instructionSyntax: DIV, OP, IDIV, OPFormat: DIV, r/m, IDIV, r/mCBW, CWDFunction: extended instruction with signed numberSyntax: CBW CWDAAA, AAS, AAM, AADFunction: non pressure BCD code operation adjustment commandSyntax:

7、AAA, AAS, AAM, AADImpact flags: A, C (AAA, AAS), S, Z, P (AAM, AAD)DAA, DASFunction: compress BCD code, adjust instructionSyntax: DAA DASImpact flags: C, P, A, Z, SBit arithmetic instruction setAND, OR, XOR, NOT, TESTFunction: perform logical operations between BIT and BITSyntax: AND, r/m, r/m/data,

8、 OR, r/m, r/m/data, XOR, r/m, r/m/data, TEST, r/m, r/m/data, NOT, r/mImpact flags: C, O, P, Z, NOT, S (where two flags of C and O are set to 0), and the instruction does not affect any flag bitsSHR, SHL, SAR, SALShift instructionSyntax: SHR, r/m, data/CL, SHL, r/m, data/CL, SAR, r/m, data/CL, SAL, r

9、/m, data/CLImpact flags: C, P, Z, S, OROR, ROL, RCR, RCLFunction: cyclic shift instructionSyntax: ROR, r/m, data/CL, ROL, r/m, data/CL, RCR, r/m, data/CL, RCL, r/m, data/CLImpact flags: C, P, Z, S, OProgram flow control instruction setCLC, STC, CMCFunction: set carry flagSyntax: CLC, STC, CMCFlag bi

10、t: CCLD, STDFunction: set the direction signSyntax: CLD STDFlag bit: DCLI, STIFunction: setting interrupt flagSyntax: CLI STIFlag bit: ICMPFunction: compare the values of OP1 and OP2Syntax: CMP, r/m, r/m/dataFlag bits: C, P, A, Z, OJMPFunction: jump to the specified addressSyntax: JMP addressJXXFunc

11、tion: when a given condition is established, jump to the specified addressSyntax: JXX addressNote:A: ABOVE, set up when C=0, Z=0B: BELOW, set up when C=1C: CARRY, when the CXZ: CX register was established. The value is 0 (ZERO) wasE: EQUAL, set up when Z=1G: GREATER (greater than) when Z=0 and S=0 a

12、re establishedL: LESS (less than) when S is not zeroN: NOT (the opposite condition) should be used in conjunction with other symbolsO:, OVERFLOW, O=1 set upP:, PARITY, P=1 set upPE:, PARITY, EVEN, P=1, set upPO:, PARITY, ODD, P=0, set upS:, SIGN, S=1 set upZ:, ZERO, Z=1 set upLOOPFunction: cyclic in

13、struction setSyntax: LOOP addressLOOPE (Z)Address LOOPNE (Z) addressFlag bit: noCALL, RETFunction: subroutine call, return instructionSyntax: CALL address, RET, RET, nFlag bit: noINT, IRETFunctions: interrupts, calls, and return instructionsSyntax: INT, N, IRETFlag bit: when INT is executed, the val

14、ue of the flag register is automatically entered by the CPU,In the implementation of IRET will mark the value in the register stack.String operations instruction setMOVSB, MOVSW, MOVSDFunction: String transfer instructionSyntax: MOVSB, MOVSW, MOVSDFlag bit: noCMPSB, CMPSW, CMPSDFunction: string comp

15、arison instructionSyntax: CMPSB, CMPSW, CMPSDFlag bits: C, P, Z, S, OSCASB, SCASWFunction: string search instructionSyntax: SCASB SCASWFlag bits: C, P, Z, S, OLODSB, LODSW, STOSB, STOSWFunction: String loading or storage instructionSyntax: LODSB, LODSW, STOSB, STOSWFlag bit: noREP, REPE, REPNEFuncti

16、on: repeating prefix instruction setSyntax: REP instruction, S REPE instruction, S REPNE instruction, SFlag bit: according to instruction SFor a IBM PC, it has its instruction system, which includes data transfer instructions, string processing instructions, arithmetic instructions, control movement

17、 instructions, logical instructions, and processor control instructions.Here will briefly introduce its instruction type and instruction instructions, if required to specific instruction format and application, please contact Amay, Amay update.1) data transfer instruction: responsible for transmitti

18、ng data, addresses, or immediate numbers to registers or storage units.Data transfer, instruction type, instruction descriptionGeneral data transfer instructions MOV (transfer), PUSH (into stack), POP (stack), XCHG (exchange)Accumulator dedicated transfer instruction IN (input instruction), OUT (inp

19、ut instruction)Address transfer instruction LEA (valid address register), LDS (pointer to register, and DS), LES (pointer to register, and ES)Flag register, transmit instruction LAHF (flag send AH), SAHF (AH send flag register), PUSHF (mark into stack), POPF (mark the stack)2) arithmetic instruction

20、: used to perform arithmetic operations.Arithmetic instructionAddition instruction ADD (addition), ADC (with carry addition), INC (plus 1)Subtract SUB (subtraction), SBB (with subtraction), DEC (minus 1), NEG (complement), CMP (comparison)Multiplication instruction MUL (unsigned multiplication) and

21、IMUL (signed multiplication)Division instruction DIV (unsigned Division), IDIV (signed number division), CBW (byte to word), and CWD (word to word)3) logical instruction: performing logical operations on words or bytes.Logical instruction type instruction specificationLogical operations, instruction

22、s AND (logic and), OR (logic or), NOT (logical, non), XOR (Yi Huo), TEST (test)Mobile command SHL (logical shift left), SAL (shift arithmetic left), SHR (logical shift), SAR, ROL (arithmetic right shift), ROR (left circle), RCL (rotate right) (rotate left), RCR (right with carry)4) string processing

23、 instructions: handling data packets stored in memory.String processing, instruction type, instruction descriptionInstruction MOVS (string transfer), CMPS (string comparison), SCAS (string scan), LODS (from string), and STOS (store string)5) control transfer instruction: used to control the flow of

24、execution of a program.Control transfer instruction type instruction specificationUnconditional transfer instruction JMP (intra segment and intra segment transfer)Conditional transfer instruction JZ (the result is 0 (or equivalent) transfer), JS (the negative transfer), JNS (the regular transfer), J

25、O (overflow transfer), JNO (not overflow transfer), JP (parity bit is 1 JNP (transfer), the parity bit is 0 transfer)Circular instruction LOOP (cyclic instruction), LOOPPZ/LOOPE (when 0 or equal), cyclic instruction, LOOPNZ/LOOPNE (when not 0 or unequal) cyclic instructionsSubroutine instruction CAL

26、L (call instruction), RET (return instruction)Interrupt instruction INT (interrupt), INTO (for example, overflow, interrupt), RIET (return from interruption)Compilation instruction Daquan (Annotated)Data transfer command- - - - - - - - - - - - - - - - - - - - - - - - - - -They transfer data between

27、memory and registers, registers, and between input and output ports1. general data transfer instructionsMOV transfers words or bytesMOVSX first symbol extension, and then transferMOVZX first zero extension, and then transferPUSH presses the word onto the stackPOP pops up the word stackPUSHA presses

28、AX, CX, DX, BX, SP, BP, SI, DI in the stack in turnPOPA pops up the stack in DI, SI, BP, SP, BX, DX, CX, AX, in turnPUSHAD presses EAX, ECX, EDX, EBX, ESP, EBP, ESI, EDI in the stack in turnPOPAD takes EDI, ESI, EBP, ESP, EBX, EDX, ECX,EAX pops up the stack in turnBSWAP switches the order of bytes i

29、n a 32 bit registerXCHG swap words or bytes. (at least one operand is a register, and segment registers cannot be used as operands)CMPXCHG compares and exchanges operands. (the second operand must be the accumulator AL/AX/EAX)XADD first swap and then accumulate (the result is in the first operand)XL

30、AT byte look-up table conversion- BX points to the starting point of a 256 byte table, and AL is the index value of the table (0-255, that is, the index value of the table0-FFH) returns AL as table look-up result (BX+AL-AL)2. input and output ports transmit instructionsIN I/O input port. (Syntax: IN

31、 accumulator, port number / DX)OUT I/O port output. (Syntax: OUT DX, port number, accumulator)The input and output ports are specified immediately, with a range of 0-255; specified by the register DX,Its range is 0-65535.3. destination address transfer instructionLEA loads valid addressesExample: LE

32、A, DX, string; saves the offset address to DX.LDS sends the target pointer and loads the pointer content into DS.Example: LDS, SI, string; the segment address: offset address is saved to DS:SI.LES sends the target pointer and loads the pointer content into ES.Example: LES, DI, string; the segment ad

33、dress: offset address is saved to ES:DI.LFS sends the target pointer and loads the pointer content into FS.Example: LFS, DI, string; the segment address: offset address is saved to FS:DI.LGS sends the target pointer and loads the pointer content into GS.Example: LGS, DI, string; the segment address:

34、 offset address is saved to GS:DI.LSS sends the target pointer and loads the pointer content into SS.Example: LSS, DI, string; the segment address: offset address is saved to SS:DI.4. flag transfer instructionsThe LAHF flag register transmits the flag to the AH.The SAHF flag register transfers the c

35、ontents of the AH into the flag registerPUSHF flags into the stackPOPF marks the stackPUSHD 32 bit flag into the stackPOPD 32 bits indicate the stackTwo, arithmetic operations instruction- - - - - - - - - - - - - - - - - - - - - - - - - - -ADD additionADC with carry additionINC plus 1.AAA addition A

36、SCII code adjustmentDecimal adjustment of DAA additionSUB subtractionSBB subtraction with borrow.DEC minus 1.NEC reverse (minus 0)CMP compare. (two operand subtraction, modify flag bit only, not echo result)ASCII subtraction AAS code adjustmentDecimal adjustment of DAS subtractionMUL unsigned multip

37、licationIMUL integer multiplicationThe above two, the results sent back to AH and AL (byte operations), or DX and AX (word computing),ASCII code adjustment for AAM multiplicationDIV unsigned DivisionIDIV integer divisionThe above two, the results sent back:The quotient returns AL, and the remainder

38、returns AH (byte operation);Or the quotient returns AX, and the remainder returns DX (word operation)ASCII code adjustment for AAD DivisionCBW bytes are converted to words. (extending the symbols of bytes in AL to AH)The word CWD is converted to double word (extending the word symbols in AX to DX)Th

39、e word CWDE is converted to double word (extending the word symbols in AX to EAX)CDQ double word extension (extending the word symbols in EAX to EDX)Three 、 logical operation instruction- - - - - - - - - - - - - - - - - - - - - - - - - - -AND and arithmeticOr or arithmeticXOR XOR operationNOT take t

40、he reverseTEST test. (two operand and operation, modify flag bit only, not echo result)SHL logic left shiftSAL arithmetic left shift. (=SHL)The SHR logic moves rightSAR arithmetic right shift. (=SHR)ROL loop left shiftThe ROR loop moves rightRCL moves left by loop of carryRCR moves right by loop of

41、carryThe shift times of the above eight shift instructions can reach up to 255 timesOnce shifted, you can use the opcode directly, such as SHL, AX, 1.When shift 1 times, the shift number is given by register CLSuch as MOV, CL, 04SHL, AX, CLFour, serial instructions- - - - - - - - - - - - - - - - - -

42、 - - - - - - - - -DS:SI source string segment register: source string indexES:DI target string segment register: target string indexCX repeat count counterAL/AX scan valueThe D flag 0 indicates that the SI and DI should be automatically incremented during repetition, and 1 indicates automatic decrem

43、entThe Z flag is used to control the end of the scan or comparison operationMOVS string transfer(MOVSB transport characters. MOVSW transfer words. MOVSD transfer double characters.)CMPS string comparison(CMPSB compare characters. CMPSW compare words.)SCAS serial scanCompare the contents of AL or AX

44、with the destination string, and compare the results to the flag bitsLODS load stringLoad the elements (words or bytes) in the source string one by one into AL or AX(LODSB transport characters. LODSW transfer words. LODSD transfer double characters.)STOS save stringIs the inverse process of LODSREP

45、repeat when CX/ECX0REPE/REPZ repeats when ZF=1 or the comparison results are equal and CX/ECX0REPNE/REPNZ repeats when the ZF=0 or the comparison results are not equal and CX/ECX0REPC repeat when CF=1 and CX/ECX0REPNC repeat when CF=0 and CX/ECX0Five, program transfer instructions- - - - - - - - - - - - - - - - - - - - - - - - - - -1 unconditional transfer instruction (long shift)JMP unconditional transfer instructionCALL procedure callThe RET/RETF procedure returns2 c