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1、1基本信息(1)问题:the board thick ness(2.36+/-0.05mm) is too hard to control for us 对我们来说,板厚 2.36+/-0.05mm 太难管控Can we control the finished board thickness as 2.4+/-10%mm ? Pleasecomfirm!(2)comfirm!(2)(3)(4)(3)(4)请确认我们可否控制完成板厚为2.4+/-10%mm ?问题: As show in figure, manu facturi ng requireme nts specificati on,
2、 using 17 um (1/2 oz) based copper, fini shed surface copper: 46 um (0.00181 ); it is differe nt from what shows 1oz for stackup.如下图所示,制作说明要求使用17um基铜,完成铜厚46um.这跟叠构中的1OZ铜厚不符.建议:Use 1 oz based copper, fini shed surface copper: 46 um (0.00181 )使用1oz基铜,完成铜厚 46um.问题: As show in the below figure, outer co
3、pper is 1 oz.We can make sure whether the fini shed surface copper is 1 oz.如下图所示,外层铜厚为1OZ,我们不能确定完成铜厚是否为1OZ.建议: Using Hoz base copper, fini shed surface 1 oz copper;使用H oz基铜,成品铜厚为1oz.问题:The stack-up your company provided did not conform the requireme nts of impeda nee, and the inner layers n eed to u
4、se 3 Pre-preg.贵司提供的叠构不符合阻抗要求,且层需要用3pp建议: Adjust the thickness of the Pre-preg and the core 。See below.调整芯板和PP的厚度,见下图问题:The make-up like as the attachment( 12PCS/PNL), in order to savethe cost ing ,please confirm if can accept 3 X-OUT per pan el?如附件所示拼版(12pcs/PNL),为了节约成本,请确认可否接受每个拼版建议: Accepted 3 X-O
5、UT per pan el,but not exceed 5% of order qua ntity.A ndpack them separately whe n shipp ing.接受每拼版出3个打叉板,但不超过总订单数的 5%,且出货时把打叉板分开包装.(6) 问题: As show in figure, Your compa ny requireme nts accord ing to level 3 sta ndard con trols, this requireme nt is too hard to con trol for us如下图所示,贵司要求按3级标准管控,我们较难管控
6、.建议: Con trolled by level 2 sta ndard producti on.按2级标准管控生产.(7) Please confirm the attached panel draw ing.请确认附件拼版图(8)Above is our suggested stackup , please con firm.上图为我司建议叠构,请确认(9)问题:Your company have not provided the toleranee of board thickness , please confirm whether we could con trol it as 1
7、.6mm+/-10%?贵司没有提供板厚公差,请确认我司可否按1.6mm+/-10%来管控?(10)问题: We cant find the finish copper thickness and solder mask color in spec ,please provide.我们在说明书中找不到完成铜厚和防焊颜色,请提供建议: Finish copper thick ness:1oz,SM color: matte gree n完成铜厚1OZ防焊颜色:哑光绿色(11 )问题:Please see Fig1,the numberin gerber is differentfromHIT-20
8、-001200-001 in spec.请看图一,gerber中的料号跟说明书中的HIT-20-001200-001不相符.建议: We will ignore this differe nee and follow the gerber file to produce this board.我们将忽略这个不同点,然后按照gerber来制作.(12)问题: The customer requires use FR - 402 material, but we have not this kind of sheet material .客户要求使用 FR-402板材,但我们没有这种板材.建议:
9、We will use our com mon material product ion,Please confirm ! LikeKB6160 or equivale nt in stead of FR-402.我们将使用常用的板材生产,请确认.像KB6160或同等级的板材来代替 FR-402.(13)问题:In order to avoid the panel board scraped in process, we would like tocha nge the sharp corner to round an gle as R1.0mm.为了避免板子在生产过程中刮花,我们将尖的角倒角
10、为R1.0mm的角.(14)问题: See below figure ,50 Ohm impeda nee is con trolled in the gerber, butthein dicated that had no con trolled impeda nce;Actually, the calculati on also cannotreach 50 Ohm impeda nee values .不用做阻抗控制。事实上也达不到见下图,gerber中要求做50ohm阻抗控制,但中说明50ohm阻抗值.建议:Ignore the impeda nee con trol.忽略阻抗控制.(
11、15)问题: There is no 60mil core on our store , we will adjust the stackup as below fig. B show.我们仓库没有60mil的芯板,我们将调整叠构,如图B所示.(16) 问题:It is too hard to keep con ductor widths and spaci ng with in 15% of data forUS.要将线宽距控制在+/-15%,对我们来说太难了建议: We suggest to relax it as +/-20% to process .我们建议放宽到+/-20%(17)
12、问题:You do not specify the incept standard. We will follow IPC-A-600G Class2and IPC-6012B Class2 to build this board.贵司没有指明验收标准,我们将根据IPC2级标准来生产板子.(18) 问题:It doesn specify thickness of Ni and Au.没有说明镍和金的厚度.建议:We will control as : Ni: 3-6um min and Au 0.05um 我们将管控为:镍最少 3-6um,金0.05um(19) 问题: We can inpu
13、t the four files(see below fig. ) by our software用我们的软件打不开下图的4个文件.建议: We will ignore the four files. 我们将忽略这4个文件.(20) 问题: We are not sure the surface finish of this board , because the requirement of two files are different. (See below pictures.)我们不能确定这个板的表面处理,因为2个文件的要求不同.(见下图)建议: We will follow imme
14、rsio n gold to produce.( Au:0.05um(mi n),Ni:3-6um)我们将按沉金制作.(金厚最少0.05um,镍厚3-6um(21) 问题:Please see below picture, the dimension between the gerber and thedrawing is different.请看下图,图纸和 gerber的尺寸不一样.建议: We will follow gerber file to produce.我们将依gerber制作.(22) 问题: We don know the usage of these file ,and
15、we think them havenothing to do for PCB manufacture. 我们不知道这些文件的用处,我们认为他们对PCB生产没有影响.建议:We will ignore it.我们将忽略他们.(23) 问题: We dont have the standard of the BS EN0249-2-12:1994 in hand.我们没有” BS EN0249-2-12:1994的标准控制.建议: We will ignore this standard and follow IPC-4101B standard to produce.我们将忽略这个标准,然后按
16、IPC-4101B标准来生产.(24) 问题:In the future, for the same series, if we meet the same questions likeas above, we will use the an swer directly后续问题中,如有类似以上问题,我们将直接使用这次的回复来生产2文字(1)问题: Some fonts are close to pads, into holes or outside of the board outli ne. 一些文字太靠近pad,进孔或到了板外.建议: We will move them if possib
17、le, otherwise well clip them, please con firm.如果可能,我们将文字移动,否则我们会修剪文字,请确认(2)问题:We will add the UL,including our logo and date code(WWYY) at free area onthe top silkscreen layer.我们将在顶层文字的空旷位置添加UL,包括我们的标记和周期.(3)问题:In order to ide ntify the board easily, we would like to add our internal partnu mber on
18、the breakaway rails. ( or n ear our compa ny UL )为了更好地区分板子,我们想要在工艺边上添加我司料号.(或在我司UL附近)(4)问题: We turn the logo to BLDT D-B on the bottom silkscreen or not?Pleaseconfirm.请确认我们可否将底层文字的UL改为BLDT D-B ?(5)问题:You request to add UL and date code ( WWYY)on the appo in ted positi on ,but the draw ing without ap
19、po in ted positi on。We will add our compa ny UL and datecode ( WWYY) on bottom silkscreen layer as below fig.贵司要求在指定位置添加UL和周期(WWYY),但图纸上没有标出指定的位置.我们将在底层文字添加我司UL和周期(WWYY),见下图.(6)问题: Some White oil block are printed on the pads, it will affect the solderability of the pads. 一些白油块在 pad上,这会影响 pad的焊接性能.建
20、议: We will modify the lege nd to avoid them expos ing on the pads.我们将修剪文字来避免他们上pad.(7)问题: Some fonts are too close to the outline,it may cause the fonts to be in complete after manu facturi ng.一些文字太靠近外形线,这可能会导致加工后文字出现残缺建议: Reduce the font size to accommodate the tight space if possible, otherwise ac
21、cept the in complete fon ts.如果可能的话,缩小文字到一个小空间,否则就接受文字残缺(8)问题:Tthere is no eno ugh space for add ing the UL and date code on the topsilkscreen layer顶层文字不够空间添加UL.和周期建议: A: We will add them on the bottom silkscreen layer.B: We will add them on the top soldermask layer.A :在底层文字添加B:在顶层防焊添加(9)问题: Some leg
22、e nd are not mirrored on the bottom sides.在底层中,有一些文字没有镜像建议:A: we will follow geber to produce and accept the lege nd are in verse.B:we will mirror it.A :我们将依gerber生产,要接受反字.B:我们将镜像制作.(10)问题:The lege nd is very close to dummy copper pads in the work ing gerber.在工作稿中的文字太靠近焊盘.建议: A:We will shave the dum
23、my copper pads to avoid the illegible lege nd.B: Follow worki ng gerber to build,a nd the illegible lege nd is acceptableA :我们将削铜粒来避免文字模糊.B:依工作稿制作,接受文字模糊 .(11)问题:In order to avoid the silkscree n is miss ing, we will add the check patter nson the breakaway rail.为了防止漏印文字,我们将在工艺边添加测试图案3防焊(1)问题:Spaci n
24、g betwee n IC pads are 6.7mil and 7.5mil. We n eed 7.8mil to keep the solde rmask dam.Becausethe solder mask ink are blue color which is out of our capability to build the blue solder mask dam.IC之间的距离是6.7和7.5mil,我们需要7.8mil的距离来做防焊桥.因 为防焊颜色为蓝色,这样距离的蓝油桥超出我们的制程建议: We suggest can celi ng the solder mask
25、dam where the IC spaci ng is less tha n 7.8mil and make gang relief. Please confirm is that acceptable.我们建议在小于7.8mil的地方取消做防焊桥,然后按开通窗制作.请确认是否接受.(2)问题:Spaci ng between the BGA PAD and via hole is only 9.8mil, and theres solder mask dam. The spaci ng is too small to keep dam.BGA到过孔的距离只有 9.8mil,而且要做防焊桥.
26、这个距离太小,不能做桥. 建议: We will remove the vias (not the BGA pads) openings 我们将移除过孔的开窗(不是 BGA的开窗).(3)问题: The 莎 29mil component holes without solder mask openings on bottom sides,the solder mask ink will flow into holes/ 29mil的元件孔在底面没有开窗,油墨会进孔建议: A) We add solder mask ope nings for hole, Make sure the oil i
27、s not onthe PAD and not flow into the hole.B) We follow the GERBER to do ,Please confirm the solder mask ink will flow into holes are accepted.A:我们将为这些孔添加防焊开窗,确保油墨不上 pad和油墨不进孔. B:我们根据gerber制作,请确认可接受油墨进孔(4) 问题:See below figure,there is one pad on the bottom paste layer, but it without soldermask open
28、ing on the bottom solder layer.见下图.贴片层上有一个 pad 没有开窗.建议: A: follow the gerber.B:Add soldermask ope ningthat is 8mil bigger tha n the pad.A:依gerber制作.B:加一个比pad大8mil的开窗.(5) 问题: The 1.0mm holes with soldermask opening on the top soldermask layer ,but the bottom layer.Please comfirm our suggesti on1.0mm的
29、孔在顶层有开窗,但底层没开窗。请确认我们的建议.建议: A: Follow the gerber to process. 按 gerber 生产.B: Add the soldermask opening for the holes on the bottom layer , the size is the same as the top.在底层添加开窗,大小跟顶层一样(6) 问题:The soldermask opening of dia.0.40mm holes is only 8mil bigger than the via holes.直径0.40mm的孔防焊开窗只比过孔大8mil.建
30、议: A: Can cel the soldermask ope ning of via holes , the via holes plugged with solder mask is accepted.取消过孔的防焊开窗,接受过孔塞油.B: follow the gerber , and accept solder mask into the hole but no pluggi ng依gerber制作,接受油墨入孔,但不塞孔.(7) 问题:The two dia.3.2mm holes are specified as PTH in drill chart .But the solde
31、rmask ope ning is less tha n the pads on bottom soldermask layers.分孔表上直径3.2mm的孔是制作为PTH,但在底层防焊层里,开窗比pad 小. 建议: We will follow gerber to produce , and allow the solder mask encroach onto these pads. 我们将根据 GERBER生产,然后接受油墨上pad.(8) 问题:Some solder mask opening for the fiducial mark is too big that it caus
32、ed n earbori ng trace exposed in the work ing gerber.一些光学点的开窗太大,导致工作稿中他们邻近的导线露铜建议: We will trim the solder mask opening to avoid the trace exposed.我们将修改防焊开窗来避免铜线外露.(9) 问题:There is no solder mask ope ning on one side for the via hole 16mil.16mil的孔有一面防焊没开窗.建议:A: Plug these via holes with solder mask i
33、nk.B: Add solder mask opening both sides for the via hole 16mil.A:塞孔制作.B:16mil的孔双面开窗.4线路(1) 问题:Fab spec in dicates con trolled impeda nee, but does nt in dicate the trace width/gap and which layer(s).说明书要求控制阻抗,但没有指明阻抗线是哪层和线宽距建议: Please provide, or please confirm if we can ignore the impedanee reques
34、t请提供,或请确认我们是否可以忽略这个阻抗要求(2) 问题: The fiducial marks are isolated so they can easily peel off duringproductio n.光学点是孤立的,所有生产时容易脱落建议: We will add the protective copper ring around them. Please confirm isthat acceptable.我们将在他们周围添加保护环。请确认可否接受(3) 问题: Vias to be covered per the additional requirement.过孔制作方式
35、按照特别要求.建议:there are 8mil, 10mil and 12mil holes, so we will treat all of them asvias, plug and cover them with solder mask by removi ng the solder mask ope nings on both sides if any, and leave the other holes (24mils and greater) solder mask as desig n, correct?我们把8mil, 10mil和12mil的孔定为过孔,在每一面通过去掉防焊
36、开窗来使 他们塞油,像设计那样把其他的孔( 24mil或更大的)开窗制作,正确吗?(4) 问题:3 tooling holes (3.2mm NPTH) to be added on rails per the additionalrequirement.按照特殊要求添加 3个3.2mmNPTH在工艺边上.建议: We suggest adding tooling holes on all 4 corners of the rails to provide more flexibilities during PCB manufacturing and assembly, and add 3 f
37、iducials (1mm round pads, 3mm solder mask openings) on 3 corners to be fool-proof, is that acceptable?我们建议在工艺边的4个角添加定位孔,来使更适合PCB生产和装配.在3个角上添加3个光学点(1mm大小,3mm开窗)来防呆,能接受吗?we will remove the no-function(5) 问题:In order to facilitated in product ion isolated pads on the inner layers.为方便生产,我们将删除层里一些无功能的孤立p
38、ad.(6)问题: Some solder mask ope nings are very big and expos ing the surroundingcopper pla nes.些防焊开窗太大,会导致铜皮外露建议: We will reduce the solder mask openings to our default pad opening size, and if theres still a risk of exposing the surrounding copper, we will shave the copper pla ne a little to avoid e
39、xposure, is that acceptable?我们将会对不正常的防焊开窗缩小,如果仍然有铜外露的风险,我们将会削一点铜皮来避免外露,能接受吗?(7)问题: Outer layers to be 2.1mil (1.5oz, we con sider it as nomin al) per providedstackup, but due to the tight spaci ng (5.8mil only) on this desig n we can only use 0.5oz base copper.所提供的叠构中,外层铜厚为2.1mil ( 1.5oz,我们认为这是近似值),
40、但由于设计上紧密的线距(只有 5.8mil),我们只能用0.5oz的基铜来制作.建议: We will use 0.5oz base copper and plate to minimum 1oz copper on outer layers, is that acceptable?我们将使用0.5oz底铜,然后外层最少电镀到1oz铜厚,这能接受吗?(8)问题:Inner layers to be 2oz per provided stackup, but the spac ing on inner layers is tight, also we cant follow the provid
41、ed stackup on the dielectric thick ness un der outer layers because they are too thin for 2oz copper.根据所提供的叠构,层要做 2oz,但是层的线太密,满足外层的阻抗的条件 下,我们不能使用所提供的叠构.因为在2oz的铜厚条件下,介电物质太薄了.建议: Option A: to use 1oz copper on inner layers, and we dont need to change the stackup and impeda nee trace widths;Optio n B:
42、to use 2oz copper on inner layers, but n eed to cha nge the stackup and impda nee trace widths.建议A:层使用1oz铜厚,这样我们就不需要调整叠构和阻抗线的线宽建议B:层使用2oz铜厚,但需要调整叠构和阻抗线的线宽.(9)问题:The PAD is too closed to the outline, which will induce the copper exposed after process.Pad太靠近外形线,会导致加工后出现铜外露的现象建议: Shave the copper keep
43、to the outl ine 8mil to avoid the copper exposed. 削铜保持距离外形线 8mil,防止铜外露.(10)问题: See your compa ny provide the SPC, we are not sure whether to n eed to in crease the fiducial mark on the breakaway rail.(Because the breakaway rail have not fiducial mark in the GERBER)根据贵司提供的说明书,我们不确定是否需要在工艺边上添加光学点.(因为g
44、erber中的工艺边上没有光学点)建议:A) We will add the / 2.0mm fiducial mark and / 3.0mm solder mask opening of fiducial marks on breakaway rails (see fig ).B) Do not need add fiducial mark on the breakaway rail,follow the gerber todo.A :我们将在工艺边上添加/2.0mm的光学点,开窗 3mm.(见图)B:不需要再工艺边上加光学点,按gerber制作.(11)问题: We will add t
45、he V-cut testi ng pads to avoid V-cut being missed.我们将添加 V-CUT测试pad来防止漏V-CUT.(12)问题:In order to balance the plating electric current, we would like to adddummy copper foil (copper pads)on the breakaway rails. 为了平衡电镀的电 流,我们想要在工艺边上添加铜皮.(铜pad)(13)问题:See below figure ,the copper is too close to the outl
46、ine,it would causethe copper exposed.见下图,铜皮到外形线太近,这会导致铜皮外露建议: A: accept exposed copper.B: shaving the copper ,keep it 10mil from outline and 16mil from V-CUTline.A:接受露铜.B:削铜,使之距离外形线 10mil,距离V-CUT线16mil.(14)问题:Inner and outer layers in the gerber have meanin gless line.Gerber的层和外层存在无意义的线.建议:A: follow
47、 the gerber. 依 gerber 制作.B: Delete the meaningless line删除无意义的线.(15)问题: This board is a bare board without copper.we will build withoutfiducials.这是一个光板,我们将不加光学点(1)问题:In order to plate the gold on finger.We will add the leading plating line as the below picture.为了电金手指,我们将添加如下图的电镀线.(2)问题: We found the
48、area of gold fin ger have solder mask dam in the Gerber.我们在gerber中发现金手指位置有阻焊桥.建议: To aviod the solder mask dam affects the function gold finger,we will cancel it and add the full solder mask ope ning for the area of gold fin ger.为了避免阻焊桥影响金手指的功能,我们将删除阻焊桥和在金手指位置开通窗.(3)问题: No specify the depth tolera n
49、ce of gold fin ger bevel edge. We will buildgold fin ger bevel edge depthtolera nce as 0.2mm.没有说明金手指斜边的公差,我们将按+/-0.2mm 制作.(4) 问题: The gold fin ger is too close to the outl ine.lt will cause the copper exposed.金手指太靠近外形线,这会导致铜外露.建议:A:To clip gold fin ger to get 52mil (min) space to avoid copper expose
50、d.B: Follow Gerber to do, please accept copper exposed.A :修剪金手指,保证离外形最少有52mil的距离,防止铜皮外露B:依GERBER制作,请接收铜外露.(5)问题:It does not specifythe bevel an gletolera nee.没有说明斜边角度的公差.建议:The bevel angle as 5 to control.斜边角度按+/-5 来管控(6)问题: The gold fin ger outside is the breakaway rail , we cant make the goldfin g
51、er chamfer.金手指边沿是工艺边,我们做不了金手指的斜边建 议: A : Canel the breakaway on goldfin gerside.B: Dont make the gold fin ger bevel edge.A :在金手指那边取消工艺边.B:不做金手指斜边.(1) 问题:The 莎 0.35mm holes diameter toleranee :0.05mm is too hard to control.少0.35mm的孔公差+/-0.05mm 太难管控.建议: This kind of holes diamater toleranee : 0.076mm这
52、类孔的公差为+/-0.076mm(2) 问题: The quantity of holes are different between excel spec and gerber file.Excel文档跟gerber的孔数不同.建议: We will follow gerber file to do and ignore the differenee我们将根据gerber来制作,忽略这个不同点.(3) 问题: some data cant measure in drawing , suggest to ignore it and follow the GERBER to do。图纸上的一些数据测量不了,建议忽略他们,然后根据gerber来制作.(4) 问题:Customer did not identify the V - CUT Angle, and the laminate remained : 0.5+ 0.127 /-0 mm and V-CUT can extend 30% into board max, we als
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