每层电梯的入口处设有上下请求开关

1、1、每层电梯的入口处设有上下请求开关，电梯内设有乘客到达层次的停站请求开关。2、设有电梯所处位置指示装置及电梯运行模式（上升或下降）指示装置。3、电梯每秒升降一层。4、 电梯到达有停站请求的楼层后，经过1s电梯打开，开门只是灯亮，开门4s后，电梯门关闭（关门指示灯灭），电梯继续运行，直至执行完请求信号后停在当前楼层。5、能记忆电梯内外的所以请求信号，并按照电梯运行规则依次响应，每个请求信号保留至执行后消除。6、电梯运行规则：当电梯处于上升模式时，只响应比电梯所在位置高的上楼信号，由下至上依次执行， 直到最后一个上楼请求执行完毕，如更高层有下楼请求时，则直接升到有下降请求的最高楼接客，然后进 入

2、下降模式，但电梯处于下降模式时，则与上升模式相反。7、电梯初始状态为一层门开。library ieee;useuseentity ledl isport(ledin:instd_logic_vector(3downto 0);ledout:outstd_logic_vector(6downto 0);end led1;architecturea led of led1 isbeginprocess(ledin)begincaseledin is-The sequence is "g f e d c b a"when"0000"=>ledout<

3、;="0111111"IIshow0 "when"0001"=>ledout<="0000110"IIshow1 "when"0010"=>ledout<="1011011"IIshow2 "when"0011"=>ledout<="1001111"IIshow3 "when"0100"=>ledout<="1100110"IIs

4、how4 "when"0101"=>ledout<="1101101"-"show5 "when"0110"=>ledout<="1111101"'1.1show6 "when"0111"=>ledout<="0000111"IIshow7 "when"1000"=>ledout<="1111111"IIshow8 "wh

5、en"1001"=>ledout<="1101111"IIshow9 "when"1010"=>ledout<="1110111"IIshow10 "when"1011"=>ledout<="1111100"-"show11 "when"1100"=>ledout<="0111001"-"show12 "when"110

6、1"=>ledout<="1011110"-"show13 "when"1110"=>ledout<="1111001"-"show14 "when"1111"=>ledout<="1110001"-"show15 "whenothers=>ledout<="XXXXXXX"-必须有,Here it is 'X',single quoteend

7、 case;end process ;end a_led;library IEEE;useuseuseentity liftl isport (clk: in STD_LOGIC; -2hz 信号upin: in STD_LOGIC;-上升请求键downin: in STD_LOGIC;-下降请求键st_ch: in STD_LOGIC;-楼层选择键close: in STD_LOGIC;-提前关门键delay: in STD_LOGIC;-延时关门键run_stop: in STD_LOGIC;-电梯运行开关lamp: out STD_LOGIC;-运行或停止灯run_waitdis: ou

8、t STD_LOGIC_VECTOR (6 downto 0);-运行或等待时间 st_outdis: out STD_LOGIC_VECTOR (6 downto 0);-电梯所在楼层指示 directdis: out STD_LOGIC_VECTOR (6 downto 0)-楼层选择指示);end lift1;architecture lift1_arch of lift1 iscomponent led1port(ledin:in std_logic_vector(3 downto 0);ledout:out std_logic_vector(6 downto 0);end compo

9、nent;signal ur,dr:STD_LOGIC_VECTOR (6 downto 1);signal dir,liftor:integer range 0 to 5;signal wai_t:STD_LOGIC_VECTOR (2 downto 0);signal divide,hand,clkin:STD_LOGIC;signal ladd:STD_LOGIC_VECTOR (1 downto 0);signal closex,delayx:STD_LOGIC;signal run_wait: STD_LOGIC_VECTOR (3 downto、0);signal st_out:

10、STD_LOGIC_VECTOR (3 downto 0); signal direct: STD_LOGIC_VECTOR (3 downto 0);begindirect<='0'&conv_std_logic_vector(dir,3)+1; st_out<='0'&conv_std_logic_vector(liftor,3)+1;run_wait<='0'&wai_t;lampv=ladd(1);hand<=wai_t(2) and (not wai_t(1) and wai_t(0);

11、closex<=close and (not ladd(1);delayx<=delayand (not ladd(1);urun_wait:led1port map(run_wait,run_waitdis);ust_out:led1 port map(st_out,st_outdis);udirect:led1 port map(direct,directdis);p0:process(clk)beginif (clk'event and clk='1') thenclkin<=not clkin;end if;end process p0;p1:

12、process(clkin)beginif (clkin'event and clkin='1') then divide<=not divide;thendir<=0;elsedir<=dir+1;end if;end if;end process p1;p2:process(ur,dr,dir,upin,downin,st_ch,liftor,wai_t,run_stop,hand) variable num,t:integer range 0 to 6;beginnum:=lift o叶1;t:=di r+1;if (run_stop='

13、1') thenif (t>num) and (st_ch='1') or (upin='1') thencase t iswhen 1 => ur(1)<='1'when2=>ur(2)<='1'when3=>ur(3)<='1'when4=>ur(4)<='1'when5=>ur(5)<='1'when6=>ur(6)<='1'whenothers=>Null;end ca

14、se;elsif (hand='1) thencase num iswhen1=>ur(1)<='0'when2=>ur(2)<='0'when3=>ur(3)<='0'when4=>ur(4)<='0'when5=>ur(5)<='0'when6=>ur(6)<='0'whenothers=>Null;end case;thenend if;if (tvnum) and (st_ch='1') o

15、r (downin='1') case t iswhen1=>dr(1)<='1'when2=>dr(2)<='1'when3=>dr(3)<='1'when4=>dr(4)<='1'when5=>dr(5)<='1'when6=>dr(6)<='1'whenothers=>Null;end case;elsif (hand='1) thencase num iswhen1=>dr(1)<

16、;='O'when2=>dr(2)<='0'when3=>dr(3)<='0'when4=>dr(4)<='0'when5=>dr(5)<='0'when6=>dr(6)<='0'whenothers=>Null;end case;end if;elseur<="000000"dr<="OOOOOO"end if;end process p2;p3:process(ur,dr,lif

17、tor,ladd,wai_t,run_stop)beginif (run_stop='1) thenif (wai_t="110") thenif (ur or dr)="OOOOOO")ladd(1)<='0'elsethencase liftor iswhen 0 =>if (ur(1) ordr(1)>'0') thenladd(1)<='0'else ladd<="11"end if;when 1 =>if (ur(2) ordr(2)

18、>'0') thenladd(1)<='0'elsif(ladd(0)='1') and (ur(6 downto 3)ordr(6downto3)>"0000")or(ur(1) or dr(1)='O') theladd<="11"else ladd<="10"end if;ladd(1)<='0'ownto 1)="00") thenwhen 2 =>if (ur(3) or dr(3)&

19、gt;'0') thenelsif(ladd(0)='1') and (ur(6 downto 4)ordr(6downto4)>"000")or(ur(2 downto 1) or dr(2 dladd<="11"else ladd<="10"end if;when 3 =>if (ur(4) or dr(4)>'0') thenladd(1)<='0'elsif(ladd(0)='1') and (ur(6 down

20、to 5)ordr(6downto5)>"00")or(ur(3 downto 1) or dr(3 downto 1)="000") thenladd<="11"elseladd<="10"end if;when 4 =>if (ur(5) or dr(5)>'0') thenladd(1)<='0'elsif(ladd(0)='1') and (ur(6) or dr(6)>'0')or(ur(4 down

21、to 1) ordr(4 downto 1)="0000") theladd<="11"elseladd<="10"end if;when 5 =>if (ur(6) or dr(6)>'0') then ladd(1)<='0'elseladd<="10"end if;when others=>null;end case;end if;end if;elseladd<="00"end if;end process

22、p3;p4:process(divide,wai_t,ladd,closex,delayx)beginif (divide'event and divide='1') thenif (wai_t="000"or closex='1') thenwai_t<="110"elseif (delayx='0) thenwai_t<=wai_t-1;elsewai_t<="010"if (wai_t="001") then if (ladd="11

23、") then liftor<=liftor+1;elsif (ladd="10") then liftor<=liftor-1;end if;end if;end if;end if;end process p4;end lift1_arch;library IEEE;useuseuseentity lifter isport (elk: in STD_LOGIC; -4mhz 信号 upin: in STD_LOGIC;-上升请求键 downin: in STD_LOGIC;-下降请求键 st_ch: in STD_LOGIC;-楼层选择键 clo

24、se: in STD_LOGIC;-提前关门键 delay: in STD_LOGIC;-延时关门键 run_stop: in STD_LOGIC;-电梯运行开关 lamp: out STD_LOGIC;-运行或停止灯 selout:out STD_LOGIC_VECTOR (2 downto 0); segout: out STD_LOGIC_VECTOR (6 downto 0) );end lifter;architecture lift1_arch of lifter iscomponent led1port(ledin:in std_logic_vector(3 downto 0);

25、 ledout:out std_logic_vector(6 downto 0);end component;signal ur,dr:STD_LOGIC_VECTOR (6 downto 1); signal dir,liftor:integer range 0 to 5;signal wai_t:STD_LOGIC_VECTOR (2 downto 0); signal div,cp,hand,clkin:STD_LOGIC;signal ladd,s:STD_LOGIC_VECTOR (1 downto 0); signal closex,delayx:STD_LOGIC;signal

26、run_wait: STD_LOGIC_VECTOR (3 downto 0); signal st_out: STD_LOGIC_VECTOR (3 downto 0); signal direct: STD_LOGIC_VECTOR (3 downto 0); signal dout: STD_LOGIC_VECTOR (3 downto 0); signal q:STD_LOGIC_VECTOR (21 downto 0);begindirect<='0'&conv_std_logic_vector(dir,3)+1; st_out<='0&#

27、39;&conv_std_logic_vector(liftor,3)+1; run_wait<='0'&wai_t;lampv=ladd(1);hand<=wai_t(2)and (not wai_t(1) and wai_t(0);closex<=(notclose)and(notladd(1);delayx<=(notdelay)and(notladd(1);selout<="001"whens=0else"010" when s=1 else"100" when s

28、=2 else"000"dout<=direct when s=0 else run_wait when s=1 else st_out when s=2 else "0000000"u:led1 port map(dout,segout);p0:process(clk)beginif (clk'event and clk='1') then qv=q+1;end if;end process p0;cp<=q(20);s<=q(14 downto 13); p1:process(cp) beginif (cp&

29、#39;event and cp='1') then div<=not div;if (dir=5) thendir<=0;elsedir<=dir+1;end if;end if;end process p1;p2:process(ur,dr,dir,upin,downin,st_ch,liftor,wai_t,run_stop,hand) variable num,t:integer range 0 to 6;beginnum:=liftor+1;t:=di r+1;if (run_stop='1') then if (t>num)

30、and (st_ch='0') or (upin='0') then case t iswhen 1 => ur(1)<='1'when 2 => ur(2)<='1'when 3 =>ur(3)<='1'when 4 =>ur(4)<='1'when 5 =>ur(5)<='1'when 6 => ur(6)<='1'when others =>Null;end case;elsif (h

31、and='1') thencase num iswhen1=>ur(1)<='0'when2=>ur(2)<='0'when3=>ur(3)<='0'when4=>ur(4)<='0'when5=>ur(5)<='0'when6=>ur(6)<='0'whenothers=>Null;end case;thenend if;if (t<num) / and (st_ch='O') or

32、 (downin='0') case t iswhen1=>dr(1)<='1'when2=>dr(2)<='1'when3=>dr(3)<='1'when4=>dr(4)<='1'when5=>dr(5)<='1'when6=>dr(6)<='1'whenothers=>Null;end case;elsif (hand='1') thencase num is when 1 =>

33、dr(1)<='0'when 2 => dr(2)<='0'when 3 => dr(3)v='0'when 4 => dr(4)<='0'when 5 => dr(5)<='0'when 6 => dr(6)<='0'when others =>Null;end case;end if;elseur<="000000"dr<="000000"end if;end process p

34、2;p3:process(ur,dr,liftor,ladd,wai_t,run_stop)beginif (run_stop='1)thenif (wai_t="110")thenif (ur or dr)="000000") thenladd(1)<='0'elsecase liftor iswhen 0 =>if (ur(1) or dr(1)>'0') thenladd(1)<='0'elseladd<="11"end if;when 1 =

35、>if (ur(2) or dr(2)>'0') thenladd(1)<='0'elsif(ladd(0)='1') and (ur(6 downto 3)ordr(6downto3)>"0000")or(ur(1) or dr(1)='0') theladd(1)<='0'elsif(ladd(0)='1') and (ur(6 downto 4)ordr(6downto4)>"000")or(ur(2 downto 1) or dr(2 downto 1)="00") thenladd<="11"else ladd<="10"end if;when 2 =>if (ur(3) or dr(3)>'0') thenend if;ladd(1)<='0