第一章微芯片对材料的需求

1、第一章 微芯片对材料的需求概述 微电子加工技术微电子加工技术 0.18um-0.1um的时代的时代 研究已经在研究已经在0.1um领域，领域，2010年达到生产年达到生产 三个标志量：三个标志量： 容量容量3G-3T, 速度速度GHz-THz, 传输速率传输速率Gb/s-Tb/s单晶提拉技术抽真空加热体提拉杆籽晶体原材料坩埚旋转系统CrystalGrowthSlicingGraphite HeaterSi MeltSi CrystalPolishingWaferingHigh Temp.AnnealingFurnaceAnnealed WaferDefect FreeSurface byAnn

2、ealing(Surface Improvement）Surface DefectMapPolished Wafer涂光刻胶（正）涂光刻胶（正）选择曝光选择曝光热氧化热氧化SiO2一、工艺流程举例（制作一、工艺流程举例（制作PN结）结）去胶去胶掺杂掺杂显影（第显影（第1次图形转移）次图形转移）刻蚀（第刻蚀（第2次图形转移）次图形转移）NP蒸发镀蒸发镀Al 膜膜光刻光刻Al 电极电极CVD 淀积淀积SiO2 膜膜光刻引线孔光刻引线孔基本材料类19701980年 Si SiO2 Al P-Si Si3-N4 金属硅化物 1980-1990 TaSi2 MoSi2 TiSi2 CoSi2 PtSi2

3、Static RAM Cell金属化材料 1990-2000 Cu Cu/TiN TiN/Ti Ti Ta WMemories (SRAM & DRAM)高k材料 20002005 BST TiO2 Ta2O5DRAM Device铁电材料 2001-2006 BST (Pb,La)TiO3 Pb(Zr,Ba,Sr)TiO3电极材料 2001-2006 Pt RuO2 IrO2 SrRuO3 (LaSr)CoO3 YBa2Cu3O7 SrBi2Ta5O9低K材料 2003-2010 有机硅有机硅 BN PolymerCMOS器件和电路的典型结构1.衬底材料 Si-材料，材料，GaAs,

4、 InP, GaN, SiGe 晶片（晶片（wafer)-直径越来越大，一般直径越来越大，一般一个晶片上集成一个晶片上集成250个以上的芯片在个以上的芯片在经济上才合理经济上才合理 目前多采用目前多采用34英寸的硅片，英寸的硅片，4M的的DRAM时一般须要时一般须要6英寸硅片，生产英寸硅片，生产256M DRAM则须要则须要12英寸英寸对硅材料中的缺陷密度要求：对硅材料中的缺陷密度要求： IC成品率成品率 Y=exp(-DA) D-硅材料中的缺陷密度硅材料中的缺陷密度, A-芯片面地芯片面地 对硅表面的几何平整度的要求：对硅表面的几何平整度的要求： 0.35um 22mm*22mm 0.23u

5、m 3G 0.18um 22mm*32mm 0.12um 8G 0.10um 22mm*44mm 0.008um 16G 硅表面缺陷要求：硅表面缺陷要求： ULSI-大规模集成电路大规模集成电路 COP-晶体生长粒子，生长中的缺陷晶体生长粒子，生长中的缺陷 SOI-Silicon on Insulator,cpu 速度提高速度提高400Mhz- 500Mhz 3-5氮化物半导体材料氮化物半导体材料 GaN, AlN,InN 2.栅电极材料是是CMOS器件中最重要的材料之一器件中最重要的材料之一 包括栅绝缘介质层和栅电极两部分包括栅绝缘介质层和栅电极两部分 Ta2O5 (=25-35) TiO2

6、(=100) Sr-Ti-O(= 2060) (SrBa)TiO3(= 300400) Al-MOSFET工艺在个中应用工艺在个中应用 GexSi1-x,W/TiN, GexSi1-x-目前目前 栅结构材料栅结构材料 绝缘介质材料绝缘介质材料:缺陷少，漏电流小，抗击穿度高，稳缺陷少，漏电流小，抗击穿度高，稳定性好定性好 目前：目前： SiO2-1.5nm应用在应用在MOSFET工艺中工艺中 未来：未来： SiNxOy-1.0nm应用在应用在MOSFET工艺工艺 中中 高高k材料：材料：Ta2O5(2530), TiO2(-100), (SrBa)TiO3(300-400) Memories (

7、SRAM & DRAM)Read-Write Memories (RAM) STATIC (SRAM) DYNAMIC (DRAM)Data stored as long as supply is appliedLarge (6 transistors/cell)FastDifferentialPeriodic refresh requiredSmall (1-3 transistors/cell)SlowerSingle Ended6-transistor CMOS SRAM Cell VDDQQM1M3M4M2M5BLWLBLM6Simplified CMOS SRAM Analy

8、sis (Write)VDDQ = 1Q = 0M1M4M5BL = 1WLBL = 0M6VDDkn M6VDDVTnVDD2- -VDD28- -kp M4VDDVTpVDD2- -VDD28- -=kn M52- -VDD2- -VTnVDD2- -2kn M1VDDVTnVDD2- -VDD28-=(W/L)n,M510 (W/L)n,M1(W/L)n,M60.33 (W/L)p,M4The bit lines are actively driven in this caseOnly one of these conditions need be met due to positive

9、 feedback!Simplified CMOS SRAM Analysis (Read) VDDQ = 1Q = 0M1M4M5BLWLBLM6VDDVDDVDDCbitCbitkn M52-VDD2- -VTnVDD2- -2kn M1VDDVTnVDD2- -VDD28- -=(W/L)n,M510 (W/L)n,M1(supercedes read constraint)Pre-charge both bit lines high before a readThe let the bit lines float to read data from a cellCant let Q f

10、loat up from 0 and switch M3-M4Keep resistance of M5 upResistive-load SRAM CellVDDQQM1M2M3BLWLBLM4RLRLStatic power dissipation - Want RL largeBit lines precharged to VDD to address tp problemStatic power dissipation must keep RL big to limit thisLarge RL = large delay pulling up precharge bit lines

11、high so read out only pulls lowMust use very high resistance material to make a small yet large RL1-Transistor DRAM CellCSM1BLWLCBLWLXBLVDDVTVDD/2VDDGNDWrite 1Read 1sensingVDD/2VVBLVPREVBITVPRECSCSCBL+- -=Write: CS is charged or discharged by asserting WL and BL.Read: Charge redistribution takes pla

12、ces between bit line and storage capacitanceVoltage swing is small; typically around 250 mV.DRAM Cell Observations1T DRAM requires a sense amplifier for each bit line, due to charge redistribution read-outDRAM memory cells are single ended in contrast to SRAM cellsThe read-out of the 1T DRAM cell is

13、 destructive; read and refresh operations are necessary for correct operation1T cell requires presence of an extra capacitance that must be explicitly included in the designWhen writing a “1” into a DRAM cell, a threshold voltage is lost. This charge loss can be circumvented by charging the wordline

14、s to a higher value than VDD1-T DRAM Cell(a) Cross-section(b) LayoutDiffusedbit linePolysiliconplateM1 wordlineCapacitorPolysilicongateMetal word lineSiO2n+Field OxideInversion layerinduced by plate biasn+polypolyUsed Polysilicon-Diffusion CapacitanceExpensive in AreaAdvanced 1T DRAM CellsCell Plate SiCapacitor InsulatorStorage Node Poly2nd Field OxideRefilling PolySi SubstrateTrench CellStacked-capacitor CellCapacitor dielectric layerCell plateWord lineInsulat