西电dsp大作业(4)

1、实验四一、实验题目：利用ADSPBF533-EZ-KIT板的硬件资源，完成对信号的采样和滤波分析。二、实验目的：加深对数字滤波这种信号处理的方法的理解。三、实验设备：信号源、EZ-KIT板、微机、示波器等。四、实验内容：本实验中提供的基本FIR滤波器程序，初始化不同的FIR滤波器的系数来设计出不同的滤波器。利用调试器的绘图（plot）功能来显示有关数据的波形；五、实验原理：对信号加汉明窗可改善信号的质量，主瓣宽，频率分辨率较低，旁瓣也较低。对滤波器进行时域压缩，频域便会展宽。对滤波器进行移位，使低通变成了带通。本实验为了观察这几种变化的输出结果的不同。六、实验步骤：1）连接硬件关闭PC机的电源

2、，按照硬件连接图正确连接各个硬件设备，检查EZ-KIT板上的跳线位置是否正确，按照硬件连接图检查确保正确连接各个硬件设备。2）加电和启动程序检查无误后，分别打开PC机、信号源、评估板和示波器的电源，运行VisualDSP+，新建一个工程，工程名称自定义，正确设置工程的各个选项，将 test3 fir目录下的源文件加入到工程中。或者打开 test3 FIR目录下已经存在的工程FIR.dpj。3）选择或者建立正确的会话类型按照要求选择或者建立EZ-KIT类型的会话，详细要求请参阅7.4.1节的有关内容。4） 编译链接和观察结果编译链接该工程，没有错误后运行程序。必须注意在Settings菜单中有几

3、项必须正确设置，设置和运行EZ_KIT板方法请7.4.1节的有关内容。正确的设置Settings后，才可以从示波器上看到输出结果。5）改变信号类型观察调节信号发生器，利用示波器监视其输出幅度为0.51Vpp，分别产生正弦波、方波和三角波，使其频率从直流到采样频率连续地变化，观察示波器上输出信号幅度和波形的变化。6）修改源程序改变滤波状态观察将源程序中的window=0 修改为：window=1，然后再重复步骤4），5），记录典型点的信号幅度数据，描绘滤波器幅频特性。将源程序中的Shift=0改为Shift=1，然后再重复步骤4），5），记录典型点的信号幅度数据，描绘滤波器幅频特性。将源程序中的

4、Compress=0改为Compress=1，然后再重复步骤4），5），记录典型点的信号幅度数据，描绘滤波器幅频特性。window=1表明加了汉明窗Compress=1 表明对原滤波器进行了时域压缩。Shift=1 表明对原滤波器进行了移位，低通变为了带通。7、 主要源代码：1）程序结构：程序包括主函数main()、Process_data()、Initialize()和ISR()等4个模块，以及常数和宏定义、全局变量定义部分。其中main()函数完成程序的控制，Initialize()完成CODEC和BF533个部分的初始化，Process_data ()完成数据采集和计算，ISR()实现中

5、断控制。2)程序工作流程：main()先调用Initialize()完成对CODEC、BF533以及FIR滤波器系数初始化，再调用ISR()运行中断服务程序，在中断服务程序中，调用子函数Process_data ()完成对信号的采集、滤波和输出，Process_data ()的运行模式是：采样>FIR运算>输出>采样>的无限循环。3)数据源选择：变量Process_Stat为采集状态标志位，若Process_Stat=0，则从CODEC取采样数据存入Inbuf0；Process_Stat=1，则从CODEC取采样数据存入Inbuf1；Process_Stat=2，则对I

6、nbuf中的数据进行滤波，然后输出。4)滤波类型：通过滤波器类型变量filter=1，设定滤波类型为低通。滤波器的参数都放在数组变量hFIR_TAPS中。数据经过FIR滤波器后，才送往示波器。实验五的程序位于test3 fir子目录，打开工程文件FIR.DPJ,可以看到演示软件包括以下几个程序模块：talkthouth.h#ifndef _Talkthrough_DEFINED#define _Talkthrough_DEFINED/-/ Header files/-/#include <sysexception.h>#include <cdefBF533.h>#inc

7、lude <fract.h>#include <filter.h>/-/ Symbolic constants/-/ addresses for Port B in Flash A#define pFlashA_PortA_Dir(volatile unsigned char *)0x20270006#define pFlashA_PortA_Data(volatile unsigned char *)0x20270004/ names for codec registers, used for sCodec1836TxRegs#define DAC_CONTROL_1

8、0x0000#define DAC_CONTROL_20x1000#define DAC_VOLUME_00x2000#define DAC_VOLUME_10x3000#define DAC_VOLUME_20x4000#define DAC_VOLUME_30x5000#define DAC_VOLUME_40x6000#define DAC_VOLUME_50x7000#define ADC_0_PEAK_LEVEL0x8000#define ADC_1_PEAK_LEVEL0x9000#define ADC_2_PEAK_LEVEL0xA000#define ADC_3_PEAK_LE

9、VEL0xB000#define ADC_CONTROL_10xC000#define ADC_CONTROL_20xD000#define ADC_CONTROL_30xE000/ names for slots in ad1836 audio frame#define INTERNAL_ADC_L00#define INTERNAL_ADC_R02#define INTERNAL_DAC_L00#define INTERNAL_DAC_R02#define INTERNAL_ADC_L11#define INTERNAL_ADC_R13#define INTERNAL_DAC_L11#de

10、fine INTERNAL_DAC_R13/ size of array sCodec1836TxRegs#define CODEC_1836_REGS_LENGTH11/ SPI transfer mode#define TIMOD_DMA_TX 0x0003/ SPORT0 word length#define SLEN_240x0017/ DMA flow mode#define FLOW_10x1000/#define FIR_TAPS 256/#define BUF_FIRST 0#define BUF_SECOND 1#define BUF_FILTER 2/-/ Global v

11、ariables/-/extern int iChannel0LeftIn;extern int iChannel0RightIn;extern int iChannel0LeftOut;extern int iChannel0RightOut;extern int iChannel1LeftIn;extern int iChannel1RightIn;extern int iChannel1LeftOut;extern int iChannel1RightOut;extern volatile short sCodec1836TxRegs;extern volatile int iRxBuf

12、fer1;extern volatile int iTxBuffer1;extern fract16 coeffs;extern fract16 delay;extern fir_state_fr16 state;extern short int Process_Stat;extern int OutBufCnt;/-/ Prototypes/-/ in file Initialize.cvoid Init_EBIU(void);void Init_Flash(void);void Init1836(void);void Init_Sport0(void);void Init_DMA(void

13、);void Init_Interrupts(void);void InitCoeffs(void);void Init_ProcessData(void);void Enable_DMA_Sport(void);/ in file Process_data.cvoid Process_Data(void);/ in file ISRs.cEX_INTERRUPT_HANDLER(Sport0_RX_ISR);#endif /_Talkthrough_DEFINEDmain.c#include "Talkthrough.h"#include "sysreg.h&q

14、uot;#include "ccblkfn.h"#include <fract.h>/-/ Variables/ Description:The variables iChannelxLeftIn and iChannelxRightIn contain /the data coming from the codec AD1836. The (processed)/playback data are written into the variables /iChannelxLeftOut and iChannelxRightOut respectively, w

15、hich /are then sent back to the codec in the SPORT0 ISR. /The values in the array iCodec1836TxRegs can be modified to /set up the codec in different configurations according to /the AD1885 data sheet./-/ left input data from ad1836int iChannel0LeftIn, iChannel1LeftIn;/ right input data from ad1836in

16、t iChannel0RightIn, iChannel1RightIn;/ left ouput data for ad1836int iChannel0LeftOut, iChannel1LeftOut;/ right ouput data for ad1836int iChannel0RightOut, iChannel1RightOut;/ array for registers to configure the ad1836/ names are defined in "Talkthrough.h"volatile short sCodec1836TxRegsCO

17、DEC_1836_REGS_LENGTH =DAC_CONTROL_1| 0x000,DAC_CONTROL_2| 0x000,DAC_VOLUME_0| 0x3ff,DAC_VOLUME_1| 0x3ff,DAC_VOLUME_2| 0x3ff,DAC_VOLUME_3| 0x3ff,DAC_VOLUME_4| 0x000,DAC_VOLUME_5| 0x000,ADC_CONTROL_1| 0x000,ADC_CONTROL_2| 0x000,ADC_CONTROL_3| 0x000;/ SPORT0 DMA transmit buffervolatile int iTxBuffer14;

18、/ SPORT0 DMA receive buffervolatile int iRxBuffer14;/-/ Function:main/ Description:After calling a few initalization routines, main() just /waits in a loop forever. The code to process the incoming /data can be placed in the function Process_Data() in the /file "Process_Data.c"./-/void mai

19、n(void)sysreg_write(reg_SYSCFG, 0x32);/Initialize System Configuration RegisterInit_EBIU();Init_Flash();Init1836();InitCoeffs();Init_ProcessData();Init_Sport0();Init_DMA();Init_Interrupts();Enable_DMA_Sport0();while(1);Initialize.c#include "Talkthrough.h"#include <filter.h>fir_state_

20、fr16 state;/-/ Function:Init_EBIU/ Description:This function initializes and enables asynchronous memory /banks in External Bus Interface Unit so that Flash A can be /accessed./-/void Init_EBIU(void)*pEBIU_AMBCTL0= 0x7bb07bb0;*pEBIU_AMBCTL1= 0x7bb07bb0;*pEBIU_AMGCTL= 0x000f;/-/ Function:Init_Flash/

21、Description:This function initializes pin direction of Port A in Flash A/to output. The AD1836_RESET on the ADSP-BF533 EZ-KIT board /is connected to Port A./-/void Init_Flash(void)*pFlashA_PortA_Dir = 0x3;/-/ Function:Init1836()/ Description:This function sets up the SPI port to configure the AD1836

22、. /The content of the array sCodec1836TxRegs is sent to the /codec./-/void Init1836(void)int i;int j;static unsigned char ucActive_LED = 0x01;/ write to Port A to reset AD1836*pFlashA_PortA_Data = 0x00;/ write to Port A to enable AD1836*pFlashA_PortA_Data = ucActive_LED;/ wait to recover from resetf

23、or (i=0; i<0xf000; i+);/ Enable PF4*pSPI_FLG = FLS4;/ Set baud rate SCK = HCLK/(2*SPIBAUD) SCK = 2MHz*pSPI_BAUD = 16;/ configure spi port/ SPI DMA write, 16-bit data, MSB first, SPI Master*pSPI_CTL = TIMOD_DMA_TX | SIZE | MSTR;/ Set up DMA5 to transmit/ Map DMA5 to SPI*pDMA5_PERIPHERAL_MAP= 0x500

24、0;/ Configure DMA5/ 16-bit transfers*pDMA5_CONFIG = WDSIZE_16;/ Start address of data buffer*pDMA5_START_ADDR = sCodec1836TxRegs;/ DMA inner loop count*pDMA5_X_COUNT = CODEC_1836_REGS_LENGTH;/ Inner loop address increment*pDMA5_X_MODIFY = 2;/ enable DMAs*pDMA5_CONFIG = (*pDMA5_CONFIG | DMAEN);/ enab

25、le spi*pSPI_CTL = (*pSPI_CTL | SPE);/ wait until dma transfers for spi are finished for (j=0; j<0xaff; j+);/ disable spi*pSPI_CTL = 0x0000;/-/ Function:Init_Sport0/ Description:Configure Sport0 for I2S mode, to transmit/receive data /to/from the AD1836. Configure Sport for external clocks and /fr

26、ame syncs./-/void Init_Sport0(void)/ Sport0 receive configuration/ External CLK, External Frame sync, MSB first, Active Low/ 24-bit data, Stereo frame sync enable*pSPORT0_RCR1 = RFSR | LRFS | RCKFE;*pSPORT0_RCR2 = SLEN_24 | RXSE | RSFSE;/ Sport0 transmit configuration/ External CLK, External Frame s

27、ync, MSB first, Active Low/ 24-bit data, Secondary side enable, Stereo frame sync enable*pSPORT0_TCR1 = TFSR | LTFS | TCKFE;*pSPORT0_TCR2 = SLEN_24 | TXSE | TSFSE;/-/ Function:Init_DMA/ Description:Initialize DMA1 in autobuffer mode to receive and DMA2 in/autobuffer mode to transmit/-/void Init_DMA(

28、void)/ Set up DMA1 to receive/ Map DMA1 to Sport0 RX*pDMA1_PERIPHERAL_MAP = 0x1000;/ Configure DMA1/ 32-bit transfers, Interrupt on completion, Autobuffer mode*pDMA1_CONFIG = WNR | WDSIZE_32 | DI_EN | FLOW_1;/ Start address of data buffer*pDMA1_START_ADDR = iRxBuffer1;/ DMA inner loop count*pDMA1_X_

29、COUNT = 4;/ Inner loop address increment*pDMA1_X_MODIFY = 4;/ Set up DMA2 to transmit/ Map DMA2 to Sport0 TX*pDMA2_PERIPHERAL_MAP = 0x2000;/ Configure DMA2/ 32-bit transfers, Autobuffer mode*pDMA2_CONFIG = WDSIZE_32 | FLOW_1;/ Start address of data buffer*pDMA2_START_ADDR = iTxBuffer1;/ DMA inner lo

30、op count*pDMA2_X_COUNT = 4;/ Inner loop address increment*pDMA2_X_MODIFY = 4;/-/ Function:Enable_DMA_Sport/ Description:Enable DMA1, DMA2, Sport0 TX and Sport0 RX/-/void Enable_DMA_Sport0(void)/ enable DMAs*pDMA2_CONFIG= (*pDMA2_CONFIG | DMAEN);*pDMA1_CONFIG= (*pDMA1_CONFIG | DMAEN);/ enable Sport0

31、TX and RX*pSPORT0_TCR1 = (*pSPORT0_TCR1 | TSPEN);*pSPORT0_RCR1 = (*pSPORT0_RCR1 | RSPEN);/-/ Function:Init_Interrupts/ Description:Initialize Interrupt for Sport0 RX/-/void Init_Interrupts(void)/ Set Sport0 RX (DMA1) interrupt priority to 2 = IVG9 *pSIC_IAR0 = 0xffffffff;*pSIC_IAR1 = 0xffffff2f;*pSI

32、C_IAR2 = 0xffffffff;/ assign ISRs to interrupt vectors/ Sport0 RX ISR -> IVG 9register_handler(ik_ivg9, Sport0_RX_ISR);/ enable Sport0 RX interrupt*pSIC_IMASK = 0x00000200;/-/ Function:Init_ProcessData/ Description:Initialize Process Data for FIR/-/void Init_ProcessData(void)int i;Process_Stat=BU

33、F_FIRST;OutBufCnt=0;fir_init(state, coeffs, delay, FIR_TAPS,1);ISR.c#include "Talkthrough.h"EX_INTERRUPT_HANDLER(Sport0_RX_ISR)/ confirm interrupt handling*pDMA1_IRQ_STATUS = 0x0001;/ copy input data from dma input buffer into variablesiChannel0LeftIn = iRxBuffer1INTERNAL_ADC_L0;iChannel0R

34、ightIn = iRxBuffer1INTERNAL_ADC_R0;iChannel1LeftIn = iRxBuffer1INTERNAL_ADC_L1;iChannel1RightIn = iRxBuffer1INTERNAL_ADC_R1;/ call function that contains user codeProcess_Data();/ copy processed data from variables into dma output bufferiTxBuffer1INTERNAL_DAC_L0 = iChannel0LeftOut;iTxBuffer1INTERNAL

35、_DAC_R0 = iChannel0RightOut;iTxBuffer1INTERNAL_DAC_L1 = iChannel1LeftOut;iTxBuffer1INTERNAL_DAC_R1 = iChannel1RightOut;Process_data.c#include "Talkthrough.h"#include <filter.h>#include <fract.h>#include <math.h>#include <complex.h>#define PI3.1415926#define FC2 0.05

36、/以采样率Fs进行归一化的高频截止频率#define FC1 0.00/以采样率Fs进行归一化的低频截止频率#define FL0.2/移位量#define COEFFSCALE 20000/滤波器系数整型标尺/#define RESULT_SIZE 256/short int Process_Stat; int OutBufCnt;int Window;/加窗标志float WFIR_TAPS;/窗函数int Shift;/频域移位标志int Compress;/时域压缩标志int hFIR_TAPS;/最终设计的滤波器冲击响应fract16 delayFIR_TAPS;fract16 co

37、effsFIR_TAPS;fract16 Inbuf2;fract16 Outbuf2;int FirOutCnt;short int FirResultBufRESULT_SIZE;/-/ Function:Init_Coeffs/ Description:Initialize Process Data for FIR/-/void InitCoeffs(void)int i;float hdFIR_TAPS;/理想低通滤波器的冲击响应float cosineFIR_TAPS;/移位因子Window=0;Shift=0;Compress=0;/testFirOutCnt=0;/*初始化滤波器

38、系数*/滤波器系数产生/ for(i=0;i<(FIR_TAPS-1)/2;i+) hdi=(1/PI)*(sin(2*FC2*PI*(i-(FIR_TAPS-1)/2)-sin(2*FC1*PI*(i-(FIR_TAPS-1)/2)/(i-(FIR_TAPS-1)/2); for(i=(FIR_TAPS-1)/2+1;i<FIR_TAPS;i+) hdi=(1/PI)*(sin(2*FC2*PI*(i-(FIR_TAPS-1)/2)-sin(2*FC1*PI*(i-(FIR_TAPS-1)/2)/(i-(FIR_TAPS-1)/2);hd(FIR_TAPS-1)/2=2*(FC2

39、-FC1);/时域截取/for(i=0;i<FIR_TAPS;i+) hi=(int)(hdi*COEFFSCALE);/时域加窗/if(Window)for(i=0;i<FIR_TAPS;i+)Wi=0.54-0.46*cos(2*PI*i/(FIR_TAPS-1); for(i=0;i<FIR_TAPS;i+)hi=(int)(float)hi*Wi);/时域压缩系数/if(Compress)for (i=0;i<FIR_TAPS/2;i+) hdi=hi*2;for (i=0;i<FIR_TAPS/2;i+) hi=hdi;for (i=FIR_TAPS/2

40、;i<FIR_TAPS;i+) hi=0;/序列右边填零/移位FL*fs/if(Shift) for (i=0;i<FIR_TAPS;i+)cosinei=cos(2*PI*i*FL);for(i=0;i<FIR_TAPS;i+) hi=(int)(float)hi*cosinei);for(i=0;i<FIR_TAPS;i+)coeffsi=hi;/-/ Function:Process_Data()/ Description: This function is called from inside the SPORT0 ISR every /time a complete audio frame has been received. The new /input samples can be found in the variables iChannel0LeftIn,/iChannel0RightIn, iChannel1LeftIn and iChannel1Right