合众达seed-dec2812开发板程序及原理图tms320f2812培训

1、SEED TI C2000 培训教材第一部分：介绍什么是数字信号处理器 ? Microprocessor (P):一个多IC处理系统的核心器件2种基本的结构:Von Neumann“- 冯.诺依曼Harvard“ 哈弗Von Neumann“:数据、代码共享内存空间数据、代码共享内存总线Example: Intels x86 Pentium Processor familyHarvard“:数据、代码独立存储空间数据、代码独立存储总线SOC-微控制器 (C) 用来实现实时控制的核以及输入输出接口都集成在片上确保在嵌入式应用中的高的性价比几乎能满足各类电子产品对运算能力和外设的要求2种 P 结构

2、 (Von Neumann 和Harvard) 广泛应用于 MicrocontrollersDSP-数字信号处理器 类似于微处理器 (p.), 一个计算系统的核额外的用来加速复杂运算的外设:硬件乘法器(MPY)算术运算单元(ALU)多总线访问机制实现 2n 次乘法/加法运算的硬件移位寄存器典型的DSP算法乘加运算的实现- P使用PC、通用的C代码编译器例如 实现代码实例:#include int data4=1,2,3,4;int coeff4=8,6,4,2;int main(void)int i;int result =0;for (i=0;i4;i+)result += datai*co

3、effi;printf(%i,result);return 0;6个基本操作CPU将要执行的操作?设置指针1指向 data0设置指针2指向 coeff0读datai 到内核读coeffi 到内核MPY datai*coeffi做加法运算修改指针1修改指针2自增;如果 i3 , 返回第三步重复执行3到8 被称作“6 Basic Operations of a DSP”DSP能够单周期执行完这6个基本操作P的执行过程-机器/汇编码AddressM-Code Assembly - Instruction 10: for (i=0;i4;i+)00411960 C7 45 FC 00 00 00 00

4、 movdword ptr i,0 00411967 EB 09 jmp main+22h 00411969 8B 45 FC mov eax,dword ptr i 0041196C 83 C0 01 add eax,1 0041196F 89 45 FC mov dword ptr i,eax 00411972 83 7D FC 04 cmp dword ptr i,4 00411976 7D 1F jge main+47h11: result += datai*coeffi;00411978 8B 45 FC mov eax,dword ptr i 0041197B 8B 4D FC m

5、ov ecx,dword ptr i 0041197E 8B 14 85 40 5B 42 00 mov edx,dword ptreax*4+425B40h 00411985 0F AF 14 8D 50 5B 42 00 imul edx,dword ptrecx*4+425B50h 0041198D 8B 45 F8 mov eax,dword ptr result 00411990 03 C2 add eax,edx 00411992 89 45 F8 mov dword ptr result,eax 00411995 EB D2 jmp main+19h (411969h) 乘加运算

6、的实现-DSP使用DSP硬件平台以及Ti的C编译器来实现代码实例:int data4=1,2,3,4;int coeff4=8,6,4,2;int main(void)int i;int result =0;for (i=0;i4;i+)result += datai*coeffi;printf(%i,result);return 0;DSP的执行过程-机器/汇编码AddressMCodeAssembly Instruction0 x8000FF69SPM00 x80018D04 0000RMOVLXAR1,#data0 x8003 76C0 0000RMOVLXAR7,#coeff0 x80

7、055633ZAPA0 x8006F601RPT#10 x8007 564B 8781 |DMAC ACC:P, *XAR1+,*XAR7+0 x800910ACADDLACC,PPM0 x800A8D04 0000RMOVL XAR1,#y0 x800B1E81MOVL *XAR1,ACC Example: Texas Instruments TMS320F2812Space : 12 Code Memory ; 9 Data MemoryExecution Cycles : 10 150MHz = 66 ns数字信号控制器 (DSC)C:带有一个微处理器（P）作为运算单元的单芯片微型计算机

8、DSC:带有一个数字信号处理器（DSP）作为运算单元的单芯片微型计算机结合DSP优越的运算能力以及独立数据、程序存储结构和外设，得到最高效的海量运算嵌入式实时控制解决方案DSC Example: Ti C2000系列DSP第二部分：C2000结构C281x Block Diagram32x32 bitMultiplierSectoredFlashA(18-0)D(15-0)Program BusData BusRAMBootROM2232-bitAuxiliaryRegisters332 bit Timers RealtimeJTAGCPURegister BusR-M-WAtomicALUP

9、IE Interrupt Manager323232EventManager AEventManager B12-bit ADCWatchdogMcBSPCAN2.0BSCI-ASCI-BSPIGPIOC28x CPU Core32-bit 定点DSP 32 x 32 bit MAC2次单周期16 x 16 MAC (DMAC)快速中断响应机制单周期读、写、修改指令8级流水线，完全避免硬件流水 线冲突向上代码兼容性Data Bus32-bitAuxiliaryRegisters332 bit Timers RealtimeJTAGCPURegister BusR-M-WAtomicALUPro

10、gram BusPIE Interrupt Manager32x32 bitMultiplierC28x Internal Bus StructureData-write Address Bus (32)Program Address Bus (22)ExecutionR-M-WAtomicALUReal-TimeEmulation&TestEngineProgram-read Data Bus (32)JTAG ProgramDecoderPCXAR0toXAR7SPDPXARAUMPY32x32XTPACCALURegistersDebugRegister Bus / Result Bus

11、Data/Program-write Data Bus (32)Data-read Address Bus (32)Data-read Data Bus (32)MemoryData (4G * 16) Program(4M* 16) StandardPeripheralsExternalInterfacesXT (32) or T/TLMULTIPLIER 32 x 32 or Dual 16 x 16P (32) or PH/PL AH (16)C28x Multiplier and ALU / ShiftersData BusData BusProgram BusALU (32)3232

12、323232AL (16)323216/328/16Shift R/L (0-16)ACC (32)AH.MSB AH.LSBAL.MSB AL.LSB32Shift R/L (0-16)32Shift R/L (0-16)32168/16/32来至于寄存器操作码数据存储区操作数2乘法器结果操作数1C28x Pointer, DP and MemoryDP（16bit）访问65536个数据页4M以上的数据存储区DP不能访问XAR0XAR1XAR2XAR3XAR4XAR5XAR6XAR7ARAUMUXData MemoryMUXDP (16)Data BusProgram Bus6 LSBfro

13、m IR2232XAR15-0=AR7-0XAR31-16F1 F2 D1 D2 R1 R2 EC28x Pipeline流水线自动保护机制8-stage pipelineF1 F2 D1 D2 R1 R2 EF1 F2 D1 D2 R1 R2 EF1 F2 D1 D2 R1 R2 EF1 F2 D1 D2 R1 R2 EF1 F2 D1 D2 R1 R2 EF1 F2 D1 D2 R1 R2 XF1 F2 D1 D2 R1 R2 XABCDEFGWWWWWWWWE & G Accesssame address R1 R2 E WD2 R1 R2 E WF1: 取指令地址F2: 取指令内容D1

14、: 32/16判断边界D2: 取指译码R1: 操作数地址R2: 取操作数E: 指令执行W: 写内容回存储单元HTMS320F2812 Memory MapMO SARAM (1K)M1 SARAM (1K)LO SARAM (4K)L1 SARAM (4K)HO SARAM (8K)Boot ROM (4K)MP/MC=0BROM vector (32)MP/MC=0 ENPIE=0OTP (1K)FLASH (128K)reservedreservedreservedPF 0 (2K)reservedreservedPF 1 (4K)reservedPF 2 (4K)reservedPIE

15、vector(256)ENPIE=1XINT Zone 0 (8K)XINT Zone 1 (8K)XINT Zone 2 (0.5M)XINT Zone 6 (0.5M)XINT Zone 7 (16K)MP/MC=1XINT Vector-RAM (32)MP/MC=1 ENPIE=0reservedreservedreservedData | Program0 x00 00000 x00 04000 x00 08000 x00 0D000 x00 10000 x00 60000 x00 70000 x00 80000 x00 90000 x00 A0000 x3D 78000 x3D 8

16、0000 x3F 80000 x3F A0000 x3F F0000 x3F FFC00 x3F C0000 x18 00000 x10 00000 x08 00000 x00 40000 x00 2000Data | Program128-Bit PasswordCSM: LO, L1OTP, FLASHreserved0 x3D 7C003FF0003FFCC0：数学表和功能3FFCC03FFFC0：引导装载功能3FFFC03FFFFF：复位向量以及CPU向量表唯一能从内部引导ROM操作向量的是位于3FFFC0的复位向量，他是厂家编程的，指向初始化引导函数（InitBoot），该函数用于启

17、动引导操作Code Security Module保护知识产权用户自定义密码128bit映射到存储空间：0 x00 0AE0 0 x00 0AE7寄存器受到EALLOW保护128-bits = 2128 = 3.4 x 1038 1次/2cycle 猜测所有的密码需要1.4*10E23 年LO SARAM (4K)L1 SARAM (4K)OTP (1K)FLASH (128K)reserved0 x00 80000 x00 90000 x00 A0000 x3D 78000 x3D 8000128-Bit Passwordreserved0 x3D 7C000 x3F 7FF8 - 0 x3

18、F 7FFFCSM PasswordLocations (PWL)C28x Fast Interrupt Response Manager支持96个独立的中断直接访问专用RAM（向量表）自动标志更新自动现场保护软件激发（INTR/TRAP）可屏蔽中断-顺序执行非屏蔽中断/软立即执行28x CPU Interrupt logic28xCPUINTMIFRIER96 Peripheral Interrupts 12x8 = 9612 interruptsINT1 to INT12PIERegisterMapPIE module For 96 interruptsTST0AHALPHPLAR1 (L

19、)AR0 (L)DPST1DBSTATIERPC(msw)PC(lsw)Auto Context SaveC28x / C24x ModesC2xLP Mode 1 1C28x Mode 1 0C27X (default) 0 0Reserved 0 1 OBJMODE AMODEMode BitsCompiler OptionMode TypeC24x patible mode: 允许运行C24的代码(重新编译过的） 使用C28代码产生工具C28x mode: 可以使用C28的所有特征编译手段如果用户从外存引导就必须是28模式或者C2xLP-v28-v28 -m20-v27Reset Boo

20、tloaderResetOBJMODE=0 AMODE=0ENPIE=0 VMAP=1Boot determined by state of GPIO pinsReset vector fetched from boot ROM0 x3F FFC0XMPNMC=0( puter mode) ExecutionEntry PointH0 SARAMBootloader setsOBJMODE = 1AMODE = 0第三部分：C2000 InterruptC28x 中断源C28xCORE2个不可屏蔽中断/RSNMI14个可屏蔽中断 (INT1 INT14)INT1INT2INT3INT4INT5

21、INT6INT7INT8INT9INT10INT11INT12INT13INT14RSNMIC28X 复位中断Watchdog TimerRS pin activeTo RS pinRSC28x CoreReset Boot LoaderResetOBJMODE=0 AMODE=0ENPIE=0 VMAP=1M0M1MAP=1Boot determined by state of GPIO pinsReset vector fetched from boot ROM0 x3F FFC0XMPNMC=1(microprocessor mode)Reset vector fetched from

22、XINTF zone 70 x3F FFC0XMPNMC=0( puter mode) ExecutionBootloadingEntry Point Routines FLASH SPIH0 SARAM SCI-A OTPParallel loadNotes:F2810 XMPNMC tied low internal to deviceXMPNMC refers to input signalMP/MC is status bit in XINTFCNF2 registerXMPNMC only sampled at resetBootloader 模式 GPIO pinsF4 F12 F

23、3 F2 1 x x x flash 0 x3F 7FF6,用户必须已经编写了分支指令重定位程序执行 * 0 0 1 0 H0 SARAM 0 x3F 8000* 0 0 0 1 OTP 0 x3D 7800* 0 1 x x 从外部EEPROM调用SPL_Boot 0 0 1 1 从SCI-A调用SCI-Boot 0 0 0 0 从GPIO B口调用Parallel_Boot* Boot ROM software configures the device for C28x mode before jumpReset 引导过程H0 SARAM (8K)FLASH (128K)OTP (2K)

24、0 x3F 7FF60 x3D 78000 x3D 80000 x3F 80000 x3F F0000 x3F FFC0Boot ROM (4K)BROM vector (32)0 x3F FC00Boot CodeRESETExecution Entry Point DeterminedBy GPIO PinsBootloadingRoutines (SPI, SCI-A,Parallel Load)0 x3F FC00C28X 中断源EV and Non-EVPeripherals(EV, ADC, SPI,SCI, McBSP, CAN)内部中断源外部中断源XINT1XINT2PDPIN

25、TxRSXNMI_XINT13NMIC28x COREINT1INT13INT2INT3INT12INT14RSPIE (PeripheralInterruptExpansion)TINT2TINT1TINT0IFR中断标志寄存器可屏蔽中断处理过程101(IFR)“Latch”INT1INT2INT14CoreInterruptC28xCore(INTM)“Global Switch”(IER)“Switch”中断使能寄存器（INTM以及IER被使能了才能响应）中断标志寄存器 (IFR)RTOSINTDLOGINTINT14INT13INT12INT11INT10INT989101112131

26、415INT8INT7INT6INT5INT4INT3INT2INT101234567中断确定 :IFR Bit = 1中断未确定 :IFR Bit = 0DINT/EINT，禁止中断写IFR时产生中断，中断具有优先级CPU识别中断之后IFR由CPU复位复位状态为0 /* Manual setting/clearing IFR */extern cregister volatile unsigned int IFR; IFR |= 0 x0008;/set INT4 in IFR IFR &= 0 xFFF7;/clear INT4 in IFR中断使能寄存器 (IER)RTOSINTDLOG

27、INTINT14INT13INT12INT11INT10INT989101112131415INT8INT7INT6INT5INT4INT3INT2INT101234567使能: Set IER Bit = 1禁止: Clear IER Bit = 0DINT/EINT，禁止中断复位清零/* Interrupt Enable Register */extern cregister volatile unsigned int IER; IER |= 0 x0008;/enable INT4 in IER IER &= 0 xFFF7;/disable INT4 in IER中断全局使能INTM用

28、来做全局的使能/禁止中断:使能:INTM = 0禁止:INTM = 1 (reset value)INTM只能被汇编语言修改:INTMST1 Bit 0/* Global Interrupts */ asm(“ CLRC INTM”); /enable global interrupts asm(“ SETC INTM”); /disable global interruptsPeripheral Interrupt Expansion - PIEPeripheral Interrupts 12x8 = 96IFRIERINTM28xCore28x Core Interrupt logicPI

29、E module for 96 InterruptsINT1.x interrupt groupINT2.x interrupt groupINT3.x interrupt groupINT4.x interrupt groupINT5.x interrupt groupINT6.x interrupt groupINT7.x interrupt groupINT8.x interrupt groupINT9.x interrupt groupINT10.x interrupt groupINT11.x interrupt groupINT12.x interrupt groupINT1 IN

30、T 1212 Interrupts96 INT1.1INT1.2INT1.8101INT1PIEIFR1PIEIER1Interrupt Group 1INT13 (TINT1 / XINT13)INT14 (TINT2)NMIPIE 寄存器INTx.2INTx.3INTx.4INTx.5INTx.6INTx.7INTx.8INTx.10123456715 - 8reservedPIEIFRx register (x = 1 to 12)INTx.2INTx.3INTx.4INTx.5INTx.6INTx.7INTx.8INTx.10123456715 - 8reservedPIEIERx r

31、egister (x = 1 to 12)reservedPIEACKxPIE Interrupt Acknowledge Register (PIEACK)1243567890101115 - 12ENPIEPIEVECTPIECTRL register015 - 1#include “DSP28_Device.h” PieCtrlRegs.PIEIFR1.bit.INTx4 = 1; /manually set IFR for XINT1 in PIE group 1 PieCtrlRegs.PIEIER3.bit.INTx5 = 1; /enable CAPINT1 in PIE gro

32、up 3 PieCtrlRegs.PIEACK.all = 0 x0004; /acknowledge the PIE group 3 PieCtrlRegs.PIECTRL.bit.ENPIE = 1; /enable the PIEPrioVectorOffset复位时默认中断向量表Memory0BROM Vectors64 W0 x3F FFC00 x3F FFFFPIE Vectors256 W0 x00 0D00 4 2 3DlogIntRtosIntEmuIntNMI020406080A0C0E10121416181A1C1E2022242628-3E - -IllegalUser

33、 1-12 5 6 7 8 910111213141516171819Int 1Int 2Int 3Int 4Int 5Int 6Int 7Int 8Int 9Int 10Int 11Int 12Int 13Int 14 1Reset00Default Vector TableRemapped whenENPIE = 1PIE vector generated by config ToolUsed to initialize PIE vectorsPIE Vector Mapping (ENPIE = 1)CPU vectors are remapped to 0 x00 0D00 in Da

34、ta spacePIE vector space - 0 x00 0D00 256 Word memory in Data space INT13 0 x00 0D1A XINT1 Interrupt VectorINT14 0 x00 0D1C Timer2 RTOS VectorDatalog 0 x00 0D1D Data logging vector USER11 0 x00 0D3E User defined TRAP INT1.1 0 x00 0D40 PIEINT1.1 interrupt vector INT12.1 0 x00 0DF0 PIEINT12.1 interrup

35、t vectorINT1.8 0 x00 0D4E PIEINT1.8 interrupt vectorINT12.8 0 x00 0DFE PIEINT12.8 interrupt vector PIE vector address PIE vector DescriptionNot used 0 x00 0D00 Reset Vector Never Fetched Here Vector nameINT1 0 x00 0D02 INT1 re-mapped below re-mapped below INT12 0 x00 0D18 INT12 re-mapped below RESET

36、 and INT1-INT12 vector locations are Re-mappedF2812/10 PIE Interrupt Assignment TableINTx.8INTx.7INTx.6INTx.5INTx.4INTx.3INTx.2INTx.1INT1WAKEINTTINT0ADCINTXINT2XINT1PDPINTBPDPINTAINT2T1OFINTT1UFINTT1CINTT1PINTCMP3INTCMP2INTCMP1INTINT3CAPINT3CAPINT2CAPINT1T2OFINTT2UFINTT2CINTT2PINTINT4T3OFINTT3UFINTT

37、3CINTT3PINTCMP6INTCMP5INTCMP4INTINT5CAPINT6CAPINT5CAPINT4T4OFINTT4UFINTT4CINTT4PINTINT6MXINTMRINTSPITXINTASPIRXINTAINT7INT8INT9SCITXINTBSCIRXINTBSCITXINTASCIRXINTAINT10INT11INT12ECAN0INTECAN1INTDevice Vector Mapping - Summary_c_int00: . . .CALL main()main() initialization(); . . .Initialization ( )

38、EALLOW Load PIE Vectors Enable the PIEIER Enable PIECTRL Enable Core IER Enable INTM EDISPIE Vector Table256 Word RAM0 x00 0D00 0DFFRESETReset Vector = Boot-ROM Code Flash Entry Point = LB _c_int00User Code Start MPNMC = 0 (on-chip ROM memory)Reset Vector = _c_int00 User Code Start MPNMC = 1 (extern

39、al memory XINTF)中断响应过程CPU 动作描述TST0AHALPHPLAR1AR0DPST1DBSTATIERPC(msw)PC(lsw)寄存器PUSH 堆栈14 个寄存器被自动保存（.） 0 IFR (bit)请IFR位 0 IER (bit)清IER位 1 INTM/DBGM禁止全局中断/Debug 事件 Vector PC 加载中断向量表给PC指针 Clear other status bits清 LOOP, EALLOW, IDLESTAT第四部分：C2000 内存映射/BOOTROMTMS320F2812 内存映射MO SARAM (1K)M1 SARAM (1K)LO

40、 SARAM (4K)L1 SARAM (4K)HO SARAM (8K)Boot ROM (4K)MP/MC=0BROM vector (32)MP/MC=0 ENPIE=0OTP (1K)FLASH (128K)reservedreservedreservedPF 0 (2K)reservedreservedPF 1 (4K)reservedPF 2 (4K)reservedPIE vector(256)ENPIE=1XINT Zone 0 (8K)XINT Zone 1 (8K)XINT Zone 2 (0.5M)XINT Zone 6 (0.5M)XINT Zone 7 (16K)MP

41、/MC=1XINT Vector-RAM (32)MP/MC=1 ENPIE=0reservedreservedreserved数据 | 程序0 x00 00000 x00 04000 x00 08000 x00 0D000 x00 10000 x00 60000 x00 70000 x00 80000 x00 90000 x00 A0000 x3D 78000 x3D 80000 x3F 80000 x3F A0000 x3F F0000 x3F FFC00 x3F C0000 x18 00000 x10 00000 x08 00000 x00 40000 x00 2000数据 | 程序12

42、8-Bit Passwordreserved0 x3D 7C00TMS320F2812片内ROM MAP段地址0 x3F F000 0 x3F F5010 x3F F502 0 x3F F7110 x3F F712 0 x3F F8330 x3F F834 0 x3F F9E70 x3F F9E8 0 x3F FB4F0 x3F FB50 0 x3F FBFF0 x3F FC00 0 x3F FFBF0 x3F FFC0 0 x3F FFC10 x3F FFC2 0 x3F FFFF程序数据空间正弦/余弦; 641 x 32(Q30)规格化翻转; 264 x 32(Q29)规格化平方根;145

43、 x32(Q30)规格化ACTAN; 218 x32(Q30)圆整和饱和度. 180 x 32(Q30)保留引导装载功能，ROM版本复位向量表; 2 x 16初始化向量; 62 x 16C28x 初始化引导汇编程序Init BootRESET初始化器件:OBJMODE = 1AMODE = 0M0M1MAP = 1DP = 0OVM = 0SPM = 0SP = 0 x00 0400 Dummy Read CSM passwordsCall BootModeSelectExitBootFlash 的启动顺序H0 SARAM (8K)0 x3F 7FF60 x3D 80000 x3F 80000

44、 x3F F0000 x3F FFC0Boot ROM (4K)BROM vector (32)0 x3F FC00Boot CodeRESET0 x3F FC00SCAN GPIOFLASH (128K)Passwords (8)_c_int00LBC start routine“rts2800_ml.lib”“user” code sections_c_int00Boot.asmmain ( ) return;23451F2812 Flash Memory MapData & Program SpaceAddress Range0 x3D 8000 0 x3D 9FFF0 x3D A000

45、 0 x3D BFFF0 x3D C000 0 x3D FFFF0 x3E 0000 0 x3E 3FFF0 x3E 4000 0 x3E 7FFF0 x3E 8000 0 x3E BFFF0 x3E C000 0 x3E FFFF0 x3F 0000 0 x3F 3FFF0 x3F 4000 0 x3F 5FFF0 x3F 6000 0 x3F 7F7F0 x3F 7F80 0 x3F 7FF50 x3F 7FF6 0 x3F 7FF70 x3F 7FF8 0 x3F 7FFFSector J ; 8K x 16Sector I ; 8K x 16Sector H : 16K x 16Sec

46、tor G ; 16K x 16Sector F ; 16K x 16Sector E ; 16K x 16Sector D; 16K x 16Sector C ; 16K x 16Sector B ; 8K x16Sector A ; (8K-128) x16 Program to 0 x0000 when using Code Security Mode !Flash Entry Point ; 2 x 16Security Password ; 8 x 1616 or 32 dispatched1664Aligned 64-bit fetch2-level deep fetch buff

47、er64C28x Core decoder unit加速 Flash 执行速度流水线Flash Pipeline Enable0 = disable (default)1 = enableENPIPEreserved1501FOPT 0 x00 0A80 CCS编程插件Code Security Module (CSM)受CSM保护的存储区：L0、L1、OTP、Flash在受保护区域里面运行的程序才能读写限制区的数据任何其他的数据读写都被拒绝:JTAG 调试, ROM 引导, 运行在片外或者片内非保护区的程序LO SARAM (4K)L1 SARAM (4K)OTP (1K)FLASH (12

48、8K)reserved0 x00 80000 x00 90000 x3D 78000 x3D 8000reserved0 x00 A000 0 x3D 7C00CSM RegistersAddress Name Reset ValueDescription0 x00 0AE0 KEY0 0 xFFFF128位KEY寄存器的低位字0 x00 0AE1 KEY1 0 xFFFF128位KEY寄存器的第二个字0 x00 0AE2 KEY2 0 xFFFF。0 x00 0AE3 KEY3 0 xFFFF。0 x00 0AE4 KEY4 0 xFFFF。0 x00 0AE5 KEY5 0 xFFFF。0

49、 x00 0AE6 KEY6 0 xFFFF。0 x00 0AE7 KEY7 0 xFFFF 128位KEY寄存器的高位字0 x00 0AEF CSMSCR 0 xFFFFCSM 状态与控制寄存器Key Registers（EALLOW protected）Address Name Reset ValueDescription0 x3F 7FF8 PWL0 user defined 128位密码的低位字0 x3F 7FF9 PWL1 user defined。0 x3F 7FFA PWL2 user defined 。0 x3F 7FFB PWL3 user defined 。0 x3F 7F

50、FC PWL4 user defined。0 x3F 7FFD PWL5 user defined。0 x3F 7FFE PWL6 user defined 。0 x3F 7FFF PWL7 user defined128位密码的高位字PWL in memory reserved for passwords onlyCSM的安全解锁上电或者复位的时候CSM被锁的CSM的解锁:对FLASH的每个密码执行一次哑读操作（8次）往8个KEY寄存器写入正确的密码新的Flash器件 (PWL 都是 0 xFFFF):对PWL进行一次读写，使得器件工作在非锁定模式volatile int *CSM=0 x0

51、00AE0；volatile int *PWL=0 x3F7FF8；volatile int tmp;Int I;/哑读密码位置8次For (i=0;i 4; 电源级别 ADCRFDN ADCBGNDADCPWDNADC加电 1 1 1ADC掉电 1 0 0ADC关闭 0 0 0保留 1 0 x保留 0 1 xADC的低功耗方式1、给ADC模拟电路的其他部分家电前，给参考电路和带隙电路加电2、ADC完全加电后，需要等待20s，才能进行第一次抓换。3、ADC掉电，3位被同时清除。通过软件设置。第五部分：F2812数字通信接口（SPI/SCI）SPI 模块特点4个外部引脚：SPISOMI/SPIS

52、IMO/SPISTESPICLK2种工作模式：主工作模式、从工作模式波特率：125种不同的可编程速率16级发送和接受FIFO4种时钟配置方法（由时钟极性和时钟相位控制）不带相位延迟的下降沿：SPI在SPICLK高有效，SPI在SPICLK下降沿发送数据，上升沿接受数据带有相位延迟的下降沿：SPICLD高有效，SPI在SPICLK的下降沿的前半周期发送数据，下降沿接受不带相位延迟的上升沿：SPICLK低有效，SPI在SPICLK的上升沿发送数据，下降沿接受数据带有相位延迟的上升沿：SPICLK低有效，SPI在SPICLK的下降沿的前半周期发送数据，下降沿接受数据串行外围接口SPI的工作流程SPI

53、 Shift RegisterSPI Shift RegisterSPI Device #1 - MasterSPI Device #2 - Slave数据同步传输和接受SPI主设备提供时钟shiftshiftclockSPI 功能框图SPIRXBUF.15-0SPIDAT.15-0SPICLKSPISOMISPISIMOLSPCLKbaudrateclockpolarityclockphaseC28x - SPI 主模式SPITXBUF.15-0LSBMSBTX FIFO_0TX FIFO_15RX FIFO_0RX FIFO_15SPI 功能框图SPIRXBUF.15-0SPIDAT.15

54、-0SPICLKSPISOMISPISIMOclockphaseC28x - SPI 从模式SPITXBUF.15-0MSBLSBTX FIFO_0TX FIFO_15RX FIFO_0RX FIFO_15SPI 数据格式的调整可编程数据长度116发送数据少于16位时需要左调整MSB 先发送接受数据少于16位时需要右调整用户程序屏蔽MSB11001001XXXXXXXXXXXXXXXX11001001SPIDAT - Processor #1SPIDAT - Processor #2SPI-A 寄存器AddressRegisterName0 x007040SPICCRSPI-A 配置控制寄存器

55、0 x007041SPICTLSPI-A 工作控制寄存器0 x007042SPISTSSPI-A 状态寄存器0 x007044SPIBRRSPI-A 波特率寄存器0 x007046SPIEMUSPI-A 仿真缓冲寄存器0 x007047SPIRXBUFSPI-A 串行接受寄存器0 x007048SPITXBUFSPI-A 串行发送寄存器0 x007049SPIDATSPI-A 串行数据寄存器0 x00704ASPIFFTXSPI-A FIFO 发送寄存器0 x00704BSPIFFRXSPI-A FIFO 接受寄存器0 x00704CSPIFFCTSPI-A FIFO 控制寄存器0 x0070

56、4FSPIPRISPI-A 极性控制寄存器SPI-A 控制寄存器SPICCR 0 x007040012765-4reservedSPI CHAR.3-0字长控制位e.g.0000b length = 11111b length = 16SPI SW RESET:在改变配置前清除刺位在重新操作开始前设置此位 0 = SPI flags reset 1 = normal operationCLOCK POLARITY0 = 上升沿输出/下降沿输入1 = 下降沿输入/上升沿输出reserved15-83SPI-A 工作控制寄存器SPICTL 0 x00704101215-543reservedCLO

57、CK PHASE0 = no CLK delay1 = CLK delayed 1/2 cycleOVERRUN INT ENABLE0 = 禁止接受溢出中断（SPISTS.7)1 = 使能接受溢出中断（SPISTS.7)MASTER/SLAVE0 = slave1 = masterTALK0 = transmission disabled,output pin hi-Zd1 = transmission enabledSPI INT ENABLE0 = disabled1 = enabledSPI-A 波特率寄存器SPIBRR 0 x00704415-76-0reservedSPI BIT

58、RATESPICLK signal =LSPCLK(SPIBRR + 1)LSPCLK4,SPIBRR = 3 to 127,SPIBRR = 0, 1, or 2SPI-A 状态寄存器SPISTS 0 x007042764-0SPI INT FLAG (read only)传输完成置1如果 SPI INT ENA设置(SPICTL.0)则置位读 SPIBRXUF清零RECEIVE OVERRUN FLAG (read/clear only)在SPIRXBUF被读取之前下一次接受完成则1 如果 OVERRUN INT ENA 被设置 (SPICTL.4)则中断请求写1置0reservedres

59、erved15-8TX BUF FULL (read only) 写 SPITXBUF置位 载入 SPIDAT 清零5SPI-A FIFO 发送寄存器SPIFFTX 0 x00704A0TXFFIL2SPIFFENATXFFST0TXFFST3TXFFIENA123456789101112131415TXFFIL0TXFFIL1TXFFIL4TXFFIL3TXFFST1TXFFINTCLRTXFFST2TXFFINTTXFFST4TXFIFOSPIRSTTX FIFO Status (read-only)00000TX FIFO empty00001TX FIFO has 1 word0001

60、0TX FIFO has 2 words00011TX FIFO has 3 words10000TX FIFO has 16 words.TX FIFO Interrupt LevelInterrupt when TXFFST4-0and TXFFIL4-0 matchSPI FIFOEnhancements0 = disable1 = enableTX FIFO Reset0 = reset (pointer to 0)1 = enable operationTX FIFOInterrupt(on match)Enable0 = disable1 = enableTX FIFOInterr