基于VHDL的八路彩灯控制器

..目录1.任务需求22.总体设计22.1各个花样的状态图22.2总体框图43.模块设计43.1分频器模块43.2花样一模块53.3花样二模块63.4花样三模块83.5顶层设计104.仿真图114.1分频器仿真波形114.2花样一仿真波形114.3花样二仿真波形124.4花样三仿真波形134.5总体仿真波形135.心得体会146.参考文献151.任务需求现今生活中,市场上未能吸取顾客的注意,高出各式各样的方法,其中彩灯的装饰便是其中非常普遍的一种。使用彩灯即可起装饰宣传作用,又可以现场气氛,城市也因为众多的彩灯而变得灿烂辉煌。VHDL语言作为可编程逻辑器件的标准语言描述能力强,覆盖面广,抽象能力强,在实际应用中越来越广泛。在这个阶段,人们开始追求贯彻整个系统设计的自动化,可以从繁重的设计工作中彻底解脱出来,把精力集中在创造性的方案与概念构思上,从而可以提高设计效率,缩短产品的研制周期。整个过程通过EDA工具自动完成,大大减轻了设计人员的工作强度,提高了设计质量,减少了出错的机会。要求设计一个8路彩灯控制器,要求彩灯可以演示以下花型：从两边向中间亮,再从中间向两边亮；实现淡入淡出效果从左至右逐个亮,在从右到左逐个亮；2.总体设计2.1各个花样的状态图当选择花样一时状态图如下：S0="ZZZZZZZZ" S1="10000001" S2="01000010" S3="00100100"S4="00011000" S5="00100100" S6="01000010"S0S0S1CLRS1S2S6S2S6S3S5S3S5S4S4当选择花样二时状态图如下：S0="ZZZZZZZZ" S1="00000000" S2="10000000" S3="11000000"S4="11100000" S5="11110000" S6="11111000" S7="11111100"S8="11111110"S9="11111111"S10="01111111"S11="00111111"S12="00011111"S13="00001111"S14="00000111" S15="00000011"S16="00000001"SS0s1CLRs1S16S2S16S2S4S4S15S15S5S5s14s14s6s6s13s13S7S7s12s12S8s11S8s11S9s10S9s10当选择花样三时状态图如下：S0="ZZZZZZZZ" S1="10000000" S2="01000000" S3="00100000"S4="00010000" S5="00001000" S6="00000100" S7="00000010"S8="00000001" S9="00000010" S10="00000100" S11="00001000"S12="0001000" S13="00100000" S14="01000000"SS0s1CLRs1S2S2s14s14S3s13S3s13S4s12S4s12s11S5s11S5s10s6s10s6S7S9S7S9S8S82.2总体框图分分频器CLK状态状态机LED显示选择器选择器XUAN3.模块设计3.1分频器模块--由于机器时钟周期太短,不能满足要求--此模块实现分频,得到需要的时钟LIBRARYIEEE;USEIEEE.std_logic_1164.ALL;USEIEEE.std_logic_unsigned.ALL;ENTITYfenpinqiISPORT<CLK:INSTD_LOGIC;--原机器时钟CLR:INSTD_LOGIC;CLK1:OUTSTD_LOGIC>;--分频后的时钟ENDfenpinqi;ARCHITECTUREARTOFfenpinqiISSIGNALCK:STD_LOGIC;BEGINPROCESS<CLK,CLR>ISVARIABLETEMP:STD_LOGIC_VECTOR<2DOWNTO0>;BEGINIFCLR='1'THENCK<='0';TEMP:="000";ELSIF<CLK'EVENTANDCLK='1'>THENIFTEMP="111"THENTEMP:="000";CK<=NOTCK;ELSETEMP:=TEMP+'1';ENDIF;ENDIF;ENDPROCESS;CLK1<=CK;ENDART;3.2花样一模块--用分频器分频后的时钟来显示花样实现--从两边向中间亮,再从中间向两边亮；LIBRARYIEEE;USEIEEE.STD_LOGIC_1164.ALL;ENTITYhy1ISPORT<CLK1:INSTD_LOGIC;CLR:INSTD_LOGIC; XUAN:INSTD_LOGIC_VECTOR<1DOWNTO0>;LED1:OUTSTD_LOGIC_VECTOR<7DOWNTO0>>;ENDENTITYhy1;ARCHITECTUREARTOFhy1ISTYPESTATEIS<S0,S1,S2,S3,S4,S5,S6>;--设计状态机,实现花样转换SIGNALCURRENT_STATE:STATE;SIGNALLIGHT:STD_LOGIC_VECTOR<7DOWNTO0>;BEGINPROCESS<CLR,CLK1,XUAN>IS--定义花样<1为灯亮,0为灯灭>CONSTANTL1:STD_LOGIC_VECTOR<7DOWNTO0>:="10000001";CONSTANTL2:STD_LOGIC_VECTOR<7DOWNTO0>:="01000010";CONSTANTL3:STD_LOGIC_VECTOR<7DOWNTO0>:="00100100";CONSTANTL4:STD_LOGIC_VECTOR<7DOWNTO0>:="00011000";CONSTANTL5:STD_LOGIC_VECTOR<7DOWNTO0>:="00100100";CONSTANTL6:STD_LOGIC_VECTOR<7DOWNTO0>:="01000010";BEGIN IFXUAN="01"THEN IFCLR='1'THEN CURRENT_STATE<=S0; ELSIF<CLK1'EVENTANDCLK1='1'>THEN CASECURRENT_STATEIS--状态机转换 WHENS0=>LIGHT<="ZZZZZZZZ";CURRENT_STATE<=S1; WHENS1=>LIGHT<=L1;CURRENT_STATE<=S2; WHENS2=>LIGHT<=L2;CURRENT_STATE<=S3; WHENS3=>LIGHT<=L3;CURRENT_STATE<=S4; WHENS4=>LIGHT<=L4;CURRENT_STATE<=S5; WHENS5=>LIGHT<=L5;CURRENT_STATE<=S6; WHENS6=>LIGHT<=L6;CURRENT_STATE<=S1; ENDCASE; ENDIF; ENDIF;ENDPROCESS;LED1<=LIGHT;ENDART;3.3花样二模块--用分频器分频后的时钟来显示花样实现--实现淡入淡出效果LIBRARYIEEE;L;ENTITYhy2ISPORT<CLK1:INSTD_LOGIC;CLR:INSTD_LOGIC; XUAN:INSTD_LOGIC_VECTOR<1DOWNTO0>;LED2:OUTSTD_LOGIC_VECTOR<7DOWNTO0>>;ENDENTITYhy2;ARCHITECTUREARTOFhy2IS--设计状态机,实现花样转换TYPESTATEIS<S0,S1,S2,S3,S4,S5,S6,S7,S8,S9,S10,S11,S12,S13,S14,S15,S16>;SIGNALCURRENT_STATE:STATE;SIGNALLIGHT:STD_LOGIC_VECTOR<7DOWNTO0>;BEGINPROCESS<CLR,CLK1,XUAN>IS--定义花样<1为灯亮,0为灯灭>CONSTANTL1:STD_LOGIC_VECTOR<7DOWNTO0>:="00000000";CONSTANTL2:STD_LOGIC_VECTOR<7DOWNTO0>:="10000000";CONSTANTL3:STD_LOGIC_VECTOR<7DOWNTO0>:="11000000";CONSTANTL4:STD_LOGIC_VECTOR<7DOWNTO0>:="11100000";CONSTANTL5:STD_LOGIC_VECTOR<7DOWNTO0>:="11110000";CONSTANTL6:STD_LOGIC_VECTOR<7DOWNTO0>:="11111000";CONSTANTL7:STD_LOGIC_VECTOR<7DOWNTO0>:="11111100";CONSTANTL8:STD_LOGIC_VECTOR<7DOWNTO0>:="11111110";CONSTANTL9:STD_LOGIC_VECTOR<7DOWNTO0>:="11111111";CONSTANTL10:STD_LOGIC_VECTOR<7DOWNTO0>:="01111111";CONSTANTL11:STD_LOGIC_VECTOR<7DOWNTO0>:="00111111";CONSTANTL12:STD_LOGIC_VECTOR<7DOWNTO0>:="00011111";CONSTANTL13:STD_LOGIC_VECTOR<7DOWNTO0>:="00001111";CONSTANTL14:STD_LOGIC_VECTOR<7DOWNTO0>:="00000111";CONSTANTL15:STD_LOGIC_VECTOR<7DOWNTO0>:="00000011";CONSTANTL16:STD_LOGIC_VECTOR<7DOWNTO0>:="00000001";BEGIN IFXUAN="10"THEN IFCLR='1'THEN CURRENT_STATE<=S0; ELSIF<CLK1'EVENTANDCLK1='1'>THEN CASECURRENT_STATEIS--状态机转换 WHENS0=>LIGHT<="ZZZZZZZZ";CURRENT_STATE<=S1; WHENS1=>LIGHT<=L1;CURRENT_STATE<=S2; WHENS2=>LIGHT<=L2;CURRENT_STATE<=S3; WHENS3=>LIGHT<=L3;CURRENT_STATE<=S4; WHENS4=>LIGHT<=L4;CURRENT_STATE<=S5; WHENS5=>LIGHT<=L5;CURRENT_STATE<=S6; WHENS6=>LIGHT<=L6;CURRENT_STATE<=S7; WHENS7=>LIGHT<=L7;CURRENT_STATE<=S8; WHENS8=>LIGHT<=L8;CURRENT_STATE<=S9; WHENS9=>LIGHT<=L9;CURRENT_STATE<=S10; WHENS10=>LIGHT<=L10;CURRENT_STATE<=S11; WHENS11=>LIGHT<=L11;CURRENT_STATE<=S12; WHENS12=>LIGHT<=L12;CURRENT_STATE<=S13; WHENS13=>LIGHT<=L13;CURRENT_STATE<=S14; WHENS14=>LIGHT<=L14;CURRENT_STATE<=S15; WHENS15=>LIGHT<=L15;CURRENT_STATE<=S16; WHENS16=>LIGHT<=L16;CURRENT_STATE<=S1; ENDCASE; ENDIF; ENDIF;ENDPROCESS;LED2<=LIGHT;ENDART;3.4花样三模块--用分频器分频后的时钟来显示花样实现--从左至右逐个亮,在从右到左逐个亮LIBRARYIEEE;USEIEEE.STD_LOGIC_1164.ALL;ENTITYhy3ISPORT<CLK1:INSTD_LOGIC;CLR:INSTD_LOGIC; XUAN:INSTD_LOGIC_VECTOR<1DOWNTO0>;LED3:OUTSTD_LOGIC_VECTOR<7DOWNTO0>>;ENDENTITYhy3;ARCHITECTUREARTOFhy3IS--设计状态机,实现花样转换TYPESTATEIS<S0,S1,S2,S3,S4,S5,S6,S7,S8,S9,S10,S11,S12,S13,S14>;SIGNALCURRENT_STATE:STATE;SIGNALLIGHT:STD_LOGIC_VECTOR<7DOWNTO0>;BEGINPROCESS<CLR,CLK1,XUAN>IS--定义花样<1为灯亮,0为灯灭>CONSTANTL1:STD_LOGIC_VECTOR<7DOWNTO0>:="10000000";CONSTANTL2:STD_LOGIC_VECTOR<7DOWNTO0>:="01000000";CONSTANTL3:STD_LOGIC_VECTOR<7DOWNTO0>:="00100000";CONSTANTL4:STD_LOGIC_VECTOR<7DOWNTO0>:="00010000";CONSTANTL5:STD_LOGIC_VECTOR<7DOWNTO0>:="00001000";CONSTANTL6:STD_LOGIC_VECTOR<7DOWNTO0>:="00000100";CONSTANTL7:STD_LOGIC_VECTOR<7DOWNTO0>:="00000010";CONSTANTL8:STD_LOGIC_VECTOR<7DOWNTO0>:="00000001";CONSTANTL9:STD_LOGIC_VECTOR<7DOWNTO0>:="00000010";CONSTANTL10:STD_LOGIC_VECTOR<7DOWNTO0>:="00000100";CONSTANTL11:STD_LOGIC_VECTOR<7DOWNTO0>:="00001000";CONSTANTL12:STD_LOGIC_VECTOR<7DOWNTO0>:="00010000";CONSTANTL13:STD_LOGIC_VECTOR<7DOWNTO0>:="00100000";CONSTANTL14:STD_LOGIC_VECTOR<7DOWNTO0>:="01000000";BEGIN IFXUAN="11"THEN IFCLR='1'THEN CURRENT_STATE<=S0; ELSIF<CLK1'EVENTANDCLK1='1'>THEN CASECURRENT_STATEIS--状态机转换 WHENS0=>LIGHT<="ZZZZZZZZ";CURRENT_STATE<=S1; WHENS1=>LIGHT<=L1;CURRENT_STATE<=S2; WHENS2=>LIGHT<=L2;CURRENT_STATE<=S3; WHENS3=>LIGHT<=L3;CURRENT_STATE<=S4; WHENS4=>LIGHT<=L4;CURRENT_STATE<=S5; WHENS5=>LIGHT<=L5;CURRENT_STATE<=S6; WHENS6=>LIGHT<=L6;CURRENT_STATE<=S7; WHENS7=>LIGHT<=L7;CURRENT_STATE<=S8; WHENS8=>LIGHT<=L8;CURRENT_STATE<=S9; WHENS9=>LIGHT<=L9;CURRENT_STATE<=S10; WHENS10=>LIGHT<=L10;CURRENT_STATE<=S11; WHENS11=>LIGHT<=L11;CURRENT_STATE<=S12; WHENS12=>LIGHT<=L12;CURRENT_STATE<=S13; WHENS13=>LIGHT<=L13;CURRENT_STATE<=S14; WHENS14=>LIGHT<=L14;CURRENT_STATE<=S1; ENDCASE; ENDIF; ENDIF;ENDPROCESS;LED3<=LIGHT;ENDART;3.5顶层设计--将以上几个模块整合起来,实现八路彩灯的花样控制LIBRARYIEEE;USEIEEE.STD_LOGIC_1164.ALL;ENTITYcaidengISPORT<CLK:INSTD_LOGIC;CLR:INSTD_LOGIC; XUAN:INSTD_LOGIC_VECTOR<1DOWNTO0>;LED:OUTSTD_LOGIC_VECTOR<7DOWNTO0>>;ENDENTITYcaideng;ARCHITECTUREARTOFcaidengISCOMPONENTfenpinqi--对分频器模块进行定义PORT<CLK:INSTD_LOGIC;CLR:INSTD_LOGIC;CLK1:OUTSTD_LOGIC>;ENDCOMPONENTfenpinqi;COMPONENThy1--对花样一模块进行定义PORT<CLK1:INSTD_LOGIC;CLR:INSTD_LOGIC; XUAN:INSTD_LOGIC_VECTOR<1DOWNTO0>;LED1:OUTSTD_LOGIC_VECTOR<7DOWNTO0>>;ENDCOMPONENThy1;COMPONENThy2--对花样二模块进行定义PORT<CLK1:INSTD_LOGIC;CLR:INSTD_LOGIC; XUAN:INSTD_LOGIC_VECTOR<1DOWNTO0>;LED2:OUTSTD_LOGIC_VECTOR<7DOWNTO0>>;ENDCOMPONENThy2;COMPONENThy3--对花样三模块进行定义PORT<CLK1:INSTD_LOGIC;CLR:INSTD_LOGIC; XUAN:INSTD_LOGIC_VECTOR<1DOWNTO0>;LED3:OUTSTD_LOGIC_VECTOR<7DOWNTO0>>;ENDCOMPONENThy3;SIGNALS:STD_LOGIC;--定义中间变量SIGNALL1:STD_LOGIC_VECTOR<7DOWNTO0>;SIGNALL2:STD_LOGIC_VECTOR<7DOWNTO0>;SIGNALL3:STD_LOGIC_VECTOR<7DOWNTO0>;BEGINU1:fenpinqiPORTMAP<CLK,CLR,S>;--对分频器模块进行例化 U2:hy1PORTMAP<S,CLR,XUAN,L1>;--对花样一模块进行定义 U3:hy2PORTMAP<S,CLR,XUAN,L2>;--对花样二模块进行例化 U4:hy3PORTMAP<S,CLR,XUAN,L3>;--对花样三模块进行例化 LED<=L1WHENXUAN="01"ELSE--让LED显示选定的花样 L2WHENXUAN="10"ELSE L3;ENDART;4.仿真图4.1分频器仿真波形CLK为输入,是机器时钟。上升沿有效CLR为输入,是异步复位端,当为高电平时有效,CLK1保持状态CLK1为输出,是分频后得到的我们需要的时钟,周期是原时钟的十六倍4.2花样一仿真波形CLK1为输入,是分频后得到的时钟CLR为输入,是异步复位端,当为高电平时有效X