文件晨讯科技

Contents

Introduction 4

Documentationoverview 4

Keyfeatures 4

Featureintroduction 4

Summaryoffeatures 4

Blockdiagram 7

Termsandacronyms 8

InterfaceDefinitions 11

Interfaceconfiguration 11

Pindefinitions 12

ElectricalSpecifications 19

ApplicationInterfaceSpecifications 20

Powerinterface 20

PMICGPIOandMPPinterface 20

UIMsinterface 21

USBinterface 22

Audiointerface 22

Camerainterface 23

Displayinterface 25

CTPinterface 25

SDinterface 26

Sensorsinterface 27

Sidekeysinterface 27

Batteryconnectorinterface 27

I2C,UARTandSPIinterface 28

UART 28

4.13.2 I2C 28

SPI 30

SIMT1500containsthreegroupsconfigurableSPI,whichmultiplexedwithUART/I2Cfunction 30

But,SIMT1500onlybeusedformasterdevice 30

Otherinterface 30

CameraflashSignal 30

4.14.2

4.14.3

4.14.4

PM_VIB_DRV_NSignal 30

USB_HS_IDSignal 31

VCOINSignal 31

4.14.5RFSignalinputport 31

MechanicalSpecification 33

Overview 33

SIMT1500specifications 33

SIMT1500fromfactor 33

SIMT1500PCBdetails 33

SystemBTBconnectorspecifications 35

BTBconnector 35

RFSpecification 36

Modelcatalog 37

3

1Introduction

1.1Documentationoverview

Thisdocumentdescribeselectricalspecifications,RFspecifications,functioninterface,mechanicalinformationandtestingconclusionsoftheSIMT1500.Withthehelpofthisdocument,theuserscaneasilyandquicklyuseSIMT1500ontheirownapplications.

1.2Keyfeatures

1.21

Featureintroduction

SIMT1500isaverypowerfulbasebandmodulewith124pinsinterface,itcansupportsTDD-LTE/FDD-LTE/WCDMA/DC-HSPA+/TD-SCDMA/GSM/EDGE/CDMA/EVDO.

As

a

basebandmoduleforVoiceanddataphones,smartphone/Musicpalyer-enableddevicesand

applications/cameraphones/Multimediaphones/GPSforgloballocation-basedservices/manyotherterminals,SIMT1500supportsVoice-service,Data-serviceandmanyperipheralequipment,whichcanbesupportedbyQualcomm’s®MSM8909platform.

1.22

Summaryoffeatures

SIMT1500featuresarelistedonthefollowingtable(Table1-1)

Table1-1

SIMT1500features

4

Feature

Capability

Processors

Processors

Qualcomm’s®MSM8909:Quad-ARM®Cortex™-A7applicationprocessorsupto1.0GHz+512KBL2cache

Modemsystem:QDSP6v5coreatupto691MHz768kBL2caches

SupportforSingleRadioLTE(SRLTE)DualSIMDualStandby(DSDS)

RPMsystem:Cortex-M3fortheRPM

Memorysupport

SystemmemoryviaEBI

1xLPDDR2SDRAM;32-bitwide;upto533MHz

ExternalmemoryviaSDC1

eMMCv4.5/SDflashdevices

RFsupport

RFoperatingbands

GSM QualBand850/900/1800;

WCDMA Band1/3/5;

CDMA EvdoRev.A800MHz;

TD-SCDMA Band34/Band39

TDD-LTE Band38/39/40/41

FDD-LTE Band1/Band3

5

Airinterfaces

GSM

WCDMA

CDMA

TD-SCDMA

FDD-LTE

TDD-LTE

GSM900/850/DCS/PCS/GPRS

WCDMAHSDPA,HSUPA,HSPA+,DC-HSPA+DL42Mbps/UL5.76Mbps

CDMAREVA,REVB

DO:DL3.1Mbps/UL1.8Mbps1x:DL/UL307.2kbps

TD-SCDMA:DL2.8Mbps/UL2.2Mbps

Cat4,

Cat4,

GNSS–GPSOneengine

Gen8C

GPS,Beidou,Glonass

Multimedia

Displayinterfaces

MIPI_DSI

Generaldisplayfeatures

One

4-lane–1.5Gbpsperlane;WVGA,uptoHD(720p),60fps

Colordepth–24-bitpp(RGB888)

Paneltypes–MostMIPIDSIcompliantpanelssupported;

Camerainterfaces

NumberofCSIs

Primary(CSI0)

Secondary(CSI1)

Configurationssupported

Two;1.5Gbpsperlane

2-laneMIPI_CSI0；supportsCMOSandCCDsensorsUpto8MPsensors

1-laneMIPI_CSI1；webcamsupport 5MP

I2Ccontrols

Videoapplicationsperformance

Encode:H.264BP/MP –HD(720p),30fpsMPEG-4SP/H.263P0–WVGA,30fpsVP8 –WVGA,30fps

Encode:H.264BP/MP/HP–1080p,30fpsMPEG-4SP/ASP–1080p,30fpsDivX4x/5x/6x–1080p,30fps

H.263P0 – WVGA,30fps

VP8 – 1080p,30fps(HEVC)H.265MP8bit–1080p,30fps

Graphics

Adreno™304;upto400MHz3Dgraphicsaccelerator

Audio

Codec

Low-poweraudio

Voicecodecsupport

Audiocodecsupport

Enhancedaudio

Synthesizer

IntegratedwithintheMSM8909device

Lowpoweraudioformp3andAACplayback;surroundsound

Versatile–manyaudioplayback&voicemodes;encodersforaudio;manyconcurrencymodes

G711;RawPCM;QCELP;EVRC,-B,-WB;AMR-NB,

-WB;GSM-EFR,-FR,-HR;

MP3;AAC+,eAAC;AMR-NB,-WB,G.711,WMA9/10Pro

DolbyDigitalPlusandDTS-HDsurroundFluence™NoiseCancellation；

6

QAudioFX/Qconcert/QEnsemble;128-voicepolyphonywavetable

Audioinputs

Upto3analogmicrophones,withintegratedMICbias

Audiooutputs

Fouroutputs: EarpieceMonoAB

Headphones StereoAB

800mWCLASS-D

Connectivity

BLSPports

UART

I2C

SPI(masteronly)

6,4at4-bitseach,2at2-bitseach;multiplexedserialinterfacefunctions

Yes–twoportsupto4Mbps

Yes–cameras,sensors,NFC,SMBcharger,etc.

Yes–cameras,sensors,etc.

USBinterface

OneUSB2.0high-speed

UIMinterface

Two–dualvoltage(1.8V/2.85V)

Securedigitalinterfaces

Uptotwoports,bothdual-voltage

One8-bitandone4-bit

SD3.0;SD/MMCcard;eMMCv4.5

Wirelessconnectivity

WLAN

Bluetooth

WithWCN3660B

WCN3660B:802.11a/b/g/n,2.4Gand5G

BT4.0LEandearlier

Touchscreensupport

CapacitivepanelsviaexternalIC(I2C,SPI,&interrupts)

TDB

1.3

Blockdiagram

Figure1-2

SIMT1500functionalblockdiagram

7

1.4

Termsandacronyms

Table1-2

Termsandacronyms

8

Term

Definition

ADC

Analog-to-digitalconverter

AGC

Automaticgaincontrol

AVS

Adaptivevoltagescaling

BER

Biterrorrate

BNSP

Barenanoscalepackaging

bps

Bitspersecond

BT

Bluetooth

CA

Carrieraggregation

CDMA

Codedivisionmultipleaccess

CRC

Cyclicredundancycode

CSI

Cameraserialinterface

CTP

Capacitivetouchpanel

DAC

Digital-to-analogconverter

DBHSPA

Dual-bandHSPA

DC-HSPA+

Dual-carrierHSPA+

DCUPA

Dual-carrierHSPA

DDR

Doubledatarate

DMB

Digitalmobilebroadcast

DRM

DigitalRightsManagement

DSI

Displayserialinterface

DSP

Digitalsignalprocessor

EBI

Externalbusinterface

EDGE

EnhanceddataratesforGSMevolution

EDR

Enhanceddatarate

ETB

Embeddedtracebuffer

QDSS

Embeddedtracemacrocell

EV-DO

Evolutiondataoptimized

FDD

Frequencydivisionduplex

GNSS

Globalnavigationsatellitesystem

GPIO

General-purposeinput/output

GPRS

Generalpacketradioservices

GPS

Globalpositioningsystem

GPU

Graphicsprocessingunit

GRFC

GenericRFcontroller

GSM

Globalsystemformobilecommunications

HDCP

High-bandwidthdigitalcontentprotection

HSDPA

High-speeddownlinkpacketaccess

HSIC

High-speedinter-chip

HSPA+

High-speedpacketaccess

Table1-2

Termsandacronyms(cont.)

9

Term

Definition

HSUPA

High-speeduplinkpacketaccess

I2C

Inter-integratedcircuit

I2S

Inter-ICsound

ISP

Imagesignalprocessing

JTAG

JointTestActionGroup(ANSI/ICEEEStd.1149.1-1990)

kbps

kilobitspersecond

LCD

Liquidcrystaldisplay

LPA

Low-poweraudio

LPASS

Low-poweraudiosubsystem

LPDDR

Low-powerDDR

LSB

DefineswhethertheLSBistheleastsignificantbitorleastsignificantbyte.AllinstancesofLSBusedinthismanualareassumedtobeLSByte,unlessotherwisespecified.

LTE

Longtermevolution

MBP

Mobilebroadcastplatform

MDM

Mobiledatamodem

MIPI

Mobileindustryprocessorinterface

MPM

Modempowermanagement

MSB

DefineswhethertheMSBisthemostsignificantbitormostsignificantbyte.AllinstancesofMSBusedinthismanualareassumedtobeMSByte,unlessotherwisespecified.

MTP

Modemtestplatform

NSP

Nanoscalepackage

PA

Poweramplifier

PCM

Pulse-codedmodulation

PI

Powerin

PDM

Pulse-densitymodulation

PM

Powermanagement

PNSP

Package-on-packagenanoscalepackage

PO

Powerout

PVS

Processvoltagescaling

RBDS

Radiobroadcastdatasystem

RDS

Radiodatasystem

RLP

Radiolinkprotocol

RPM

Resourcepowermanager

SBI

Serialbusinterface

SD

Securedigital

SDC

Securedigitalcontroller

SEE

SecureExecutionEnvironment

SFS

Securefilesystem

SIM

Subscriberidentitymodule

SMT

Surfacemounttechnology

SPI

Serialperipheralinterface

Table1-2

Termsandacronyms(cont.)

10

Term

Definition

SPMI

Systempowermanagementinterface

sps

Symbolspersecond(orsamplespersecond)

SPSS

Smartperipheralsubsystem

SSBI

Single-wireSBI

SVS

Staticvoltagescaling

TAP

Testaccessport

TBD

Tobediscussed

TCXO

Temperature-compensatedcrystaloscillator

TDD

Timedivisionduplexing

TSIF

Transportstreaminterface

UART

Universalasynchronousreceivertransmitter

UICC

Universalintegratedcircuitcard

UIM

Useridentitymodule

UMTS

Universalmobiletelecommunicationssystem

USB

Universalserialbus

USIM

UMTSsubscriberidentitymodule

WCDMA

Widebandcodedivisionmultipleaccess

WCN

Wirelessconnectivitynetwork

WLAN

Wirelesslocalareanetwork

WTR

Wafer-scaleRFtransceiver

XO

Crystaloscillator

ZIF

Zerointermediatefrequency

2

InterfaceDefinitions

2.1

Interfaceconfiguration

Figure2-1

Interfaceconfiguration

11

2.2

Pindefinitions

Table2-1

SIMT1500Pindefinitions

12

Pin#

Padname

Padcharacteristics

Functionaldescription

1

2

MAIN_ANT_OUT

GND

AO

GND

RFsignal

GND

3

SCAM_RST_N

GPIO_28

DO;B-PD:nppukp

Webcamera(frontcamera)reset

ConfigurableI/O

4

CAM_MCLK1

GPIO_27

DO;B-PD:nppukp

CameramasterclockConfigurableI/O

5

MIPI_CSI1_LN0_P

MIPI

AI,AO

MIPIcameraserialinterface1lane0–positive

6

MIPI_CSI1_LN0_N

AI,AO

MIPIcameraserialinterface1lane0–negative

7

MIPI_CSI1_CLK_P

AI

MIPIcameraserialinterface1clock–positive

8

MIPI_CSI1_CLK_N

AI

MIPIcameraserialinterface1clock–negative

9

MIC3_IN

Audio

AI

Microphone3input,single-ended

10

MIC2_IN

AI

Microphone2input,single-ended

11

HS_DET

DI

Headsetdetection

12

SPKR_DRV_M

AO

Speakerdriveroutput,minus

13

SPKR_DRV_P

AO

Speakerdriveroutput,plus

14

EARO_M

AO

Earpieceamplifieroutput,differentialminus

15

EARO_P

AO

Earpieceamplifieroutput,differentialplus

16

MIC_GND

17

MIC1_IN

AI

Microphone1input,single-ended

18

MIC_BIAS1

AO

Microphonebiasoutputvoltage

19

HPH_R

AO

Headphonerightoutput

20

HPH_REF

AI

Headphonedriveramplifiergroundreference

21

HPH_L

AO

Headphoneleftoutput

22

GPIO_14

GPIO_14

DO;B-PD:nppukp

ConfigurableI/O;,SPI,orI2C BLSP#4

23

GPIO_15

GPIO_15

DO;B-PD:nppukp

ConfigurableI/O:SPI,orI2C BLSP#4

13

Pin#

Padname

Padcharacteristics

Functionaldescription

24

GPIO_6/UART_CTS_N

GPIO_6

B-PD:nppukp

ConfigurableI/OUART,SPI,orI2CBLSP#1

25

GPIO_7/UART_RFR_N

GPIO_7

B-PD:nppukp

ConfigurableI/OUART,SPI,orI2CBLSP#1

26

GPIO_4/UART_TX

GPIO_4

B-PD:nppukp

ConfigurableI/OUART,SPI,BLSP#1

27

GPIO_5/UART_RX

GPIO_5

B-PD:nppukp

ConfigurableI/OUART,SPI,BLSP#1

28

GPIO_111/UART_CTS_N/SDA

GPIO_111

DOB-PD:nppukp

ConfigurableI/OUART,SPI,orI2CBLSP#2

29

GPIO_112/UART_CTS_N/SCL

GPIO_112

DOB-PD:nppukp

ConfigurableI/OUART,SPI,orI2CBLSP#2

30

RF_IN_2

-

B-PD:nppukp

5G_WIFI

31

WIFI_BT_RF

-

AO

RFsignal

32

GND

GND

GND

33

TS_IN_N

GPIO_13

DI;B-PD:nppukp

ConfigurableI/OTouchscreeninterrupt

34

TS_I2C_SDA

GPIO_18

B;B-PD:nppukp

ConfigurableI/OTouchscreenI2C

35

TS_I2C_SCL

GPIO_19

B;B-PD:nppukp

ConfigurableI/OTouchscreenI2C

36

TS_RST_N

GPIO_12

DO;B-PD:nppukp

ConfigurableI/OTouchscreenreset

37

SD_CARD_DETN

GPIO_38

B-PD:nppukp

ConfigurableI/OSecuredigitalcarddetection

38

UART_TX

GPIO_20

BD;OB-PD:nppukp

ConfigurableI/OUART,SPI,BLSP#2

39

UART_RX

GPIO_21

B;B-PD:nppukp

ConfigurableI/OUART,SPI,BLSP#2

40

KYPD_SNS0

GPIO_90

DI;B-PD:nppukp

Keypadsensebit0ConfigurableI/O

41

KYPD_SNS1

GPIO_91

DI;B-PD:nppukp

Keypadsensebit1ConfigurableI/O

42

KYPD_SNS2

GPIO_92

DI;B-PD:nppukp

Keypadsensebit2ConfigurableI/O

43

GND

-

-

-

44

USB_DM

USB

AI,AO

USBdata–minus

45

USB_DP

AI,AO

USBdata–plus

14

Pin#

Padname

Padcharacteristics

Functionaldescription

46

GND

-

GND

GND

47

Audio_PA_EN

GPIO_22

DI;B-PD:nppukp

ConfigurableI/O

48

GPIO_23

GPIO_23

DI;B-PD:nppukp

ConfigurableI/O

49

MI2S_WS

GPIO_0

DI;B-PD:nppukp

ConfigurableI/OMI2S2#;SPI

50

MI2S_SCK

GPIO_1

DI;B-PD:nppukp

ConfigurableI/OMI2S2#;SPI

51

MI2S_D0

GPIO_2

D0;B-PD:nppukp

ConfigurableI/OMI2S2#;SPI

52

MI2S_D1

GPIO_3

DI;B-PD:nppukp

ConfigurableI/OMI2S2#;SPI

53

ACCEL_INT1

GPIO_16

DI

B-PD:nppukp

ConfigurableI/OAccelerometerinterrupt1

54

SDC2_CMD

SD

BH-PD:nppukp

Securedigitalcontroller2command

55

SDC2_DATA_0

BH-PD:nppukp

Securedigitalcontroller2databit0

56

SDC2_DATA_1

BH-PD:nppukp

Securedigitalcontroller2databit1

57

SDC2_DATA_2

BH-PD:nppukp

Securedigitalcontroller2databit2

58

SDC2_DATA_3

BH-PD:nppukp

Securedigitalcontroller2databit3

59

SDC2_CLK

BH-NP:pdpukp

Securedigitalcontroller2clock

60

GPIO_98

GPIO_98

B-PD:nppukp

ConfigurableI/O

61

VREG_L11_SDC

POWER

PO

PMICoutput2.95V

62

GND

-

-

63

GPIO_29

GPIO_29

B-PD:nppukp

ConfigurableI/O

64

GPIO_30

GPIO_30

B-PD:nppukp

ConfigurableI/O

65

UIM2_PRESENT

GPIO_52

DI,B-PD:nppukp

ConfigurableI/O

UIM2removaldetection

66

UIM2_DATA

GPIO_49

B,B-PD:nppukp

ConfigurableI/OUIM2data

67

UIM2_CLK

GPIO_50

DO,B-PD:nppukp

ConfigurableI/OUIM2clock

68

UIM2_RST

GPIO_51

DO,B-PD:nppukp

ConfigurableI/OUIM2reset

69

UIM1_DATA

GPIO_53

B,B-PD:nppukp

ConfigurableI/OUIM1data

70

UIM1_CLK

GPIO_54

DO,B-PD:nppukp

ConfigurableI/OUIM1clock

15

Pin#

Padname

Padcharacteristics

Functionaldescription

71

UIM1_RST

GPIO_55

DO,B-PD:nppukp

ConfigurableI/OUIM1reset

72

UIM1_PRESENT

GPIO_56

DI,B-PD:nppukp

ConfigurableI/O

UIM2removaldetection

73

GND

-

GND

GND

74

75

VREG_L14

VREG_L15

UIM1POWERUIM2POWER

PO

PO

PMICsupplyforUIM1

PMICsupplyforUIM2

76

77

78

PWR_ON

PM_VIB_DRV_N

PMUCTR

-

DI

PI

Poweronkey

Vibrationmotordriveroutputcontrol

USB_HS_ID

USB

AI

USBHSID

79

PMU_MPP_2_PWM

PMUCTR

AO-Z;AO

ConfigurableMPP;HomerowLEDcurrentsink

80

GND

GND

GND

81

PMU_GPIO01

PMUCTR

DO-Z;DI

ConfigurableGPIO;RFclock1enable

82

PM_RESIN_N

PMUCTR

DI

PMICreset

83

PMU_GPIO02

PMUCTR

DO-Z;DI

ConfigurableGPIO;RFclock2enable

84

VREF_BAT_THERM

POWER

AO

Referencevoltageforbatterythermistor

andbatteryIDnetworks

85

VREG_L12

POWER

PO

PMUsupply2.95V

86

GPIO_24

GPIO_24

B-PD:nppukp

ConfigurableI/O

87

VBUS_USB

POWER

PI

USBVoltage

88

VBAT

POWER

PI,PO

Battery

89

VCOIN

POWER

PI

RTC

90

BAT_THERM

-

DI

Batterythermmonitor

91

GND

-

GND

GND

92

VBAT/VPH

POWER

SYSPower

93

DIV_ANT_IN

-

AI

RFsignal

94

GPS_IN

-

AI

RFsignal

95

GND

-

-

96

MIPI_DSI_CLK_P

MIPI

AO

MIPIdisplayserialinterface0clock–positive

16

Pin#

Padname

Padcharacteristics

Functionaldescription

97

MIPI_DSI_CLK_N

MIPI

AO

MIPIdisplayserialinterface0clock–negative

98

MIPI_DSI_LN3_P

AI,AO

MIPIdisplayserialinterface0lane3–positive

99

MIPI_DSI_LN3_N

AI,AO

MIPIdisplayserialinterface0lane3–negative

100

MIPI_DSI_LN2_P

AI,AO

MIPIdisplayserialinterface0lane2–positive

101

MIPI_DSI_LN2_N

AI,AO

MIPIdisplayserialinterface0lane2–negative

102

MIPI_DSI_LN1_P

AI,AO

MIPIdisplayserialinterface0lane1–positive

103

MIPI_DSI_LN1_N

AI,AO

MIPIdisplayserialinterface0lane1–negative

104

MIPI_DSI_LN0_P

AI,AO

MIPIdisplayserialinterface0lane0–positive

105

MIPI_DSI_LN0_N

AI,AO

MIPIdisplayserialinterface0lane0–negative

106

GPIO_8

GPIO_8

B-PD:nppukp

ConfigurableI/O

107

VREG_L17

POWER

OUPUT

PMUSupply2.85V

108

GPIO_9

GPIO_9

B-PD:nppukp

General-purposewakeup

109

VREG_L6

POWER

OUPUT

PMU Supply1.8V

110

CCI_I2C_SDA

GPIO_10

B

CameraI2C,SDA

111

CCI_I2C_SCL

GPIO_11

B

CameraI2C,SCL

112

CAM1_RST_N

GPIO_35

DO;B-PD:nppukp

Camera1(rearcamera)reset;

ConfigurableI/O

113

CAM1_STANDBY_N

GPIO_34

DO;B-PD:nppukp

Camera1(rearcamera)standby

ConfigurableI/O

114

GND

-

GND

GND

115

MIPI_CSI0_LN1_N

MIPI

AI,AO

MIPIcameraserialinterface0lane1–negative

Table2-2

SIMT1500BTBconnectorpindefinitions

17

Pin#

Padname

Padcharacteristics

Functionaldescription

1

GND

-

GND

GND

2

GPIO_25

GPIO_25

B-PD:nppukp

ConfigurableI/O,

#DSI_RST#,MDP_VSYNC_S

3

-

-

-

-

4

-

-

-

-

5

GPIO_31

GPIO_31

B-PD:nppukp

ConfigurableI/O,CCI_TIMER0,GP_CLK0

6

GPIO_32

GPIO_32

B-PD:nppukp

ConfigurableI/O,CCI_TIMER1,GP_CLK1orI2C

7

GPIO_36

GPIO_36

B-PD:nppukp

ConfigurableI/O,

8

GPIO_58

GPIO_58

B-PD:nppukp

ConfigurableI/O,#SMB_INT#

9

GPIO_93

GPIO_93

BB-PD:nppukp

ConfigurableI/O

10

GPIO_94

GPIO_94

BB-PD:nppukp

ConfigurableI/O,#ALSP_INT#,MI2S_1_SCK_B

Pin#

Padname

Padcharacteristics

Functionaldescription

116

MIPI_CSI0_LN1_P

MIPI

AI,AO

MIPIcameraserialinterface0lane1–positive

117

MIPI_CSI0_LN2_P

AI,AO

MIPIcameraserialinterface0lane2–positive

118

MIPI_CSI0_LN2_N

AI,AO

MIPIcameraserialinterface0lane2–negative

119

120

MIPI_CSI0_CLK_N

MIPI_CSI0_CLK_P

AI

AI

MIPIcameraserialinterface0CLK–negative

MIPIcameraserialinterface0CLK–positive

121

GPIO_33

GPIO_33

DIB-PD:nppukp

Webcamera(frontcamera)reset

122

123

CAM_MCLKGND

GPIO_26

DOB-PD:nppukp

Cameramasterclock0

GND

GND

124

VBAT/VPH

POWER

SYSPower

Table2-2

SIMT1500BTBpindefinitions(cont.)

18

Pin#

Padname

Padcharacteristics

Functionaldescription

11

GPIO_95

GPIO_95

BB-PD:nppukp

ConfigurableI/O,BLSP3_SPI_CS1_N

12

GPIO_96

GPIO_96

BB-PD:nppukp

ConfigurableI/O,#GYRO_ACCEL_INT_N#,MI2S_1_D1_B,GP_MN

13

GPIO_97

GPIO_97

B-PD:nppukp

ConfigurableI/O,#HDSET_DET#,BLSP1_SPI_CS1_N

14

GPIO_110

GPIO_110

B-PD:nppukp

ConfigurableI/O,MI2S_1_WS_B

15

GPIO_65

GPIO_65

B-PD:nppukp

ConfigurableI/O,#MAG_INT#,BLSP3_SPI_CS2_N,BLSP1_SPI_CS3_N

16

GND

-

GND

GND

17

GND

-

GND

GND

18

GND

-

GND

GND

19

GND

-

GND

GND

20

GND

-

GND

GND

21

GND

-

GND

GND

22

GND

-

GND

GND

23

GND

-

GND

GND

24

GND

-

GND

GND

25

GND

-

GND

GND

26

GND

-

GND

GND

27

GND

-

GND

GND

28

GND

-

GND

GND

29

GND

-

GND

GND

30

GND

-

GND

GND

3ElectricalSpecifications

(TBD)

19

4ApplicationInterfaceSpecifications

4.1Powerinterface

ThepowersupplyofSIMT1500comesfromPM8110.SeeTable4-1

Table4-1

Powersourcedescription

VBATmeansbattery,VPHmeansSYSPower.IfyouusetheSIMT1500’sinternalchargingmanagement,theyarethesamefunctionandtheymustbeconnectedtogether.Ifyouuseexternalchargingmanagement,PIN88isBatteryonlyandPIN92/124isVPHonly.YoucanseeitinSIMT1500_HW_compatibilitydesignofthemodification.pdfdocument.

4.2PMICGPIOandMPPinterface

SIMT1500havetwoPMICGPIOinterfaceandonePMICMultipurposeinterface.SeeTable4-2.

Table4-2

PMICGPIOandMPPinterfacedescription

TwoGPIOsareavailable.SomelikelyGPIOapplications,whicharedescribedelsewhere:clockoutputs;externalcurrentdrivercontrol;externalLDO,SMPS,orpowergatecontrols;statusbit;XOcontrollerinput;andleveltranslator.

OneMPPareavailable.MPPcanbeconfiguredasPWM,andMPPcanbeconfiguredasanalogoutputbuffers.

20

GPIO/MPP

Pin#

Functions

PMU_GPIO01

81

RFCLK1_EN

PMU_GPIO02

83

RFCLK2_EN

PMU_MPP_2_PWM

79

PWMoutput

Signal

Pin#

Direction

Functions

PI/PO

VBAT

88

PI

Battery

VBAT/VPH

92

PI/PO

SYSPower

VBAT/VPH

124

PI/PO

SYSPower

Signal

Pin#

Direction

Voltage(V)

Current(mA)

PI/PO

Min

Typ

Max

Min

Typ

Max

VREG_L11_2P95V

61

PO

TBD

2.95

TBD

TBD

600

TBD

VREG_L14_UIM1

74

PO

TBD

1.8/2.85

TBD

TBD

55

TBD

VREG_L15_UIM2

75

PO

TBD

1.8/2.85

TBD

TBD

55

TBD

VREG_L12_2P95V

85

PO

TBD

1.8/2.95

TBD

TBD

50

TBD

VREG_L17_2P85V

107

PO

TBD

2.85

TBD

TBD

420

TBD

VREG_L6_1P8V

109

PO

TBD

1.8

TBD

TBD

200

TBD

4.3UIMsinterface

ThereareTWOUIMinterfacesonSIMT1500.TheUIMprovidestherequiredsubscriptionverificationinformationtoallowtheequipmenttoattachtonetwork.

SeeTable4-3andFigure4-1formoredetails.

Dataratesupto4MHz(inFastmode+)

Dual-voltage1.8or2.85Vsupport

Table4-3

UIMsinterfacedescription

Figure4-1

UIMapplicationdiagram

21

Signal

Pin#

Description

Direction

Voltage(V)

I/O

1.8

2.85

VREG_L14_UIM1

74

VariablesupplyvoltageforexternalUIM/SIM

O

1.8

2.85

VREG_L15_UIM2

75

VariablesupplyvoltageforexternalUIM/SIM

O

1.8

2.85

UIM1_PRESENT

72

ExternalUIM/SIMremovaldetectionsignal

O

TBD

TBD

UIM1_RESET

71

ExternalUIM/SIMresetsignal

O

1.8

2.85

UIM1_CLK

70

ExternalUIM/SIMclocksignal

O

1.8

2.85

UIM1_DATA

69

ExternalUIM/SIMdatasignal

I/O

1.8

2.85

UIM2_PRESENT

65

ExternalUIM/SIMremovaldetectionsignal

O

TBD

TBD

UIM2_RESET

68

ExternalUIM/SIMresetsignal

O

1.8

2.85

UIM2_CLK

67

ExternalUIM/SIMclocksignal

O

1.8

2.85

UIM2_DATA

66

ExternalUIM/SIMdatasignal

I/O

1.8

2.85

4.4

USBinterface

SIMT1500containsaUSBinterface.ItiscompliantwiththeUSB2.0specification.TheUSB2.0specificationrequireshoststosupportallthreeUSBspeeds,low-speed(1.5Mbps),full-speed(12Mbps)andhigh-speed(480Mbps).

SeeTable4-4andFigure4-2formoredetails.

Table4-4

USBinterfacedescription

Figure4-2

USBapplicationdiagram

4.5Audiointerface

CodecintegratedwithinPMU

NoSLIMBUS

Nodigitalmicsupport

Audioinputs:Uptothreeanalogmicphones,withintegratedmicbias;

Audiooutput:Headphoneswithheadsetdetection;Differentialearpiece;speakerdriver;Single-endedlineoutput

SeeTable4-5andFigure4-3formoredetails.

Differentialloud

22

Signal

Pin#

Description

Direction

USB_DM

44

USB2.0serialdataminus

AI/AO

USB_DP

45

USB2.0serialdataplus

AI/AO

USB_HD_ID

78

USBHSID

AI

VBUS_USBIN

87

USB_IN

POWER

Table4-5

Audiointerfacedescription

Figure4-3

Audioapplicationdiagram

4.6Camerainterface

SIMT1500containstwocamerainterface.Primarycamerainterfaceuse2-laneMIPI_CSI0,supportsCMOSandCCDsensors,upto8MPsensors.Secondarycamerainterfaceuse1-laneMIPI_CSI1,and1.5Gbpsperlane.BotharecontrolledbyI2Cbus.

SeeTable4-6andFigure4-4formoredetails.

Table4-6

Camerainterfacedescription

23

Signal

Pin#

Description

Direction

AI/AO

SCAM_RST_N

3

Camera0(frontcamera)reset

DO

SCAM_MCLK1

4

Camera0masterclock1

DO

MIPI_CSI1_LN0_P

5

MIPIcameraserialinterface1lane0–positive

AI,AO

MIPI_CSI1_LN0_N

6

MIPIcameraserialinterface1lane0–negative

AI,AO

MIPI_CSI1_CLK_P

7

MIPIcameraserialinterface1clock–positive

AI

Signal

Pin#

Description

Direction

AI/AO

MIC3_IN

9

Microphone3input,single-ended

AI

MIC2_IN

10

Microphone2input,single-ended

AI

HS_DET

11

Headsetdetection

DI

SPKR_DRV_M

12

Speakerdriveroutput,minus

AO

SPKR_DRV_P

13

Speakerdriveroutput,plus

AO

EARO_M

14

Earpieceamplifieroutput,differentialminus

AO

EARO_P

15

Earpieceamplifieroutput,differentialplus

AO

MIC_GND

16

GND

GND

MIC1_IN

17

Microphone1input,single-ended

AI

MIC_BIAS

18

Microphonebiasoutputvoltage

AO

HPH_R

19

Headphonerightoutput

AO

HPH_REF

20

Headphonedriveramplifiergroundreference

AI

HPH_L

21

Headphoneleftoutput

AO

Figure4-4

CSIapplicationdiagram

Normally,cameraneed2.85Vand1.8Vvoltage,wecanuseexternalLDOtoreplaceVREG_L6_1P8andVERG_L17_2P85.Atthesametime,iftherearcamerahaveAFfunction,anotherexternalLDOisnecessary.

24

MIPI_CSI1_CLK_N

8

MIPIcameraserialinterface1clock–negative

AI

CAM_PWDN

121

Camera0PWDN

DO

CAM_I2C_SDA

63

CameraI2C,SDA

B

CAM_I2C_SCL

64

CameraI2C,SCL

B

CAM1_RST_N

112

Camera1(rearcamera)reset

DO

CAM1_STANDBY_N

113

Camera1(rearcamera)standby

DO

MIPI_CSI0_LN1_N

115

MIPIcameraserialinterface0clock–negative

AI,AO

MIPI_CSI0_LN1_P

116

MIPIcameraserialinterface0clock–positive

AI,AO

MIPI_CSI0_LN2_P

117

MIPIcameraserialinterface0lane2–positive

AI,AO

MIPI_CSI0_LN2_N

118

MIPIcameraserialinterface0lane2–negative

AI,AO

MIPI_CSI0_CLK_N

119

MIPIcameraserialinterface0clock–negative

AI

MIPI_CSI0_CLK_P

120

MIPIcameraserialinterface0clock–positive

AI

CAM_MCLK0

122

Camera1masterclock0

DO

4.7Displayinterface

SIMT1500containsonedisplayinterface.TheinterfaceuseMIPIdisplayserialinterface,supportuptofourlanes.SupportfortheresolutionofWVGA,qHDand720pLCM..

ThebacklightcircuitisnotcontainedinSIMT1500,whichmustbedesignedinexternalcircuit.SeeTable4-7andFigure4-5formoredetails.

Table4-7

Displayinterfacedescription

Figure4-5Displayapplicationdiagram

4.8CTPinterface

25

Signal

Pin#

Description

Direction

AI/AO

DSI_LCD_TE0

86

LCDdatawritesyncsignal

DO

PMU_MPP3_WM

95

PWM

DO

MIPI_DSI_CLK_P

96

MIPIdisplayserialinterface0clock–positive

AO

MIPI_DSI_CLK_N

97

MIPIdisplayserialinterface0clock–negative

AO

MIPI_DSI_LN3_P

98

MIPIdisplayserialinterface0lane3–positive

AI,AO

MIPI_DSI_LN3_N

99

MIPIdisplayserialinterface0lane3–negative

AI,AO

MIPI_DSI_LN2_P

100

MIPIdisplayserialinterface0lane2–positive

AI,AO

MIPI_DSI_LN2_N

101

MIPIdisplayserialinterface0lane2–negative

AI,AO

MIPI_DSI_LN1_P

102

MIPIdisplayserialinterface0lane1–positive

AI,AO

MIPI_DSI_LN1_N

103

MIPIdisplayserialinterface0lane1–negative

AI,AO

MIPI_DSI_LN0_P

104

MIPIdisplayserialinterface0lane0–positive

AI,AO

MIPI_DSI_LN0_N

105

MIPIdisplayserialinterface0lane0–negative

AI,AO

LCD_ID

106

LCDIDpin

B-PD:nppukp

DSI_RST_N

108

General-purposewakeup

B-PD:nppukp

SIMT1500containsoneCTPinterface,thepaneliscontrolledbyI2Cbus.SeeTable4-8andFigure4-6formoredetails.

Table4-8CTPinterfacedescription

Figure4-6CTPapplicationdiagram

4.9SDinterface

SIMT1500containsaSDinterface,theclockoutputupto200MHz,needsupport1.8/2.95Vdual-voltage.IfSDconnectorhavedetectpin,thehotplugfunctioncanbedone.

SeeTable4-9andFigure4-7formoredetails.

Table4-9

CTPinterfacedescription

26

Signal

Pin#

Description

Direction

AI/AO

SD_CARD_DETN

37

Securedigitalcarddetection

DI

SDC2_CMD

54

Securedigitalcontroller2command

AI,AO

SDC2_DATA_0

55

Securedigitalcontroller2databit0

AI,AO

SDC2_DATA_1

56

Securedigitalcontroller2databit1

AI,AO

SDC2_DATA_2

57

Securedigitalcontroller2databit2

AI,AO

SDC2_DATA_3

58

Securedigitalcontroller2databit3

AI,AO

SDC2_CLK

59

Securedigitalcontroller2clock

AI,AO

Signal

Pin#

Description

Direction

AI/AO

TS_INT_N

33

Touchscreeninterrupt

DI

TS_I2C_SDA

34

TouchscreenI2C,SDA

B

TS_I2C_SCL

35

TouchscreenI2C,SCL

B

TS_RST_N

36

Touchscreenreset

DO

Figure4-6

SDinterfaceapplicationdiagram

4.10Sensorsinterface

SIMT1500supportmanysensorsviaI2Cbus,thecircuitstructureissimilartocamerainterface.SIMT1500doesnotcontainnecessarypull_upresistorsinternal,whichmustbedesignedinexternalcircuit.

4.11Sidekeysinterface

SIMT1500containsafewkeysinterfaces,whichcanbeusedasfunctionalsidekeys.KYPD_SNS0,KYPD_SNS1andKYPD_SNS2cancomposematrixkeyboard,alsocanbeusedasnormalconfigurableGPIO.

SeeTable4-11formoredetails.

Table4-11

Sidekeysinterfacedescription

4.12Batteryconnectorinterface

SIMT1500mustbeprovidedvoltagebyexternalvoltagesource.SeeTable4-12formoredetails.

Table4-12

Batteryconnectordescription

27

Signal

Pin#

Description

Direction

DI/DO

KYPD_SNS0

40

Keypadsensebit0

DI

KYPD_SNS1

41

Keypadsensebit1

DI

KYPD_SNS2

42

Keypadsensebit2

DI

PM_KYPD_PWR_N

76

Poweronkey

DI

PM_RESIN_N

82

PMICresetinput

DI

4.13

I2C,UARTandSPIinterface

4.13.1UART

SIMT1500containstwogroupsUART_DM.TheUART_DMisusedtosupporthigh-speedUARToperationupto4Mbpsfordebugandsystemlog.UARTonlysupportsSlow_IrDA.

SeeTable4-13andFigure4-7formoredetails:

Table4-13

UARTinterfacedescription

Figure4-7

UARTapplicationdiagram

4.13.2

I2C

SIMT1500containstwogroupsspecialfunctionalandfourgroupsconfigurableI2C,whichmultiplexedwithUARTfunction.I2CpinsuseGPIOsconfigured