雨课堂在线学堂《数字集成电路分析与设计》作业单元考核答案

IntroductionandImplementationStrategiesforDigitalIC1/5单选题(1分)What’sthecorrectorderoftheabstractionlevels?)Architecture=>System=>RegisterTransfer=>Gate=>TransistorDevice)System=>Architecture=>RegisterTransfer=>Gate=>TransistorDevice)System=>Architecture=>Gate=>RegisterTransfer=>TransistorDevice)Architecture=>System=>Gate=>RegisterTransfer=>TransistorDevice答案：B2/5单选题(1分)What’sthecorrectorderofthefollowingarchitecturesintermsoftheflexibility?)Hardwiredcustom>Configurable/Parameterizable>Domain-specificprocessor>Embeddedprocessor)Configurable/Parameterizable>Hardwiredcustom>Domain-specificprocessor>Embeddedprocessor)Embeddedprocessor>Hardwiredcustom>Configurable/Parameterizable>Domain-specificprocessor)Embeddedprocessor>Domain-specificprocessor>Configurable/Parameterizable>Hardwiredcustom答案：D3/5多选题(2分)What’stheadvantageofthefullcustomdesignamongthefollowings?(markoutallcorrectanswers))Maximumspeed)Minimumdiearea)Time-saving)Money-saving)Minimumpowerdissipation答案：ABE4/5单选题(1分)Toberegenerative,thegainofthetransientregionshouldbesmallerthan1inabsolutevalue.)True)False答案：B5/5单选题(1分)Duringthechargingtransactioninthefollowingfigure,onlyhalfoftheenergydrawnfromthepowersupplyisstoredinthecapacitor.)True)False答案：ATheDevices1/7单选题(1分)Considerthefollowingabruptjunctiondiode(m=0.5):Cj0=3x10^-3(F/(m^2)),AD=1μm^2,andФ0=0.64V.Ifweapplyareversebiasof-2.5V,what’sthevalueofthetotaljunctioncapacitance?(selectthenearestvalue))1fF)1.15fF)1.35fF)1.5fF答案：C2/7单选题(1分)IfVDSATlessthanVDS,andVDSlessthanVGS-VT,whichregiondoestheNMOStransistorworkin?)Cutoff)Velocitysaturation)Traditionalsaturation)Resistiveorlinear答案：B3/7单选题(1分)IfVDSlessthanVDSAT,andVDSATlessthanVGS-VT,whichregiondoestheNMOStransistorworkin?)Cutoff)Velocitysaturation)Traditionalsaturation)Resistiveorlinear答案：D4/7单选题(1分)What’sthevalueofthechannelcapacitancebetweenthegateandsourceofaMOStransistorworkinginsaturationregion?)COXWL)COXWL/2)(2/3)COXWL)0答案：C5/7单选题(1分)ForashortchannelMOStransistor,theraisingoftheVDSincreasesthewidthofthedrain-junctiondepletionregion,thresholdvoltageincreasesconsequently.)True)False答案：B6/7单选题(1分)Generallyspeaking,theMOSintrinsiccapacitanceincludesMOSstructurecapacitance,channelcapacitanceandjunctioncapacitance.)True)False答案：A7/7单选题(1分)Undersubthresholdconduction,thecurrentIDhasanexponentialrelationwithVGS.)True)False答案：ATheCMOSInverterI1/3多选题(2分)WhichoneinthefollowingisthepropertyofCMOSinverter?(markoutallthecorrectanswers))Extremelyhighinputresistance)Highoutputresistance)Ratiologic)Highnoisemargins)Consumingnostaticpower(ignoringleakagecurrent)答案：ADE2/3单选题(1分)IncreasingthewidthofNMOSmovesVMtowardVDD.)True)False答案：B3/3多选题(2分)ObservethefollowingVTCplotcarefullyandmarkoutallthecorrectjudgements.)VTCisverysensitivetothedevicevariations)VariationsinthedevicesizesonlyhaveaminorimpactontheswitchingthresholdVM)StaticCMOSgatecanfunctioncorrectlyoverawiderangeofconditions答案：BCTheCMOSInverterII1/4多选题(2分)WhichtechniqueinthefollowingcanbeusedtooptimizethepropagationdelayofCMOSinverter?(markoutallthecorrectanswers))ReduceCL)ReducetheW/Lratioofthetransistor)IncreaseVDD)ReduceVDD答案：AC2/4单选题(1分)Theintrinsicdelayoftheinverterisdependentofthesizingofthegate.)True)False答案：B3/4单选题(1分)Keepingtheinputtransitiontimeofthegatelessthanitspropagationdelayisdefinitelybeneficialtoperformanceincreaseaswellaspowerreduction.)True)False答案：A4/4单选题(1分)Duringeachswitchingcycle,theenergydissipationhasnodependenceontheresistanceofthedevice.)True)False答案：ACombinationalLogicCircuitsI1/5单选题(1分)ComplementarylogicgateisacombinationofaPUNandaPDN.)True)False答案：A2/5单选题(1分)Markoutallthecorrectstatementsbelow.)SeriesNMOStransistorsimplement“OR”function)ParallelPMOStransistorsimplement“NAND”function)ParallelNMOStransistorsimplement“NOR”function)SeriesPMOStransistorsimplement“AND”function答案：B3/5单选题(1分)What’sthefunctionimplementedinFig.1?F̅=D∙A+B∙CF̅=D+A+B∙CF̅=(D+A)∙B∙CF̅=D+A∙(B+C)答案：D4/5单选题(1分)What’sthefunctionimplementedintheFig.2?Y̅=A+B∙C∙DY̅=(A+B)∙C∙DY̅=(A+B)∙C+DY̅=A∙C+B∙D答案：B5/5单选题(1分)LogiceffortrepresentstheratiooftheinputCap.(drivenbythesameinputsignal)ofaminimum-sizedcomplexgateovertheminimum-sizedinverter.)True)False答案：ACombinationalLogicCircuitsII1/8多选题(2分)MarkoutallthecorrectstatementsaboutthebasicpropertiesofPseudoNMOS.)IthasN+2transistors)VOL=0)Increaseextrastaticpowerdissipation)Decreasenoisemargin答案：CD2/8多选题(2分)MarkoutallthecorrectstatementsabouttheDCVSL.)Twopull-downnetworksarecommentaryandmutuallyexclusive)Consumingstaticpower)FunctionsareimplementedonlybyNMOSdevices)ItsperformanceisbetterthanstaticCMOSlogic答案：AC3/8单选题(1分)ThetpLHofoutputdecreaseswhenusingalevelrestoringtransistorforthepass-transistorlogic.)True)False答案：B4/8单选题(1分)What’sthefunctionimplementedinFig.1?F=A∙B+A̅∙B̅F=A∙B̅+A̅∙BF=A+A̅∙B̅F=A∙B+B̅答案：B5/8单选题(1分)Dynamiccircuitsconsumesnostaticpower(ignoringleakage).)True)False答案：A6/8多选题(2分)MarkoutallthecorrectstatementsaboutthedynamicCMOS)Reducedloadcapacitanceduetolowerinputcapacitance(Cin))Reducedloadcapacitanceduetosmalleroutputloading(Cout))Noglitching)Highertransitionprobabilities答案：ABCD7/8单选题(1分)OnlyinvertinglogiccanbeimplementedwithDominoLogic.)True)False答案：B8/8单选题(1分)Only1->0transitionsareallowedatinputsofPUN.)True)False答案：ASequentialLogicCircuitsI1/3多选题(2分)Markoutallthecorrectstatementsaboutthestaticmemory.)Notsensitivetodisturbance)Capacitorshavetoberefreshedperiodicallytocompensatethechargeleakage)Fasterandconsuminglessarea)Statecanbepreservedaslongasthepoweristurnedon答案：AD2/3单选题(1分)Tcdregmeansthepropagationdelayinthebestcase.)True)False答案：A3/3单选题(1分)Themasterlatchofthenegativeedge-triggeredregisteris?)Negativelatch)Positivelatch答案：BSequentialLogicCircuitsII1/5多选题(2分)Markoutallthecorrectstatementsaboutthedynamiclatch.)It’ssimplerthanthestaticlatch)Storagebasedon“capacitor”needstoberefreshed)Itsfloatingnodeisverysensitivetonoiseanddisturbance)Somelow-powerdesigntechniquesarehardtobeadoptedbecauseoftheleakagecurrent答案：ABCD2/5单选题(1分)Addingaweekfeedbackinvertertoadynamiclatchcanimprovethenoiseimmunity.)True)False答案：A3/5单选题(1分)AsshowninFig.1,“D”mustbestableduring0-0clockoverlap.)True)False答案：B4/5单选题(1分)AsforC2MOS,clockoverlapcouldactivatePDNorPUNofalatchbutneverboth.)True)False答案：A5/5多选题(2分)Markoutallthecorrectstatementsabouttruesinglephaseclockedregister.)Ithasonlyoneclockphase)Ithasnooverlapbyconstruction)Itneedseasierclockdistribution)Itconsumeslesstransistors答案：ABCDesigningArithmeticBuildingBlocksI1/5多选题(2分)Whichoneinthefollowingispartofagenericdigitalprocessor?(Markoutallthecorrectitems))Datapath)Memory)Controlunit)I/O答案：ABCD2/5单选题(1分)Whichoneinthefollowingbelongstoarithmeticunit?(Markoutallthecorrectitems))RAM)Arbiters)Shifter)Finitestatemachine答案：C3/5单选题(1分)Whichoneinthefollowingisthecorrectexpressionfor“carrydelete”?)D=A∙B)D=A̅∙B̅)D=A̅∙B)D=A∙B̅答案：B4/5单选题(1分)ForanN-bitripple-carryadder,it’sfarmoreimportanttooptimizetcarrythantsum.)True)False答案：A5/5单选题(1分)Mirroradderhasasimilarvalueforsumandcarrydelays.)True)False答案：BDesigningArithmeticBuildingBlocksII1/2单选题(1分)It’simportanttooptimizetheSUMandCARRYdelayswithsimilarvalueforaRCAbasedmultiplier.)True)False答案：A2/2单选题(1分)Theareaoflogarithmicshifterisdominatedbywiringwhilethatofbarrelshifterisdominatedbylogic.)True)False答案：BTheWire1/4单选题(1分)Silicidecanbeusedtoreducethesheetresistanceofpolysilicon.)True)False答案：A2/4多选题(2分)Markoutallthecorrectstatementsaboutthedistributedrcline.)Delayofawireinthedistributedrclineisaquadraticfunctionofitslength)DelayofthedistributedrclineisonehalfofthedelaythatwouldhavebeenpredictedbythelumpedRCmodel)rcdelaysshouldonlybeconsideredwhentp,rc>>tp,gateofthedrivinggate)rcdelaysshouldonlybeconsideredwhentherise(fall)timeatthelineinputissmallerthanRC,RandCarelumpedresistanceandcapacitanceofthewirerespectively答案：ABCD3/4多选题(2分)Markoutallthecorrectstatement