NAND-Flash-Roadmap-2014幻灯片

1、Technology Roadmap for NAND Flash Memory,April 2014,C,1,Introduction,NAND Flash is a rapidly changing technology and market. It promises to be very interesting as the process node approaches 10 nm. At this point, physical constraints will begin to limit the performance of the basic memory cell desig

2、n. As a result, looking more than two years into the future becomes a purely speculative exercise and we limit our projections to 2016. Contact us for more information: 1-613-599-6500,C,2,ITRS Technology Roadmap,Source: ITRS,Content for re-use only with TechInsights permission.,3,Content for re-use

3、only with TechInsights permission.,NAND Annual Technology Roadmaps,C,4,NAND Technology Quarterly Forecast,C,5,2013 NAND Production,Source: ,C,6,Micron Memory Roadmap,Source: ,C,7,Micron 16 nm MLC NAND,Source: Source: ,Our 16 nm NAND technology enables the industrys smallest 128Gb MLC Flash memory de

4、vice. The 16 nm node is not only the leading Flash process, but it is also the most advanced processing node for any sampling semiconductor device.,Micron plans to make the transition from 2D NAND flash to 3D NAND flash when its more cost effective. Because Micron already has a good scaling path for

5、 2D NAND flash, it needs to add a lot of layers to 3D NAND flash before it makes economic sense to change over, so it is pursuing both formats in parallel.,C,8,Micron 3D NAND Cell,Source: Akira Goda “Opportunities and Challenges of 3D NAND Scaling” International Symposium VLSI Technology, Systems, a

6、nd Applications (VLSI-TSA), 2013,Micron customers wont have to wait long for 3D flash memory CEO Mark Durcan tells CNET that the company will start providing samples of the advanced memory technology to customers in the first quarter of 2014.,Source: ,C,9,Samsung NAND Flash Roadmap,Source: ,C,10,Sam

7、sung 3D V-NAND,Source: ,Samsungs three-dimensional V-NAND (Vertical NAND) flash memory is fabricated using an innovative vertical interconnect process technology to link the 24-layer 3D cell array based on Samsungs 3D Charge Trap Flash (CTF) structure.,In Samsungs CTF-based NAND flash architecture,

8、first developed in 2006, an electric charge is temporarily placed in a holding chamber of a non-conductive layer of flash composed of silicon nitride (SiN), instead of using a floating gate, to mitigate interference between neighbouring cells. By making this CTF layer three-dimensional, the reliabil

9、ity and processing speed of our V-NAND has been significantly improved. Furthermore, by applying both of these technologies, Samsungs 3D V-NAND is able to provide over twice the scaling of 20 nm-class planar NAND flash.,C,11,Samsung 3D V-NAND,Source: ,C,12,Samsung 3D V-NAND,Source: Ki-Tae Park et al

10、. “Three-Dimensional 128Gb MLC Veritical NAND Flash-Memory with 24-WL Stacked Layers and 50MB/s High-Speed ProgrammingSolid-State Circuits Conference Digest of Technical Papers (ISSCC) 2014 pp334-335,C,13,Sandisk NAND Memory Roadmap,Source: ,C,14,”One of our goals is to extend the life of 2D NAND te

11、chnologies as far as possible because it reflects the huge investment that we have made in fabs and the technology, over the number of years,” said Shrivastava. “Of course, 3D NAND is extremely important and when it becomes cost-effective then it will move into production.” Sandisk plans to start pr

12、oducing its 3D NAND chips in 2016. “We are travelling in what we think is the lowest cost path in every technology generation, going from 19 nm to 1Y where we at the limit with lithography, and then we will scale to 1Z, which is our next-generation 2D NAND technology. We believe that this scaling pa

13、th gives us the lowest cost structure in each of the nodes and in terms of cumulative investment.”,Sandisk 2D NAND Memory,Source: Shrivastava, Vice President Technology Development, at Sandisk Corporation,C,15,Sandisk BiCS 3D-NAND,Source: ,C,16,SK-Hynix NAND Roadmap,Source: 2013SK_hynix_en_1.pdf ,C,

14、17,SK-Hynix 2D NAND Memory,SK Hynix Inc. announced that it has started full-scale mass production of 16 nm 64 Gb (Gigabit) MLC (Multi Level Cell) NAND Flash, which uses the industrys thinnest process technology. (Nov.20 20013),Source: Source: Global Memory Sector Citi Research Equities 26 Sept 2013,

15、We expect Hynix will develop 3D vertical fabrication technology by year-end or early next year and determine commercial production timing later. Given very low presence in the SSD market, unlike other NAND makers, Hynixs priority in R&D and product development will be on enhancing competitive in hou

16、se controller capability to set up a more sustainable product portfolio, according to the company.,C,18,SK-Hynix MLC NAND Product Offerings,Source: SK-Hynix,C,19,Source: ,SK-Hynix 3D V-NAND,C,20,Glossary,BiCS- pipe-shaped Bit Cost Scalable flash. A 3D NAND cell being developed by Toshiba. eMMC- Embedded Multimedia Card. A 1997 standard combining NAND Flash and Controller. HKMG- High K Metal Gate. An advance technology designed to replace silicon dioxide at small process nodes. ITRS- International Technology