半导体三极管工作原理.ppt

1、1,船舶无线电技术基础,第2章 晶体三极管及电压放大电路 Bipolar Junction Transistor And Voltage amplifier circuits 大连海事大学信息科学技术学院主讲教师：杨梅,上篇 模拟电路,2,2.1 Bipolar Junction Transistor,2.1.1 结构Construction 分类(type)：NPN and PNP NPN： 3区(section)：发射区、基区、集电区 3极(terminal)：发射极E-emitter、基极B-base、 集电极 C-collector 2结(junction)：发射结BE(base-em

2、ittter junction) 集电结BC(base-collector junction),Schematic symbol,3,(1)Transistor Construction (1)发射区高掺杂(emitter layer is heavily doped，the base and collector is lightly doped. ) (2)基区很薄(outer layers have widths much greater than the sandwiched n-or p-type matrial.) （2）Transistor operation BE junctio

3、n is forwrd- biased（正偏）， BC junction is is reverse- biased （反偏）,2.1 Bipolar Junction Transistor,4,晶体三极管的三种电路连接结构 (three circuit configurations): 共基极(common-base): 输入:E 输出:C 共发射极(common-emitter): 输入:B 输出:C 共集电极(common-collector): 输入:B 输出:E,5,NPN和PNP的符号,电流分配关系（current distribution)：IEICIB,2.1 Bipolar

4、Junction Transistor,6,共射极直流电流放大系数(Common-emitter DC current gain.,输出特性曲线近于平行等距并且ICEO较小时，,: :DC beta gain.the ratio of the IC to the IB,: :AC beta gain.a small change in collector current divided by a corresponding change in base current.,2.1 Bipolar Junction Transistor,7,2.1.3 volt-ampere Characteri

5、stic Curves for BJT,晶体三极管伏安特性曲线 (volt-ampere Characteristic Curves)： relationship between voltage and current,Common emitter，NPN,（2）输出特性曲线(output characteristic curves)：。,（1）输入特性曲线(input characteristic curves)： vCEconstant, (relationship between iB and vBE) iBfin（vBE）vCEconstant,8,输入特性曲线(volt-ampere

6、 curves for the input loop) 发射结正偏： iBfin（vBE）vCEconstant vCE=0，similar to volt-ampere curves of diode。 死区电压: threshold voltage 导通压降:diode drop/conducting voltage vCE0,vCEvBE，右移(right shift) 。 vBE一定， iBvCE vCE=1, vCE， small change in iB, family curves。,2.1.3 volt-ampere Characteristic Curves for BJT,

7、9,输出特性曲线: (volt-ampere curves for the output loop) Four operation regions： 放大区(active/linear region) 截止区(cutoff region) 饱和区(saturation region) 击穿区(breakdown region),2.1.3 volt-ampere Characteristic Curves for BJT,10,放大区(active region)：近似水平的直线(curves are approximately parallel with eath other.) 特点： i

8、CiB, ic is approximately a constant for a given iB . vCE has little effect on iC . bias condition ： 发射结正偏(forward-biased) 集电结反偏( reverse-biased),2.1.4 Four operation regions for BJT,11,(2) 截止区(cutoff)： the regions below the iB=0 curve. iB 0 ， iC 0 bias condition ： 发射结反偏(reverse-biased) 集电结反偏(reverse

9、-biased),2.1.4 Four operation regions for BJT,12,(3) 饱和区(saturation region)： iC is determined by vCE and iB has little effect on iC. (1)iC iB (2)vCES0.3V(saturation voltage drop between C and E) bias condition ： BE junction :正偏(forward-biased) BC junction: 正偏(forward-biased),2.1.4 Four operation reg

10、ions for BJT,13,(4) 击穿区(breakdown region) vCE，vCB。 vCEBC junction breakdown iC,2.1.4 Four operation regions for BJT,14,active region：BE is forward-biased ，BC is reverse-biased cutoff region：BE and BC are reverse-biased iC0，CE acts as an open circuitswitch off saturation：BE and BCare forward-biased v

11、CES0.3V。CE appears as a short ciruitswitch on switch characteristic for BJT,2.1.4 Four operation regions for BJT,15,放大区：BE正偏，BC反偏.VBVE; VCVB。VC最高 截止区：BE和BC都反偏 VBVE; VBVE。 VB最高,放大,截止,饱和,2.1.4 Four operation regions for BJT,16,共发射极放大电路(common-emitter） amplifier circuit),外部电压（偏置）条件： BE forward-biased B

12、Creverse- biased,双电源阻容耦合共射放大电路 Doulbe power supplies capacitively coupled amplifier,共发射极(common-emitter)：,2.2 voltage amplifer circuits,17,Component of voltage amplifier circuit： (1)晶体管T（transistor)：晶体管是放大电路中的放大元件（amplifier component)，有电流放大(amplifes current)作用.,(2) VCC:电源VCC为输出信号提供能量外，保证集电结反偏，使晶体管处在

13、放大。 VCC：ensure BC junction is reverse-biased,(3)集电极负载电阻RC（collector resistor) 将集电极电流的变化转换为电压的变化，实现电压放大(amplifer voltage),2.2 voltage amplifer circuits,18,电路组成及各元件作用： (4) VBB和RB(Base resistor). VBB: ensure BE is forward-biased). RB:用于建立合适的静态偏置IB和VBE(establish the proper forward-bias supply and base c

14、urrent) 。IB大小对放大作用的优劣和性能有密切关系。 (5) C1和C2：耦合电容(coupling capacitor)，容量较大。 作用：阻直流（block DC)、通交流(pass AC) 对直流信号:C1C2视为开路(open circuit)，有隔直（isolate DC)作用； 对交流信号:C1C2视为短路(short circuit)，耦合作用。,2.2 voltage amplifer circuits,19,共发射极(common-emitter)放大电路,单电源基本阻容耦合共射放大电路 single power supply common-emitter capac

15、itively coupled amplifier,2.2 voltage amplifer circuits,20,分析遵循的原则：先静态分析(static analysis）、后动态分析(dynamic analysis) 静态(static analysis )：未加交流输入信号（vi0）时的工作状态（直流）称静态。 represents the DC voltage and current conditions when no AC singal is applied . Q点：交流输入信号（vi0）时，晶体管各极直流电流和极间直流电压的值，称为静态工作点，常用Q表示，即（IBQ、 V

16、BEQ 、ICQ、VCEQ），用直流通路分析。 Q-point is often called the resting point or quiescent point (Q-point). it represents the DC voltage and current conditions when no signal is applied to the transistor。 动态(dynamic analysis )：分析加上交流输入信号vi时的工作状态。用交流通路分析。,2.2 voltage amplifer circuits,21,由于放大电路中存在电抗性元件，对直流信号和交流信

17、号呈现的阻抗不同，所以，直流的通路和交流的通路是不同的。 How to draw DC and AC equivalenc circuit： 直流通路(DC equivalent)的 画法： 电容：开路； 电感：短路； 交流信号源：短路， 但应保留其内阻。 Capacitor:open circuit, inductor :short circuit AC signal source:short circuit,preserve internal resistance,2.3.1DC and AC equivalent circuit,22,交流通路(AC equivalent)的 画法： 大

18、容量电容（如耦合电容）：短路， 直流电压源：短路 large Capacitors:short circuit DC voltage source:short circuit,2.3.1 DC and AC equivalent circuit,23,直流通路(DC equivalent),交流通路(AC equivalent),固定偏置电路（fixed bias),Example.2：draw the DC and AC equivalent circuit,24,Example.2：draw the DC and AC equivalent circuit,直流通路,交流通路,25,ana

19、lysis principle：static first、then dynamic static：Draw DC circuit, determine Q-point. dynamic：Draw AC circuit,calculate 计算放大电路的动态性能指标(calculate AC parameters) 电压放大倍数 voltage gain 输入电阻 input resistance 输出电阻 output resistance。,Static analysis approach: Graphical approach mathematicalapproach.,2.2 volta

20、ge amplifer circuit,26,Find Q-point (mathematical approach) Step: （1）画直流通路(DC equivalent) （2）根据输入/输出回路电压方程求 IBQ、VBEQ、ICQ、VCEQ(input/output loop voltage equation),直流通路,Determine Q-point by using mathematical approaches,27,IBQ=（VCCVBEQ）/RB VCC /RB,ICQ=IBQ,直流通路,(2)输入回路电压方程： VCC=VBE+IBRB applying Kirchh

21、offs voltage equation in the clockwise direction to the input loop,solving the equation for the current IB result in the following:,IEQ=IBQ+ ICQ =（1+）IBQ,VBEQ=0.7V （Si),（1）Draw DC equivalent circuit,Determine Q-point by using mathematical approaches,28,VCEQ=VCCRCICQ,=VCCIBQ RC,直流通路,(3)输出回路电压方程：VCC=V

22、CE+ICRC output loop equation（applying Kirchhoffs voltage law in the clockwise derection around the closed output loop,we obtain),Determine Q-point by using mathematical approaches,29,VCC=12 V，RC=2.2 k，RB=240 k , =50 (1) IBQand VBEQ (2)ICQ,VCEQ (3)VB and VC (4) VBC Solution: IBQ=（VCCVBEQ）/RB=12-0.7/2

23、40 k =47.08A VBEQ =0.7V（Si） ICQ IBQ=50 (47.08)A=2.35mA VCEQ=VCCRCICQ=12-(2.35mA) 2.2 k=6.83V VB=VBE=0.7V VC=VCE=6.83V VBC=VB-VC=-6.13V,Negative sign revealing that the BC junction is reversed-biased,Example .Determine the following for the fixed-biased configuration of the following fig.,30,图解法：在输入、

24、输出特性曲线上，用作图的方法确定静态工作点Q，即在输入特性曲线上求出（IBQ，VBEQ ），在输出特性曲线上求出（ ICQ、VCEQ ）,2.3.2 determint Q-point by using graphical approaches,graphical approach: determines the Q-point at the input and output characteristic curves by using graphical aprroach. That is, determines （IBQ，VBEQ ） at the input characteristic

25、 curves and determines（ ICQ、VCEQ ） at the input and output characteristic curves.,31,Find Q-point by using graphical approaches Step 步骤： （1）画直流通路(DC equivalent circuit ) （2）根据输入回路方程求 IBQ， （3）在三极管输出特性曲线中找出IBQ对应的曲线。 （4）根据输出回路方程作直流负载线（DC load line)。 （5）(3)和（4）所对应的两线的交点(intersection) 为Q点。,2.3.2 determin

26、t Q-point By using graphical approaches,32,VBE=VCC-IBRB,2、由输入回路电压方程求IBQ,直流通路,图解法求Q点,1、画直流通路,IBQ=（VCCVBEQ）/RB VCC /RB,VCC=VBE+IBRB,2.3.2 determint Q-point by using graphical approach,33,VBE=VCC-IBRB,When VBE0,IBVCC/RB locate point A(0, VCC/RB)(on the vertical axis) When IB0, VBEVCC point B（ VCC ,0）(o

27、n the horizontal axis) Join two point( A and B) ,we can draw a straight line. The intersection of the straight line and input characteristic curve is Q（VBEQ，IBQ）,Q,Input loop voltage equation:,在输入特性曲线上确定Q（IBQ，VBEQ）,B:VCC,A:VCC/RB,2.3.2 determint Q-point by using graphical approach,34,Q,（3）在三极管输出特性曲线

28、中找出IBQ对应的曲线。,When VCE0,ICVCC/RCpoint A（0， VCC/RC ） on the vertical axis. When IC0,VCEVCC point B( VCC,0） on the horizontal axis Join two point( A and B) ,we can draw a straight line. (called DC load line) （5) The intersection of the DC load line and the curve corresponding to IB=IBQ at output charac

29、teristic curve determines Q（ICQ，VCEQ）,（4）作直流负载线（DC load line),VCE=VCC-ICRC,output loop voltage equation:,A,B,2.3.2 determint Q-point byusing graphical approach,35,2.2 dynamic analysis,Dynamic analysis approach： 图解法(graphical approach)和微变等效电路法(small signal ac vequivalent circuit approach) Graphical a

30、pproach：利用晶体管的输入、输出特性曲线，用作图的方法分析。 small signal ac vequivalent circuit approach :在一个小的变化范围内，近似认为三极管的特性曲线为线性，因此用其相应的微变等效电路代替三极管，将非线性电路用线性电路来分析。,36,Dynamic analysis (graphical approach): 叠加原理（superposition theorem） vi小信号(small signal ） vBE=VBEQ+vi iB=IBQ+ib iC=iB= IBQ+ ib=ICQ+ic vCE=VCC-iCRC =VCC-ICQRC

31、-icRC=VCEQ+vce C2:“isolate DC，pass AC” vo=vce= - icRC,反相放大 180 0Out of phase with vi,dynamic analysis(graphical approach ),37,Effect of circuit parameters on Q-point,RC,Q 远离饱和区,Q,Q, Q 接近饱和区,RC ,Effect of an increasing level of RC on the load line and the Q-point.,If VCC is held fixed and RC changed,

32、the load line will shift as fig. If RCC is fixed and RC varied, how will the load line shift?,38,How to operate a proper Q-point,amplier,BE is forward-biased BC is reversed-bias,(1)Why is the Q-point very important? (2)How to operate a proper Q-point?,Q point is in the active region,AC signal swing

33、in both the positive and negative probably drive the transistor into saturation or cutoff it is very important to set a proper Q-point.,39,只改变RB，对Q点的影响,Effect of circuit parameters on Q-point,RB,IBQVCC/RB Q 饱和区,Q,Q,Q,Q,IBQ VCC/RB Q 截止区,RB ,The movement of the Q-point with RB,If the level of IB is ch

34、anged by varing the value of RB,the Q-point moves up or down the load line as shown in fig.,40,非线性失真（nonlinear distortion): Q点位置设置不当(in a improper location) ，或者输入信号太大(AC input signal is too big)使放大电路的工作范围超出了晶体管特性曲线的线性工作范围，则放大电路输出波形产生明显的非线性失真。 非线性失真分为 截止失真(cutoff distortion)和饱和失真(satuation distortion

35、)。,nonlinear distortion非线性失真,41,原因(reason)： 1.Q point is too lowvCE will be clipped at cutoff. .,解决方法：solution,Q,ICQ,IBQ,IBQVCC/RB,VCC，RB,截止失真cutoff distortion,42,reason： 1.Q point is too highvCE will be clipped at saturation.,solution：,Q ,ICQ ,IBQ ,IBQ VCC/RB,VCC ，RB ,Q点合适，为什么同时出现截止和饱和失真？,RC ,饱和失真s

36、atuation distortion,43,conclusion,（1）when the Q-point is at the center ,a maximum output can be obtained.,(2)If Input AC signal is too big , vCE probably will be clipped at cutoff and saturation.,(3)Bias ciruits set the Q-point that allows and AC signal to vary in both the positive and negative with

37、out driving the transistor into saturation or cutoff ,so the proper Q-point is very important to amplifier circuits, as well as the choice of parameters for the required circuit(RB,RC,) is important.,44,1) vi is a small AC signal 2)The Q-point must be located in the middle of active region . 3)The i

38、nput and output signals vary in the linear region. 4)The formula ICQ=IBQ is always correct when the input operate in the amplifier.,Purpose: small-signal ac equivalent circuit is an aid in analyzing bipolar junction transistor.,Conditions which the transistor is replaced by the small-signal ac equiv

39、alent circuit :,2.3.3 small-signal AC equivalent circuit,45,Input Characteristic rBE :input resistance. (2)Output Characteristic,Equivalent circuit,2.3.3 small-signal AC equivalent circuit,Controled- current source,46,How to draw the equivalent circuit? （1）Draw AC circuit （2）replace Transistor with

40、the the equivalent circuit,2.3.3 small-signal AC equivalent circuit,small-signal AC equivalent circuit,47,Dynamic analysis (small-signal AC equivalent circuit),step （1）Draw AC equivalent circuit。 （2）substitute small-signal AC equivalent circuit for the transistor （3) calculate AC parameters 电压 放大倍数

41、Av (voltage gain) 输入电阻 ri(input resistance) 输出电阻 rO(output resistance),2.3.4 dynamic analysis (AC parameters for amplifier),48,2.3.4 dynamic analysis (AC parameters for amplifier),（1）voltage gain,AC parameters：,（2） input resistance ri The equivalent resistrance looking in from the source.,ri is high

42、 compared to the source resistance,most of the voltage will appear at the input and the loading effect is small.if it is small Compared to Rs, little voltage will be left for the amplifier to amplify.,49,（3） rO(output resistance),The equivalent resistrance looking back from the output load.,2.3.4 dy

43、namic analysis (AC parameters for amplifier),50,analysis principle：static first、then dynamic Static analysis： (1)Draw DC circuit (2) determine Q-point. dynamic analysis： (1)Draw AC equivalent circuit (2)draw small-signal AC equivalent circuit (3)calculate calculate AC parameters:Av,ri,ro,举例：电路分析ampl

44、ifier analysis command-emmiter (fixed-bias),51,IBQ=（VCCVBEQ）/RB VCC /RB,ICQ=IBQ,VCEQ=VCCRCICQ,=VCCIBQ RC,Static analysis（1）Draw DC equivalent circuit （2）determine IBQ、VBEQ、ICQ、VCEQ by input and output voltage equations,DC equivalent,VCC=VBE+IBRB,：VCC=VCE+ICRC,IEQ=IBQ+ ICQ =（1+）IBQ,VBEQ=0.7V （Si),举例：

45、电路分析amplifier analysis command-emmiter (fixed-bias)共射固偏,52,Dynamic analysis(small-signal AC equivalent circuit) step （1）Draw AC equivalent circuit。 （2）substitute small-signal AC equivalent circuit for the transistor （3) calculate AC parameters 电压 放大倍数 Av (voltage gain) 输入电阻 ri(input resistance) 输出电阻

46、 rO(output resistance),举例：电路分析amplifier analysis command-emmiter (fixed-bias)共射固偏,53,small-signal AC equivalent circuit,交流通路,微变等效电路,举例：电路分析amplifier analysis command-emmiter (fixed-bias)共射固偏,54,Step of drawing small-signal AC equivalent circuit （1）Draw AC equivalent circuit。 （2）substitute small-sign

47、al AC equivalent circuit for the transistor,举例：电路分析amplifier analysis command-emmiter (fixed-bias)共射固偏,55,（1）voltage gain Avis dependent on,RL,rBE,AC parameters ：,RL-open circuit，,举例：电路分析amplifier analysis command-emmiter (fixed-bias)共射固偏,56,Discussion: (1) Vo is 180 out-of phase with Vi. (2)Av is r

48、elated to , RL and rBE. (3)AVhas maximum value when RL=,Conclusion: Nagative sign reveal that vo ad vo are out of phase for the common emitter. The highest Av is obtained under no-load conditon. The larger the level of RL,the greater is the level of Av.,举例：电路分析amplifier analysis command-emmiter (fix

49、ed-bias)共射固偏,57,（2）ri：,举例：电路分析amplifier analysis command-emmiter (fixed-bias)共射固偏,58,（3）ro：independent voltage sources act as short circuits,preserve internal resistance, independent current sources act as short circuit, preserve controled sources, load is open ciruits, if applying Vo to the output

50、, the current is IO, then,举例：电路分析amplifier analysis command-emmiter (fixed-bias)共射固偏,59,2.3.5 Bias stability,T 、VBEQ 、ICBO ,IBQ =(VCC VBEQ )/RB ICQ = IBQ +ICEO =IBQ+(1+) ICBO VCEQ=VCCICQRC,固定偏置电路（fixed bias circuit),固定偏置Fixed-bias configuration,Fixed-bias configuration,disvantage: ICQ,VCEQ are a fun

51、cion of the , however is tempereture sensitive,and it is usually not well defined,it would be desiable to develop a bias circuit that is less dependent on ,or in fact is independent of ,the transistor beta.,60,voltage-divider bias configuration,RB1:上偏置电阻upper base resistor RB2下偏置电阻(lower base resist

52、or),RE：发射极电阻(emitter resistor),Function：Stabilize Q-point T IBQ ICQ IEQ， VEQ VBEQ=（ VCQ- VEQ ） IBQ ,2.3.5 静态工作点的稳定(Q-point stability),固定偏置电路（fixed bias circuit),61,2.3.6 Q-point(voltage-divider bias ),approximate Analysis: voltage-divider rule can be applied only if specific conditions are satisfied

53、.,VEQ=VBQVBEQ,IBQ=ICQ/, ICQ IEQ=,DC equivalent,I1 I2 IBQIBQ 0,VCEQ=VCCICQ (RC+RE),Is usually sufficiently larger than one to permit the approximation +1 or ICQ IEQ, T acts as a high resistance load.,62,2.3.6 common-emitter(voltage-divided bias),（2）dynamic analysis:calculate ， ,ri,ro,Small-signal AC

54、equivalent,（1)static analysis(refer to the previous page),63,At the frequencies of operation ,the reactance of the capacitor is so small compared to RE,that it is treated as a short circuit across RE RE is shorted out by CE,2.3.6 common-emitter(voltage-divided bias),64,2.3.6 common-emitter(voltage-d

55、ivided bias),what if CE （bypass capacitor) is open circuit ?,Small-signal AC equivalent,DC equivalent,65,2.3.6 common-emitter(voltage-divided bias),What if CE （ bypass capacitor) is open circuit ) ?,ie 折合成ib ，电流缩小（1 ）倍，因此电阻要扩大（1 ）倍。,66,2.3.6 common-emitter(voltage-divided bias),What if CE （ bypass c

56、apacitor) is open circuit ) ?,67,2.3.6 common-emitter(voltage-divided bias),Circuit without CE (unbypassed),circuit with CE (bypassed),Av is dependent on RL，RL， Av is maximum。 rBE,Av ，ri ,discussion：,Conclusion: (1) Av decreases and ri increase when the CE is not used in the circuit.(2) CE has no ef

57、fect on the Q-point(voltage-divider bias),68,2.4 射极输出器Emitter Follower Circuit,共 C电路(common-collector),analysis static Q（IBQ、ICQ、VCEQ） dynamicAv、ri、ro static VCCIBQRBVBEQ（1）IBQRE IBQ (VCC VBEQ )/(RB(1 )RE) ICQ = IBQ IEQ = IBQ ICQ （1）IBQ VCEQ VCC IEQRE,DC equivalent,69,dynamic,Small-signal AC equival

58、ent circuit,(1)Av1 Av0, vo is in phase with vi (2)Av1, 射极跟随器emitter follwer(vo is slightly less than vi ,vo “follow” the magnitude of vi with an in-phase relationship ),2.4 射极输出器Emitter Follower Circuit,70,动态,微变等效电路,ri=RBrBE +(1+)(RE RL),ri很大，电路承接信号源电压能力很强,ie 折合成ib ，电流缩小（1 ）倍，因此电阻要扩大（1 ）倍。,2.4 射极输出器

59、Emitter Follower Circuit,71,动态,2.4 射极输出器Emitter Follower Circuit,72,动态,ib折合成ie，电流扩大（1 ）倍，因此电阻要缩小（1 ）倍。,2.4 射极输出器Emitter Follower Circuit,73,Conclusion (Emitter Follower Circuit ) Av1，Av1emitter follwer(vo is slightly less than vi ,vo is in phase with the vi ,that is vo “follow” the magnitude of vi with an in-phase relationship ) rihigh input resistance rolow