datasheet_增强型zigbee插针模块_W

1、RexBee 模块产品手册REX3DP浙江瑞瀛网络科技有限公司版权声明本文档所包含的所有信息均为浙江瑞瀛网络科技有限公司（以下简称“瑞瀛”或“本公司”）版权所有。未经本公司书面许可，不得向本公司雇员、商、合作方或授权许可方以外的任何第三方泄露本文档内容，不得以任何形式擅自复制或传播本文档。若使用者违反本版权保护的约定，本公司有权追究使用者由此产生的法律责任。版本更新V1.0.02011/06/04初稿1目录1.产品简介..产品简介3产品应用3主要特性4产品优势41.5. 名称缩写和简写51.6. 相关文档6产品概述72.1. 概述7技术

2、规格83.1. 电气特性....5.电气特性8测试条件8射频特性8处理器特性9模块接口特性..物理/环境特性9引脚配置10模块功率模式配置19天线规格233.5.1. PCB 天线233.5.2. 简易天线243.5.3. U.FL 连接头24模块调试说明263.6.1. 模块调试263.6.2. 模块编程与调试接口连接29模块电路参考设计303.7.1. 插针模块参考设计（单电压）303.7.2. 插针模块参考设计（双电压）30.3.8. 射频性能测试结果31订购信息33相关产品34联系我们

3、354.5.6.21. 产品简介1.1. 产品简介REX3DP 是一款外形小巧、高灵敏度的低功率 ZigBee 模块。基于瑞瀛创新型RexBee 硬件平台，该模块符合 IEEE 802.15.4 规范，可应用于无线传感、控制及数据采集。同时， 该模块为用户的开发省去大量的时间和精力，从而为产品推向市场节约了时间。1.2. 产品应用瑞瀛 RexBee 模块符合 IEEE802.15.4 ZigBee 协议栈，它支持自我修复、自我组织的网状网络，进而优化了网络流量并降低了功耗。该模块支持两种应用配置： 客户定制：我司可根据客户的具体应用，为客户提供可靠、安全的应用程序。

4、 透明传输：用户可根据我司的 AT 指令程序，进行程序开发。模块的应用包括但不限于：楼宇自动化和监控 照明控制 无线烟感和瓦斯探测器 结构完整性监控HVAC 监测和控制库存管理环境监测安防水 计 量工业监控 机械设备状态和性能监测 植物系统监测 (如温度、压强、水流量、湿度等)自动抄表31.3. 主要特性尺寸：32.20*20.50*10.50mm 高接受灵敏度：-104dBm出色的链路预算: 122dB可靠通讯距离广：2000m（可视距离） 输出功率高达 23dBm极低的功耗 休眠模式：0.4A 接收模式：36mA 发射模式：170mA20dBm; 230mA23

5、dBm丰富的存储资源: STM32W：128K 字节Flash；8K 字节 RAM EM351/EM357：128K/192K 字节 Flash；12K 字节 RAM多种接口：模拟接口和数字接口24 个 GPIO，4 个中断6 路模拟输入通道1 个USART 带硬件流控制1 个 TWI 接口1 个 SPI 接口支持 MAC 地址写入 Flash 功能多种天线可供选择符合 IEEE 802.15.4 标准2.4G 免许可证工作频段支持USART bootloader 和 AT 指令1.4. 产品优势n 封装设计小巧，即使是很小的设备也能使用。n 业界领先的链路预算n 出色的电池寿命n 4 层PC

6、B 板设计n 有丰富的存储资源用于客户软件应用n 网状组网能力n 易于使用的低成本开发套件4n ISM 免许可频段1.5.名称缩写和简写ADC API DC DTR DIPEEPROM ESD GPIO HAL HVAC HWTWI IEEE IRQ ISM JTAGAnalog-to -Digital Converter Application Programming Interface Direct CurrentData Terminal Ready Duap In-line packageElectrically Erasable Programmable

7、Read-Only Memory Electrostatic DischargeGeneral Purpose Input/Output Hardware Abstraction LayerHeating, Ventilating and Air Conditioning HardwareInter-Integrated CircuitInstitute of Electrical and Electrionics Engineers Interrupt RequestIndustrial, Scientific and Medical radio bandDigital interface

8、for debugging of embedded device, also known as IEEE 1149.1 standard interfaceMedium Access Control layerMicrocontroller Unit. In this document it also means the processor, which is the core of ZigBee moduleNetwork layerOriginal Equipment Manufacturer Over-The-Air upgradePrinted Circuit Board Packag

9、e Error Ratio Physical layerRandom Access Memory Radio FrequencyRequest to Send/ Clear to Send ReceiverSurface Mount Assembly Serial Peripheral Interface SoftwareTransmitterUniversal Asynchronous Receiver/TransmitterMAC MCUNWK OEM OTA PCB PER PHY RAM RFRTS/CTS RXSMA SPI SW TX UART5USAR

10、T USB ZDKZigBeePROUniversal Synchronous/Asynchronous Receiver/Transmitter Universal Serial BusZigBee Development KitWireless networking standards targeted at low-power applications802.15.4The IEEE 802.15.4-2003 standard applicable to low-rate wireless PAN1.6. 相关文档1 IEEE Std 802.15.4-2003 IEEE Standa

11、rd for Information technology - Part 15.4 Wireless Medium Access Control (MAC) and Physical Layer (PHY) Specifications for Low-Rate Wireless Personal Area Networks (LR-WPANs)2 ZigBee Specification. ZigBee Document 053474r17, October 19, 200762.2.1.产品概述概述REX3DP 是一款外形小巧、高灵敏度的低功率 ZigBee 模

12、块，符合 IEEE 802.15.4 规范。基于瑞瀛创新型RexBee 硬件平台，拥有极其出色的射频性能、极低的功耗，并且非常易于用户集成。图 2-1. 产品框图Cortex M3 CoreAntennaMatching NetworkFEMREX3DP RexBee 模块符合 FCC、IC 和 CE 规范，能应用于多种不同环境中的设备。REX3DP RexBee 模块符合 ROHS 规范。同时，本公司还提供一整套完整的开发和评估套件，用户可根据自身需求选择不同版本套件进行测试及开发。7Encryption AcceleratorGPIOregisters2.4GH

13、zRadioUARTTimersIEEE802.15.4 MACAcceleratorARM CORTEX-M3CPU with NVIC and MPUTWIO-QPSKModemPower ManagementSPIProgram Flash 128kBData RAM8kBXTAL (Crystal Frequency 24MHz)3.3.1.技术规格电气特性3.1.1. 电气特性表 3-1. 绝对最大额定参数注意: 超过绝对最大额定参数可能对模块造成毁害。在任何情况下，用户都不可违反上表所列的绝对最大额定参数。若有违反，可能对模块造成不可挽回的。3.1.2. 测试条件表 3-2. 测试

14、条件 ( 除非另行约定), VCC = 3.3V,温度= 25C3.1.3. 射频特性表 3-3. RF 射频特性8参数测试条件范围单位工作频段24002483.5MHz频段数量16信道编号0B1AHex信道间隔5MHz发射功率-32 to +23dBm接收灵敏度丢包率1%-104dBm参数范围单位供电电压, VCC2.1 to 3.6V接收电流36mA发射电流170mA电流：无线关掉，MCU 以低速运行9.0mA休眠电流0.4A参数最小值最大值引脚工作电压范围 （Reset 除外）-0.3VVDD_PADS 0.3芯片所有 I/O 最大驱动电流40 mA芯片最大工

15、作电流150 mA芯片最大接收信号强度+10 dBm3.1.4. 处理器特性表 3-4.处理器特性3.1.5. 模块接口特性表 3-5.模块接口特性3.2. 物理/环境特性表 3-6. 物理/环境特性9参数值备注物理尺寸(L*W*H)32.20*20.50*10.50mm重量3.0g工作温度-40C to +85C工作相对湿度不超过 80%参数测试条件范围单位UART 最大波特率230400bps模拟通道的分辨率/转换时间半双工模式12/4096Bits/s模拟输入阻抗1M模拟参考电压1.2V模拟输入电压0 - VREFVI2C 总线最大时钟频率400kHzGPIO

16、 输出电压(高/低)-8/ 4 mA2.8/ 0.9V实时时钟频率32.768kHz参数测试条件范围单位片上 Flash 存储空间128/192Kbytes片上 RAM 存储空间8/12Kbytes工作频率24MHz最大传输速率250kbps额定输入/输出阻抗For unbalanced output503.3. 引脚配置图 3-1. 外观尺寸图图3-1:外观尺寸图(mm)图3-2.引脚配置表3-7.引脚说明11模块引脚编号QFN48封装引脚编号引脚信号方向引脚说明13.3V-DC3.3V supply23.3V-DC3.3V sup

17、ply322PA1I/ODigital I/OTIM2_CH3OTimer 2 channel 3 output Disable remap with TIM2_OR6 Enable timer output in TIM2_CCER Select alternate output function with GPIO_PACFGL7:4ITimer 2 channel 3 input. Disable remap with TIM2_OR6.SC2SDAI/OTWI data of Serial Controller 2 Either disable timer output in TIM2

18、_CCER or enable remap with TIM2_OR6 Select TWI with SC2_MODE Select alternate open-drain output function with GPIO_PACFGL7:4SC2MISOOSPI slave data out of Serial Controller 2 Either disable timer output in TIM2_CCER or enable remap with TIM2_OR6 Enable slave with SC2_SPICFG4 Select SPI with SC2_MODE

19、Select alternate output function with GPIO_PACFGL7:4ISPI master data in of Serial Controller 2 Enable slave with SC2_SPICFG4 Select SPI with SC2_MODE424PA2I/ODigital I/OTIM2_CH4OTimer 2 channel 4 output Disable remap with TIM2_OR7 Enable timer output in TIM2_CCER Select alternate output function wit

20、h GPIO_PACFGL11:8ITimer 2 channel 4 input. Disable remap with TIM2_OR7.SC2SCLI/OTWI clock of Serial Controller 2 Either disable timer output in TIM2_CCER or enable remap with TIM2_OR7 Select TWI with SC2_MODE Select alternate open-drain output function with GPIO_PACFGL11:8SC2SCLKOSPI master clock of

21、 Serial Controller 2 Either disable timer output in TIM2_CCER or enable remap with TIM2_OR7 Enable master with SC2_SPICFG4 Select SPI with SC2_MODE Select alternate output function with GPIO_PACFGL11:812模块引脚编号QFN48封装引脚编号引脚信号方向引脚说明ISPI slave clock of Serial Controller 2 Enable slave wit

22、h SC2_SPICFG4 Select SPI with SC2_MODE520PB4I/ODigital I/OTIM2_CH4OTimer 2 channel 4 output Enable remap with TIM2_OR7 Enable timer output in TIM2_CCER Select alternate output function with GPIO_PBCFGH3:0ITimer 2 channel 4 input. Enable remap with TIM2_OR7.UART_RTSOUART RTS handshake of Serial Contr

23、oller 1 Either disable timer output in TIM2_CCER or disable remap with TIM2_OR7 Enable with SC1_UARTCFG5 Select UART with SC1_MODE Select alternate output function with GPIO_PBCFGH3:0SC1nSSELISPI slave select of Serial Controller 1 Enable slave with SC1_SPICFG4 Select SPI with SC1_MODE621PA0I/ODigit

24、al I/OTIM2_CH1OTimer 2 channel 1 output Disable remap with TIM2_OR4 Enable timer output in TIM2_CCER Select alternate output function with GPIO_PACFGL3:0ITimer 2 channel 1 input. Disable remap with TIM2_OR4.SC2MOSIOSPI master data out of Serial Controller 2 Either disable timer output in TIM2_CCER o

25、r enable remap with TIM2_OR4 Enable master with SC2_SPICFG4 Select SPI with SC2_MODE Select alternate output function with GPIO_PACFGL3:0ISPI slave data in of Serial Controller 2 Enable slave with SC2_SPICFG4 Select SPI with SC2_MODE738PC1I/ODigital I/OADC3AnalogADC Input 3 Enable analog function wi

26、th GPIO_PCCFGL7:4SWOOSerial Wire Output asynchronous trace output to debugger Select asynchronous trace interface in ARM core Enable trace interface 13模块引脚编号QFN48封装引脚编号引脚信号方向引脚说明ARM core Select alternate output function with GPIO_PCCFGL7:4TRACEDAT A0OSynchronous CPU trace data bit 0

27、Select 1-, 2- or 4-wire synchronous trace interface in ARM core Enable trace interface in ARM core Select alternate output function with GPIO_PCCFGL7:4819PB3I/ODigital I/OTIM2_CH3OTimer 2 channel 3 output Enable remap with TIM2_OR6 Enable timer output in TIM2_CCER Select alternate output function wi

28、th GPIO_PBCFGL15:12ITimer 2 channel 3 input. Enable remap with TIM2_OR6.UART_CTSIUART CTS handshake of Serial Controller 1 Enable with SC1_UARTCFG5 Select UART with SC1_MODESC1SCLKOSPI master clock of Serial Controller 1 Either disable timer output in TIM2_CCER or disable remap with TIM2_OR6 Enable

29、master with SC1_SPICFG4 Select SPI with SC1_MODE Select alternate output function with GPIO_PBCFGL15:12ISPI slave clock of Serial Controller 1 Enable slave with SC1_SPICFG4 Select SPI with SC1_MODE927PA5I/ODigital I/OADC5AnalogADC Input 5. Select analog function with GPIO_PACFGH7:4.PTI_DATAOData sig

30、nal of Packet Trace Interface (PTI). Disable trace interface in ARM core. Select alternate output function with GPIO_PACFGH7:4.nBOOTM ODEIEmbedded serial bootloader activation out of reset. Signal is active during and immediately after a reset on NRST.TRACEDAT A3OSynchronous CPU trace data bit 3. Se

31、lect4-wire synchronous trace interface in ARM core. Enable trace interface in ARM core. Select alternate output function with GPIO_PACFGH7:414模块引脚编号QFN48封装引脚编号引脚信号方向引脚说明1026PA4I/ODigital I/OADC4AnalogADC Input 4. Select analog function with GPIO_PACFGH3:0.PTI_ENOFrame signal of Packet

32、Trace Interface (PTI). Disable trace interface in ARM core. Select alternate output function with GPIO_PACFGH3:0.TRACEDAT A2OSynchronous CPU trace data bit 2. Select4-wire synchronous trace interface in ARM core. Enable trace interface in ARM core. Select alternate output function with GPIO_PACFGH3:

33、0.1114PC7I/ODigital I/OOSC32AI/O32.768 kHz crystal oscillator. Select analog function with GPIO_PCCFGH15:12OSC32_EX TIDigital 32 kHz clock input source1213PC6I/ODigital I/OOSC32BI/O32.768 kHz crystal oscillator Select analog function with GPIO_PCCFGH11:8nTX_ACTIV EOInverted TX_ACTIVE signal (see PC5

34、) Select alternate output function with GPIO_PCCFGH11:81330PB1I/ODigital I/OSC1MISOOSPI slave data out of Serial Controller 1 Either disable timer output in TIM2_CCER or disable remap with TIM2_OR4 Select SPI with SC1_MODE Select slave with SC1_SPICR Select alternate output function with GPIO_PBCFGL

35、7:4SC1MOSIOSPI master data out of Serial Controller 1 Either disable timer output in TIM2_CCER or disable remap with TIM2_OR4 Select SPI with SC1_MODE Select master with SC1_SPICR Select alternate output function with GPIO_PBCFGL7:4SC1SDAI/OTWI data of Serial Controller 1 Either disable timer output

36、 in TIM2_CCER, or disable remap with TIM2_OR4 Select TWI with SC1_MODE Select alternate open-drain output function with GPIO_PBCFGL7:415模块引脚编号QFN48封装引脚编号引脚信号方向引脚说明SC1TXDOUART transmit data of Serial Controller 1 Either disable timer output in TIM2_CCER or disable remap with TIM2_OR4 Se

37、lect UART with SC1_MODE Select alternate output function with GPIO_PBCFGL7:4TIM2_CH1OTimer 2 channel 1 output Enable remap with TIM2_OR4 Enable timer output in TIM2_CCER Select alternate output function with GPIO_PACFGL7:4ITimer 2 channel 1 input. Disable remap with TIM2_OR4.1436PB0I/ODigital I/OVRE

38、FAnalog OADC reference output. Enable analog function with GPIO_PBCFGL3:0.VREFAnalog IADC reference input. Enable analog function with GPIO_PBCFGL3:0. Enable reference output with an ST system function.IRQAIExternal interrupt source A.TRACECLKOSynchronous CPU trace clock. Enable trace interface in A

39、RM core. Select alternate output function with GPIO_PBCFGL3:0.TIM1CLKITimer 1 external clock input.TIM2MSKITimer 2 external clock mask input.1512NRESETIActive low chip reset (internal pull-up)1631PB2I/ODigital I/OSC1MISOISPI master data in of Serial Controller 1 Select SPI with SC1_MODE Select maste

40、r with SC1_SPICRSC1MOSIISPI slave data in of Serial Controller 1 Select SPI with SC1_MODE Select slave with SC1_SPICRSC1SCLI/OTWI clock of Serial Controller 1 Either disable timer output in TIM2_CCER, or disable remap with TIM2_OR5 Select TWI with SC1_MODE Select alternate open-drain output function

41、 with GPIO_PBCFGL11:8SC1RXDIUART receive data of Serial Controller 1 Select UART with SC1_MODETIM2_CH2OTimer 2 channel 2 output Enable remap with TIM2_OR5 Enable timer output in TIM2_CCER Select alternate output 16模块引脚编号QFN48封装引脚编号引脚信号方向引脚说明with GPIO_PBCFGL11:8ITimer 2 channel

42、2 input. Enable remap with TIM2_OR5.17GND-Ground18GND-Ground1932SWCLKI/OSerial Wire clock input/output with debugger Selected when in Serial Wire mode (see JTMS description, Pin 35)JTCKIJTAG clock input from debugger Selected when in JTAG mode (default mode, see JTMS description, Pin 35) Internal pu

43、ll-down is enabled2033PC2I/ODigital I/O Enable with GPIO_DBGCFG5JTDOOJTAG data out to debugger Selected when in JTAG mode (default mode, see JTMS description, Pin 35)SWOOSerial Wire Output asynchronous trace output to debugger Select asynchronous trace interface in ARM core Enable trace interface in

44、 ARM core Select alternate output function with GPIO_PCCFGL11:8 Enable Serial Wire mode (see JTMS description, Pin 35) Internal pull-up is enabled2134PC3I/ODigital I/O Either Enable with GPIO_DBGCFG5, or enable Serial Wire mode (see JTMS description)JTDIIJTAG data in from debugger Selected when in J

45、TAG mode (default mode, see JTMS description, Pin 35) Internal pull-up is enabled2235PC4I/ODigital I/O Enable with GPIO_DBGCFG5JTMSIJTAG mode select from debugger Selected when in JTAG mode (default mode) JTAG mode is enabled after power-up or by forcing NRST low Select Serial Wire mode using the AR

46、M-defined protocol through a debugger Internal pull-up is enabledSWDIOI/OSerial Wire bidirectional data to/from debugger Enable Serial Wire mode (see JTMS description) Select Serial Wire mode using the ARM-defined protocol through a debugger Internal pull-up is 17模块引脚编号QFN48封装引脚

47、编号引脚信号方向引脚说明2340PC0I/O High currentDigital I/O Either enable with GPIO_DBGCFG5, or enable Serial Wire mode (see JTMS description, Pin 35) and disable TRACEDATA1JRSTIJTAG reset input from debugger Selected when in JTAG mode (default mode, see JTMS description) and TRACEDATA1 is disabled Internal pull

48、-up is enabledIRQD (1)IDefault external interrupt source DTRACEDAT A1OSynchronous CPU trace data bit 1 Select 2- or 4-wire synchronous trace interface in ARM core Enable trace interface in ARM core Select alternate output function with GPIO_PCCFGL3:02441PB7I/O High currentDigital I/OADC2AnalogADC In

49、put 2 Enable analog function with GPIO_PBCFGH15:12IRQC (1)IDefault external interrupt source CTIM1_CH2OTimer 1 channel 2 output Enable timer output in TIM1_CCER Select alternate output function with GPIO_PBCFGH15:12ITimer1channel2input(Cannotbe remapped)2542PB6I/O High currentDigital I/OADC1AnalogADC Input 1 Enable analog function with GPIO_PBCFGH11:8IRQBIExternal interrupt sou