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1、TPS3895, TPS3896 TPS3897, TPS3898SBVS172 JULY 2011Single-Channel, Adjustable Supervisory Circuit in Ultra-Small PackageCheck for Samples: TPS3895, TPS3896, TPS3897, TPS3898FEATURESDESCRIPTIONThe TPS3895, TPS3896, TPS3897, and TPS3898devices (TPS389x) are a family of very small supervisory

2、circuits that monitor voltage greater than500 mV with a 0.25% (typical) threshold accuracy and has capacitor-adjustable, delay-time flexibility. The TPS389x family also has a logic enable pin (ENABLE or ENABLE) to power on/off the output.Very Small SON (1.5 mm 1 mm) Package Adjustable Threshold down

3、 to 500 mV Threshold Accuracy: 1.0% Over Temperature Capacitor-Adjustable Delay TimeLow Quiescent Current: 6 A (typ) External Enable InputOpen-Drain/Push-Pull Output Options Temperature Range: 40C to +125CWith the TPS3895, for example, when the input voltage pin (SENSE) falls below the threshold, or

4、 if the enable pin (ENABLE) is low, then the output pin (SENSE_OUT) goes low. When SENSE rises above the threshold and ENABLE is high, then SENSE_OUT goes high after the capacitor-adjustable delay time elapses (A version only; for differences between the A and P versions, see Table 1). For truth tab

5、les, see Table 2 and Table 3.APPLICATIONSDSPs, Microcontrollers, and Microprocessors Notebook and Desktop ComputersPDAs and Handheld ProductsPortable and Battery-Powered Products FPGA and ASICTPS3895/TPS3897 DRY PACKAGE (TOP VIEW)ForTPS389xAversions,thereisacapacitor-adjustable delay from when the e

6、nable pinasserts to when the output pin asserts; this period is the same as the delay from SENSE to the output pin. The TPS389xP devices have a fixed propagation delay from when the enable pin asserts to when the output pin asserts.All devices operate from 1.8 V to 6.5 V and have a low quiescent cur

7、rent of 6 A with an open-drain output rated at 18 V. The TPS389x is available in an ultra-small SON package and is fully specified over the temperature range of TA = 40C to +125C.ENABLEVCCGNDCTSENSESENSE_OUTTPS3896/TPS3898 DRY PACKAGE (TOP VIEW)Table 1. FAMILY COMPARISONENABLEVCCGNDCTSENSESENSE_OUTP

8、lease be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.All trademarks are the property of their respective owners.PRODUCT PREVIEW in

9、formation concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice.Copyright 2011, Texas Instruments IncorporatedPRODUCT PREVIEW162534D

10、EVICEENABLEOUTPUTINPUT (SENSE) DELAYENABLE DELAYTPS3895AActive highActive high, push-pullCapacitor adjustableCapacitor adjustableTPS3895PActive highActive high, push-pullCapacitor adjustable150 nsTPS3896AActive lowActive low, push-pullCapacitor adjustableCapacitor adjustableTPS3896PActive lowActive

11、low, push-pullCapacitor adjustable150 nsTPS3897AActive highActive high, open-drainCapacitor adjustableCapacitor adjustableTPS3897PActive highActive high, open-drainCapacitor adjustable150 nsTPS3898AActive lowActive low, open-drainCapacitor adjustableCapacitor adjustableTPS3898PActive lowActive low,

12、open-drainCapacitor adjustable150 ns162534TPS3895, TPS3896 TPS3897, TPS3898SBVS172 JULY 2011This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation

13、procedures can cause damage.ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.ORDERING INFORMATION(

14、1)(1) For the most current package and ordering information see the Package Option Addendum at the end of this document, or visit the device product folder at .ABSOLUTE MAXIMUM RATINGS(1)Over operating free-air temperature range (unless otherwise noted).(1) Stresses beyond those listed und

15、er absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for

16、 extended periods my affect device reliability.(2) All voltages are with respect to network ground terminal.(3) ESD testing is performed according to the respective JESD22 JEDEC standard.THERMAL INFORMATION(1) For more information about traditional and new thermal metrics, see the IC Package Thermal

17、 Metrics application report, SPRA953.2Copyright 2011, Texas Instruments IncorporatedPRODUCT PREVIEWTHERMAL METRIC(1)TPS389xUNITSDRY (SON)6 PINSJAJunction-to-ambient thermal resistance293.8C/WJCtopJunction-to-case (top) thermal resistance165.1JBJunction-to-board thermal resistance160.8JTJunction-to-t

18、op characterization parameter27.3JBJunction-to-board characterization parameter65.8JCbotJunction-to-case (bottom) thermal resistance65.8VALUEUNITMINMAXVoltage(2)VCC0.37VCT0.3VCC + 0.3VENABLE, SENSE, SENSE_OUT (push-pull)0.37VSENSE_OUT (open-drain)0.320VCurrentSENSE_OUT10mATemperatureOperating juncti

19、on, TJ40+125CStorage, Tstg65+150CElectrostatic discharge rating(3)Human body model (HBM)2kVCharge device model (CDM)500VPRODUCTDESCRIPTIONTPS389wxyyyzw is output configuration (see Table 1)x is different delay from enable pin (see Table 1)yyy is package designatorz is package quantityTPS3895, TPS389

20、6 TPS3897, TPS3898SBVS172 JULY 2011ELECTRICAL CHARACTERISTICSOver the operating temperature range of TJ = 40C to +125C, and 1.7 V VCC 15 s/V. Below V(POR), the output cannot be determined.Specified by design.When VCC falls below the UVLO threshold, the output de-asserts (SENSE_OUT goes low

21、, SENSE_OUT goes high). Below V(POR), the output cannot be determined.(2)(3)(4)During power on, VCC must exceed 1.7 V for at least 50 s (plus propagation delay time, tpd(r) before output is in the correct state.3Copyright 2011, Texas Instruments IncorporatedPRODUCT PREVIEWPARAMETERTEST CONDITIONSMIN

22、TYPMAXUNITVCCSupply voltage rangeTJ = 40C to +125C1.76.5VTJ = 0C to +85C1.656.5VV(POR)Power-on reset voltage(1)VOL (max) = 0.2 V , IOL = 15 A0.8VICCSupply current (into VCC pin)VCC = 3.3 V , no load612AVCC = 6.5 V , no load712AVIT+Positive-going input threshold voltageV(SENSE) rising0.4950.50.505VVh

23、ysHysteresis voltageV(SENSE) falling5mVI(SENSE) Input current(2)V(SENSE) = 0 V or VCC1515nAI(CT)CT pin charge current260310360nAV(CT)CT pin comparator threshold voltage1.1801.2381.299VR(CT)CT pin pull-down resistance200VILLow-level input voltage (ENABLE pin)0.4VVIHHigh-level input voltage (ENABLE pi

24、n)1.4VUVLOUndervoltage lockout(3)VCC falling1.41.7VIlkgLeakage currentENABLE = VCC or GND100100nAVOLLow-level output voltageVCC 1.2 V, ISINK = 90 A (TPS3895/7 only)0.3VVCC 2.25 V, ISINK = 0.5 mA0.3VVCC 4.5 V, ISINK = 1 mA0.4VVOHHigh-level output voltage (push-pull)VCC 2.25 V, ISOURCE = 0.5 mA0.8VCCV

25、VCC 4.5 V, ISOURCE = 1 mA0.8VCCVIlkg(OD)Open-drain output leakage currentV(SENSE_OUT) high impedance = 18 V1Atpd(r)SENSE (rising) to SENSE_OUT propagation delayV(SENSE) rising, C(CT) = no capacitor40sV(SENSE) rising, C(CT) = 0.047 F190mstpd(f)SENSE (falling) to SENSE_OUT propagation delayV(SENSE) fa

26、lling16sStartup delay(4)50stwENABLE pin minimum pulse duration1sENABLE pin glitch rejection100nstd(off)ENABLE to SENSE_OUT delay time (output disabled)Output enabled to output disabled delay150nstd(P)ENABLE to SENSE_OUT delay time (P version)Output disabled to output enabled delay (P version)150nstd

27、(A)ENABLE to SENSE_OUT delay time (A version)Output disabled to output enabled delay (A version), C(CT) = no capacitor20sOutput disabled to output enabled delay (A version), C(CT) = 0.047 F190msTPS3895, TPS3896 TPS3897, TPS3898SBVS172 JULY 2011TIMING DIAGRAMVCCENABLEVIT+VIT+SENSEVIT+ - Vhy

28、sSENSE_OUTtpd(r) td(A)Figure 1. TPS3895A/TPS3897A TimingTable 2. TPS3895/7 Truth TableTable 3. TPS3896/8 Truth TableTYPICAL APPLICATION3.3 VVCCVCCENABLESENSE_OUTENABLER1TPS3895CPUSENSECTR2GNDGNDFigure 2. TPS3895 Typical Application4Copyright 2011, Texas Instruments IncorporatedPRODUCT PREVIEWCONDITI

29、ONOUTPUTSTATUSENABLE = low, SENSE VIT+SENSE_OUT = highOutput not assertedENABLE = high, SENSE VIT+SENSE_OUT = highOutput not assertedENABLE = low, SENSE VIT+SENSE_OUT = lowOutput asserted after delayCONDITIONOUTPUTSTATUSENABLE = high, SENSE VIT+SENSE_OUT = lowOutput not assertedENABLE = low, SENSE V

30、IT+SENSE_OUT = lowOutput not assertedENABLE = high, SENSE VIT+SENSE_OUT = highOutput asserted after delaytpd(r)TPS3895, TPS3896 TPS3897, TPS3898SBVS172 JULY 2011PIN CONFIGURATIONSDRY PACKAGE: TPS3895, TPS3897 USON-6(TOP VIEW)DRY PACKAGE: TPS3896, TPS3898 USON-6(TOP VIEW)ENABLEGND SENSEVCC

31、CTSENSE_OUTENABLEVCCGNDCTSENSESENSE_OUTPIN ASSIGNMENTS5Copyright 2011, Texas Instruments IncorporatedPRODUCT PREVIEWPIN NAMETPS3895/ TPS3897TPS3896/ TPS3898DESCRIPTIONCT55Capacitor-adjustable delay. The CT pin offers a user-adjustable delay time. Connecting this pin to a ground referenced capacitor

32、sets the delay time for SENSE rising above 0.5 V to SENSE_OUT (and ENABLE to SENSE_OUT for A version devices).tpd =(C(CT) 4.0 106) + 40 s.ENABLE1Active high input. Driving ENABLE low immediately makes SENSE_OUT go low, independent of V(SENSE). With V(SENSE) already above VIT+, drive ENABLE high to m

33、ake SENSE_OUT go high after the capacitor-adjustable delay time (A version) or the fixed time (P version).ENABLE1Active low input. Driving ENABLE high immediately makes SENSE_OUT go high, independent of V(SENSE). With V(SENSE) already above VIT+, drive ENABLE low to make SENSE_OUT go low after the c

34、apacitor-adjustable delay time (A version) or the fixed time (P version).GND22GroundSENSE33This pin is connected to the voltage that is monitored with the use of external resistor. The output asserts after the capacitor-adjustable delay time when V(SENSE) rises above 0.5 V and ENABLE is asserted. Th

35、e output de-asserts immediately when V(SENSE) falls below VIT+ Vhys.SENSE_OUT4SENSE_OUT is an open-drain/push-pull output that is immediately driven low after V(SENSE) falls below VIT+ Vhys or the ENABLE input is low. SENSE_OUT goes high after the capacitor-adjustable delay time when V(SENSE) is gre

36、ater than VIT+ and the ENABLE pin is high.SENSE_OUT4SENSE_OUT is an open-drain/push-pull output that is immediately driven high after V(SENSE) falls below VIT+ Vhys or the ENABLE input is high. SENSE_OUT goes low after the capacitor-adjustable delay time when V(SENSE) is greater than VIT+ and the EN

37、ABLE pin is low.VCC66Supply voltage input. Connect a 1.7-V to 6.5-V supply to VCC to power the device. It is good analog design practice to place a 0.1-F ceramic capacitor close to this pin.162534162534PACKAGE OPTION ADDENDUM24-Jan-2013PACKAGING INFORMATION(1) The marketing status values a

38、re defined as follows:ACTIVE: Product device recommended for new designs.Addendum-Page 1Orderable DeviceStatus(1)Package TypePackage DrawingPinsPackage QtyEco Plan(2)Lead/Ball FinishMSL Peak Temp(3)Op Temp (C)Top-Side Markings(4)SamplesTPS3895ADRYRACTIVESONDRY65000Green (RoHS & no Sb/Br)CU NIPDAULev

39、el-1-260C-UNLIM-40 to 125UNTPS3895ADRYTACTIVESONDRY6250Green (RoHS & no Sb/Br)CU NIPDAULevel-1-260C-UNLIM-40 to 125UNTPS3895PDRYRACTIVESONDRY65000Green (RoHS & no Sb/Br)CU NIPDAULevel-1-260C-UNLIM-40 to 125UOTPS3895PDRYTACTIVESONDRY6250Green (RoHS & no Sb/Br)CU NIPDAULevel-1-260C-UNLIM-40 to 125UOTP

40、S3896ADRYRACTIVESONDRY65000Green (RoHS & no Sb/Br)CU NIPDAULevel-1-260C-UNLIM-40 to 125UJTPS3896ADRYTACTIVESONDRY6250Green (RoHS & no Sb/Br)CU NIPDAULevel-1-260C-UNLIM-40 to 125UJTPS3896PDRYRACTIVESONDRY65000Green (RoHS & no Sb/Br)CU NIPDAULevel-1-260C-UNLIM-40 to 125UKTPS3896PDRYTACTIVESONDRY6250Gr

41、een (RoHS & no Sb/Br)CU NIPDAULevel-1-260C-UNLIM-40 to 125UKTPS3897ADRYRACTIVESONDRY65000Green (RoHS & no Sb/Br)CU NIPDAULevel-1-260C-UNLIM-40 to 125ULTPS3897ADRYTACTIVESONDRY6250Green (RoHS & no Sb/Br)CU NIPDAULevel-1-260C-UNLIM-40 to 125ULTPS3897PDRYRACTIVESONDRY65000Green (RoHS & no Sb/Br)CU NIPD

42、AULevel-1-260C-UNLIM-40 to 125UMTPS3897PDRYTACTIVESONDRY6250Green (RoHS & no Sb/Br)CU NIPDAULevel-1-260C-UNLIM-40 to 125UMTPS3898ADRYRACTIVESONDRY65000Green (RoHS & no Sb/Br)CU NIPDAULevel-1-260C-UNLIM-40 to 125UHTPS3898ADRYTACTIVESONDRY6250Green (RoHS & no Sb/Br)CU NIPDAULevel-1-260C-UNLIM-40 to 12

43、5UHTPS3898PDRYRACTIVESONDRY65000Green (RoHS & no Sb/Br)CU NIPDAULevel-1-260C-UNLIM-40 to 125UITPS3898PDRYTACTIVESONDRY6250Green (RoHS & no Sb/Br)CU NIPDAULevel-1-260C-UNLIM-40 to 125UIPACKAGE OPTION ADDENDUM24-Jan-2013LIFEBUY: TI has announced that the device will be discontinued, and a li

44、fetime-buy period is in effect.NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.PREVIEW: Device has been announced but is not in production. Samples may or may not be available.OBSOLETE: TI has dis

45、continued the production of the device.(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check /productcontent for the latest availability information and additional product content details.TBD: The Pb-F

46、ree/Green conversion plan has not been defined.Pb-Free (RoHS): TIs terms Lead-Free or Pb-Free mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designe

47、d to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the

48、 die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.Green (RoHS & no Sb/Br): TI defines Green to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous ma

49、terial)(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.(4) Only one of markings shown within the brackets will appear on the physical device.Important Information and Disclaimer:The information provided

50、 on this page represents TIs knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemic