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1、ABCDE11CompalConfidentialG470/G570 DIS+UMA+Muxless M/B Schematics DocumentIntel Sandy Bridge Processor with DDRIII + Cougar Point PCH ATI Robson/PX3.0,PX4.0222010-07-22LA-6758PREV:0.13344Compal Electronics, Inc.SecurityClassificationCompal Secret Data2010/07/122012/07/11Issued DateTitllleDeciphered

2、DateCover PageTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIASLizeDocument NumberRev 0.1AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom

3、LA-6758PDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.Date:Tuesday, August 17, 2010Sheet1of57ABCDEABCDECompal confidentialFile Name

4、 : G470/G570WAMDRobson XTIntel Sandy BridgeSocket-rPGA988B 37.5mm*37.5mm11PCI-E x16DDR3 SO-DIMM *2BANK 0, 1, 2, 3WDual ChannelHDMIWWDDR3 1066MHz(1.5V) DDR3 1333MHz(1.5V)Connector100MHz2.7GT/sFDI *8DMI *4CRTWConnectorIntel Cougar PointFCBGA 98925mm*25mmAZALIALVDSWConnector22LANAthrosWPCI-E x1 *6USB2.

5、0 *14Camera Conn.AR8151-B(GLAN) AR8152-B(10/100)BlueTooth Conn.WSATA *6WMini Card Slot *1WRJ-45WSPIROMBIOSConnectorCard Reader ReltekRTS5139 SDXC/MMC/MS/xDLPC BUSPCI ExpressMini Card Slot *1WPCI-E(WLAN)ECENE KB930 ENE KB9012USB(WiMAX)33WLANWiMAX WUSB2.0 *1(Right)USB2.0 *2(Left)Thermal SensorSPI ROMe

6、SATA+USB(Left)WWEMC1403WSATA3 HDD(Port 0/Port 1 support SATA3)WSATA ODDW44Compal Electronics, Inc.SecurityClassificationCompal Secret Data2010/07/122012/07/11Issued DateTitllleDeciphered DateBlock DiagramTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CO

7、NTAINS CONFIDENTIASLizeDocument NumberRev 0.1AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D CustomLA-6758PDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT

8、CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.Date:Tuesday, August 17, 2010Sheet2of57ABCDEAudio Codec ConexantCX20671W2 channel speakerInt. MICAudio JacksInt. KBDTouch PadUp to 8GBVRAM 64*16 DDR3*4For 14(Page 4x) LS6753P PWR/BLS6751P

9、 CardReader/BFor 15(Page 4x+1) LS6753P PWR/BLS6751P CardReader/B LS6754P LED/B LS6755P ODD/BABCDEVoltage Rails11BOARD IDTableBoard ID / SKU ID Table for AD channel22USB Port TableBOM Structure TableAddressEC SM Bus1 addressEC SM Bus2 addressDeviceSmart BatteryDeviceThermal Sensor EMC1403-2 Thermal S

10、ensor EMC1402-1Address1001_101xb100_1100 b0001 011X bPCH SM Bus addressDeviceDDR DIMM0DDR DIMM2Address1001 000Xb1001 010Xb33SMBUS Control Table44Compal Electronics, Inc.SecurityClassificationCompal Secret Data2010/07/122012/07/11Issued DateTitllleDeciphered DateNotes ListTHIS SHEET OF ENGINEERING DR

11、AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIASLizeDocument NumberLA-6758PRev 0.1AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D BDEPARTMENT EXCEPT AS AUTHORIZED BY COMP

12、AL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.Date:Tuesday, August 17, 2010Sheet3of57ABCDESOURCEVGABATTKE930SODIMMWLAN WWANThermal SensorPCHSMB_EC_CK1 SMB_EC_DA1KB930+3VA

13、LWXV+3VALWXXXXXSMB_EC_CK2 SMB_EC_DA2KB930+3VALWXXXXXXV+3VSSMBCLK SMBDATAPCH+3VALWXXXV+3VSV+3VSXXSML0CLK SML0DATAPCH+3VALWXXXXXXXSML1CLK SML1DATAPCH+3VALWV+3VSXV+3VSXXV+3VSXBTO ItemBOM StructureUMA onlyPXMuxlessPX+VGADiscrete OnlyDIS+VGAPX3.0 only, not for BACOPX3BACOBACOCOMMON HDMIHDMIUMA HDMIUMA_HD

14、MIDiscrete HDMIVGA_HDMIeSATAESATABlue ToothBTConnectorME45 LEVEL4510/100 LAN8152GIGA LANGIGACamearaCMOSUnpopUSB 2.0USB 1.1Port3 External USB PortEHCI1UHCI00USB/B (Right Side)1USB Port (Left Side)UHCI12USB Port (Left Side)3USB Port (Left Side)UHCI245CameraUHCI367EHCI2UHCI48Mini Card(WLAN)9UHCI51011Ca

15、rd ReaderUHCI61213Blue ToothVcc3.3V +/- 5%Ra/Rc/Re100K +/- 5%Board IDRb / Rd / RfVAD_BID minVAD_BID typVAD_BID max000 V0 V0 VEVT18.2K +/- 5%0.216 V0.250 V0.289 VDVT218K +/- 5%0.436 V0.503 V0.538 VPVT333K +/- 5%0.712 V0.819 V0.875 VMP456K +/- 5%1.036 V1.185 V1.264 V5100K +/- 5%1.453 V1.650 V1.759 V62

16、00K +/- 5%1.935 V2.200 V2.341 V7NC2.500 V3.300 V3.300 VBoard IDPCB Revision00.11234567power planeState+B+5VALW+3VALW+1.5V+5VS+3VS+1.5VS+VCCP+CPU_CORE+VGA_CORE+GFX_CORE+1.8VS+0.75VS+1.05VSS0OOOOS3OOOXS5 S4/ACOOXXS5 S4/ Battery onlyOXXXS5 S4/AC & Battery dont existXXXXSIGNALSTATESLP_S1#SLP_S3#SLP_S4#S

17、LP_S5#+VALW+V+VSClockFull ONHIGHHIGHHIGHHIGHONONONONS1(Power On Suspend)LOWHIGHHIGHHIGHONONONLOWS3 (Suspend to RAM)LOWLOWHIGHHIGHONONOFFOFFS4 (Suspend to Disk)LOWLOWLOWHIGHONOFFOFFOFFS5 (Soft OFF)LOWLOWLOWLOWONOFFOFFOFF54321tK Power-Up/Down Sequence1. All the ASIC supplies must fully reach their res

18、pective nominal voltages within 20 ms of the start of the ramp-up sequence, though a shorter ramp-up duration is preferred.2. VDDR3 should ramp-up before or simultaneously with VDDC.3. For LVDS, DPx_VDD10 should ramp-up before DPx_VDD18 and the PCIe Reference clock should begin before DPx_VDD18. For

19、 power-down, DPx_VDD18 should ramp-down before DPx_VDD10.4. The external pull-ups on the DDC/AUX signals (if applicable) should ramp-up before or after both VDDC and VDD_CT have ramped up.5. VDDC and VDD_CT should not ramp-up simultaneously. (e.g., VDDC should reach 90% before VDD_CT starts to ramp-

20、up (or vice versa).)W W/K Z Wh , E W W/K Wh W K& , Wh W KEK W W/K , E Wh K W W/K Wh W K& , Wh W KE ,DDVDDR3(3.3VGS)Note: Do not drive any IOs before VDDR3 is ramped up.PCIE_VDDC(1.0V) VDDR1(1.5VGS) CCVDDC/VDDCI(1.12V) VDD_CT(1.8V) PE_GPIO0PE_ENPERSTbBIF_VDDCPE_GPIO1REFCLKs tsBBMOSStraps ResetsStraps

21、 ValidssRegulatorGlobal ASIC Resets KZT4+16clockPWRGOODAACompal Electronics, Inc.Compal Secret DataSecurity Classification2010/07/122012/07/11TitleIssued DateDeciphered DatedGPU Block DiagramDocument NumberTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND

22、CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D SizeRev 0.1BLA-6758PDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY

23、THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.Date:Tuesday, August 17, 2010Sheet4of5754321K PX_modesSI4800RegulatorWhs SI4800sWhWh W WsWy K DD W / Ws W / s Z ds s Zs d W Ws W& s W Ws W s s s / s Y s / WWs DWs WssK&KEW& s W s Ws WssK&KEW / ssK&KEs Z ss

24、K&KE/&s s K sK&KE W / ss ZsK&K&s s /sK&K&54321DD+1.05VSR124.9_0402_1%JCPU1APEG_COMPJ22PEG_ICOMPI PEG_ICOMPO PEG_RCOMPOJ21 H22B2716 DMI_CRX_PTX_N0DMI_RX#0 DMI_RX#1 DMI_RX#2 DMI_RX#3B2516 DMI_CRX_PTX_N116 DMI_CRX_PTX_N216 DMI_CRX_PTX_N316 DMI_CRX_PTX_P016 DMI_CRX_PTX_P116 DMI_CRX_PTX_P216 DMI_CRX_PTX_

25、P3A25PCIE_CRX_GTX_N0.15 23PCIE_CRX_GTX_N15B24K33PEG_RX#0 PEG_RX#1 PEG_RX#2 PEG_RX#3 PEG_RX#4 PEG_RX#5 PEG_RX#6 PEG_RX#7 PEG_RX#8 PEG_RX#9 PEG_RX#10 PEG_RX#11 PEG_RX#12 PEG_RX#13 PEG_RX#14 PEG_RX#15PEG_RX0 PEG_RX1 PEG_RX2 PEG_RX3 PEG_RX4 PEG_RX5 PEG_RX6 PEG_RX7 PEG_RX8 PEG_RX9 PEG_RX10 PEG_RX11 PEG_R

26、X12 PEG_RX13 PEG_RX14 PEG_RX15PEG_TX#0 PEG_TX#1 PEG_TX#2 PEG_TX#3 PEG_TX#4 PEG_TX#5 PEG_TX#6 PEG_TX#7 PEG_TX#8 PEG_TX#9 PEG_TX#10 PEG_TX#11 PEG_TX#12 PEG_TX#13 PEG_TX#14 PEG_TX#15M35PCIE_CRX_GTX_N14PCIE_CRX_GTX_N13B28L34DMI_RX0 DMI_RX1 DMI_RX2 DMI_RX3J35PCIE_CRX_GTX_N12 PCIE_CRX_GTX_N11B26A24J32H34P

27、CIE_CRX_GTX_N10B23PCIE_CRX_GTX_N9H31G33 PCIE_CRX_GTX_N8G2116 DMI_CTX_PRX_N016 DMI_CTX_PRX_N116 DMI_CTX_PRX_N216 DMI_CTX_PRX_N3DMI_TX#0 DMI_TX#1 DMI_TX#2 DMI_TX#3G30 PCIE_CRX_GTX_N7E22PCIE_CRX_GTX_N6F21F35PCIE_CRX_GTX_N5D21E34PCIE_CRX_GTX_N4E32D33 PCIE_CRX_GTX_N3G2216 DMI_CTX_PRX_P016 DMI_CTX_PRX_P11

28、6 DMI_CTX_PRX_P216 DMI_CTX_PRX_P3DMI_TX0 DMI_TX1 DMI_TX2 DMI_TX3D22D31 PCIE_CRX_GTX_N2CCF20PCIE_CRX_GTX_N1B33C21C32 PCIE_CRX_GTX_N0PCIE_CRX_GTX_P0.15 23J33 PCIE_CRX_GTX_P15PCIE_CRX_GTX_P14L35K34 PCIE_CRX_GTX_P13H35 PCIE_CRX_GTX_P12A2116 FDI_CTX_PRX_N016 FDI_CTX_PRX_N116 FDI_CTX_PRX_N2FDI0_TX#0 FDI0_

29、TX#1 FDI0_TX#2 FDI0_TX#3 FDI1_TX#0 FDI1_TX#1 FDI1_TX#2 FDI1_TX#3H32 PCIE_CRX_GTX_P11H19E19PCIE_CRX_GTX_P10G34F18G31 PCIE_CRX_GTX_P9 16 FDI_CTX_PRX_N316 FDI_CTX_PRX_N416 FDI_CTX_PRX_N516 FDI_CTX_PRX_N616 FDI_CTX_PRX_N7DISCRETE ONLYF33 PCIE_CRX_GTX_P8 B21F30 PCIE_CRX_GTX_P7 E35 PCIE_CRX_GTX_P6 E33 PCI

30、E_CRX_GTX_P5 F32 PCIE_CRX_GTX_P4 D34 PCIE_CRX_GTX_P3 E31 PCIE_CRX_GTX_P2 C33 PCIE_CRX_GTX_P1 B32 PCIE_CRX_GTX_P0 C20FDI_FSYNC01K_0402_5% 2 DIS1 R2D18E17FDI_FSYNC1DIS1 R3DIS1 R4FDI_INTA2216 FDI_CTX_PRX_P016 FDI_CTX_PRX_P116 FDI_CTX_PRX_P216 FDI_CTX_PRX_P316 FDI_CTX_PRX_P416 FDI_CTX_PRX_P516 FDI_CTX_P

31、RX_P616 FDI_CTX_PRX_P7FDI0_TX0 FDI0_TX1 FDI0_TX2 FDI0_TX3 FDI1_TX0 FDI1_TX1 FDI1_TX2 FDI1_TX3G19DIS1 R5FDI_LSYNC0E20R01G18PCIE_CTX_GRX_N0.15 23PCIE_CTX_GRX_C_N15 PCIE_CTX_GRX_C_N142 0.1U_0402_10V6K PCIE_CTX_GRX_N15DIS1 R6FDI_LSYNC1B20M29C1VGA12 0.1U_0402_10V6K PCIE_CTX_GRX_N14C19M32C2VGA1PCIE_CTX_GR

32、X_C_N13 PCIE_CTX_GRX_C_N12C3 C4VGA1 VGA12 0.1U_0402_10V6K PCIE_CTX_GRX_N13D19M31 L32 L29 K31 K28 J30 J28 H29 G27 E29 F27 D28 F26 E25M282 0.1U_0402_10V6K PCIE_CTX_GRX_N12F17PCIE_CTX_GRX_C_N11 PCIE_CTX_GRX_C_N102 0.1U_0402_10V6K PCIE_CTX_GRX_N11C5VGA1FDI_FSYNC0 FDI_FSYNC12 0.1U_0402_10V6K PCIE_CTX_GRX

33、_N10J1816 FDI_FSYNC0C6 C7VGA1FDI0_FSYNC FDI1_FSYNC+1.05VS2 0.1U_0402_10V6K PCIE_CTX_GRX_N9J17PCIE_CTX_GRX_C_N9 PCIE_CTX_GRX_C_N8VGA1 VGA116 FDI_FSYNC12 0.1U_0402_10V6K PCIE_CTX_GRX_N8C8FDI_INT2 0.1U_0402_10V6K PCIE_CTX_GRX_N7H20PCIE_CTX_GRX_C_N7 PCIE_CTX_GRX_C_N616 FDI_INTC9VGA1FDI_INT2 0.1U_0402_10

34、V6K PCIE_CTX_GRX_N6C10 VGA1FDI_LSYNC0 FDI_LSYNC12 0.1U_0402_10V6K PCIE_CTX_GRX_N5J1916 FDI_LSYNC016 FDI_LSYNC1PCIE_CTX_GRX_C_N5 PCIE_CTX_GRX_C_N4C11 VGA1 C12 VGA1FDI0_LSYNC FDI1_LSYNC2 0.1U_0402_10V6K PCIE_CTX_GRX_N4R724.9_0402_1%H17B2 0.1U_0402_10V6K PCIE_CTX_GRX_N3BPCIE_CTX_GRX_C_N3 PCIE_CTX_GRX_C

35、_N2C13 VGA12 0.1U_0402_10V6K PCIE_CTX_GRX_N2C14 VGA1C15 VGA12 0.1U_0402_10V6K PCIE_CTX_GRX_N12 0.1U_0402_10V6K PCIE_CTX_GRX_N0PCIE_CTX_GRX_C_N1 PCIE_CTX_GRX_C_N0C16 VGA1EDP_COMPA18eDP_COMPIO eDP_ICOMPO eDP_HPDPCIE_CTX_GRX_P0.15 23PCIE_CTX_GRX_C_P15 PCIE_CTX_GRX_C_P14C17VGA12 0.1U_0402_10V6K PCIE_CTX

36、_GRX_P15 A17PEG_TX0 PEG_TX1 PEG_TX2 PEG_TX3 PEG_TX4 PEG_TX5 PEG_TX6 PEG_TX7 PEG_TX8 PEG_TX9 PEG_TX10 PEG_TX11 PEG_TX12 PEG_TX13 PEG_TX14 PEG_TX15eDP_HPD2 0.1U_0402_10V6K PCIE_CTX_GRX_P14B16M33C18VGA1M30 PCIE_CTX_GRX_C_P13C19 VGA12 0.1U_0402_10V6K PCIE_CTX_GRX_P132 0.1U_0402_10V6K PCIE_CTX_GRX_P12PCI

37、E_CTX_GRX_C_P12C20 VGA1L31PCIE_CTX_GRX_C_P11 PCIE_CTX_GRX_C_P102 0.1U_0402_10V6K PCIE_CTX_GRX_P11C15 D15L28 K30 K27 J29 J27 H28 G28 E28 F28 D27C21 VGA1eDP_AUX eDP_AUX#2 0.1U_0402_10V6K PCIE_CTX_GRX_P10C22VGA12 0.1U_0402_10V6KPCIE_CTX_GRX_P8PCIE_CTX_GRX_P9PCIE_CTX_GRX_C_P9 PCIE_CTX_GRX_C_P8C23 VGA1 C

38、24 VGA12 0.1U_0402_10V6KPCIE_CTX_GRX_P72 0.1U_0402_10V6KPCIE_CTX_GRX_P6C17 F16 C16 G15PCIE_CTX_GRX_C_P7 PCIE_CTX_GRX_C_P6C25 VGA1eDP_TX0 eDP_TX1 eDP_TX2 eDP_TX32 0.1U_0402_10V6KPCIE_CTX_GRX_P5C26 VGA1 C27 VGA12 0.1U_0402_10V6KPCIE_CTX_GRX_P4PCIE_CTX_GRX_C_P5 PCIE_CTX_GRX_C_P42 0.1U_0402_10V6KPCIE_CT

39、X_GRX_P3C28 VGA12 0.1U_0402_10V6KPCIE_CTX_GRX_P2PCIE_CTX_GRX_C_P3 PCIE_CTX_GRX_C_P2C29 VGA12 0.1U_0402_10V6KPCIE_CTX_GRX_P1C18 E16 D16 F15C30 VGA1eDP_TX#0 eDP_TX#1 eDP_TX#2 eDP_TX#32 0.1U_0402_10V6KPCIE_CTX_GRX_P0PCIE_CTX_GRX_C_P1C31 VGA1E26PCIE_CTX_GRX_C_P02 0.1U_0402_10V6KD25C32 VGA1Sandy Briidge_

40、rPGA_Rev1p0 MEAACompal Electronics, Inc.SecurityClassificationCompal Secret Data2010/07/122012/07/11Issued DateTitllleDeciphered DatePROCESSOR(1/7) DMI,FDI,PEGTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIASLizeDocument NumberRev 0.1

41、AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF RC&uDstomLA-6758PDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY TH

42、IRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.Date:Tuesday, August 17, 2010Sheet5of57543212 1eDPIntel(R) FDIDMIPCIEXPRESS* - GRAPHICS2 1eDP_COMPIO and ICOMPO signals should be shorted near balls and routed with typical impedance 25 mohms1K_0402_5% 2 1K_0402_5% 2 1K_0402_5% 2 1K_

43、0402_5% 2 PEG Static Lane Reversal - CFG2 is for the 16xCFG21: Normal Operation; Lane # definition matches socket pin map definition* 0:Lane ReversedPEG_ICOMPI and RCOMPO signals should be shorted and routedwith - max length = 500 mils - typical impedance = 43 mohmsPEG_ICOMPO signals should be route

44、d with - max length = 500 mils- typical impedance = 14.5 mohms54321JCPU1BDDR10 0_0402_5%DG1.0CLK_CPU_DMI_R CLK_CPU_DMII#_RA2812CLK_CPU_DMI 15BCLK BCLK#C26A27R111218 H_SNB_IVB#PROC_SELECT#CLK_CPU_DMI# 150_0402_5%AN34SKTOCC#A16R12211K_0402_5%1K_0402_5%DG1.0DPLL_REF_CLK DPLL_REF_CLK#R13A152 1+1.05VS+1.

45、05VScloss to EC 250750milsH_CATERR#AL33CATERR#R9 62_0402_5%R140_0402_5% 12H_PECI_ISOH_DRAMRST#AN33R819,40 H_PECIH_DRAMRST# 7PECISM_DRAMRST#R15 56_0402_5%H_PROCHOT#H_PROCHOT#_RSM_RCOMP0 SM_RCOMP1R161 140_0402_1%12AL32AK1240 H_PROCHOT#PROCHOT#SM_RCOMP0A5R172 DDR3 Compensation SignalsSM_RCOMP1 SM_RCOMP2R19 0_0402_5% 12 H_THEMTRIP#_R AN32SM_RCOMP2R18A4219 H_THRMTRIP#THERMTRIP#XDP_PRDY# XDP_PREQ#AP29PRDY# PREQ#AP27AR26 XDP_TCKR22 0_0402_5%TCK TMS TRST#TDI TDOCXDP_TMSCAR27H_PM_SYNC_R

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