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附录二外文翻译STRUCTUREANDFUNCTIONOFTHEMCS51SERIESSTRUCTUREANDFUNCTIONOFTHEMCS51SERIESONECHIPCOMPUTERISANAMEOFAPIECEOFONECHIPCOMPUTERSERIESWHICHINTELCOMPANYPRODUCESTHISCOMPANYINTRODUCED8TOPGRADEONECHIPCOMPUTERSOFMCS51SERIESIN1980AFTERINTRODUCING8ONECHIPCOMPUTERSOFMCS48SERIESIN1976ITBELONGTOALOTOFKINDSTHISLINEOFONECHIPCOMPUTERTHECHIPSHAVE,SUCHAS8051,8031,8751,80C51BH,80C31BH,ETC,THEIRBASICCOMPOSITION,BASICPERFORMANCEANDINSTRUCTIONSYSTEMAREALLTHESAME8051DAILYREPRESENTATIVES51SERIALONECHIPCOMPUTERSANONECHIPCOMPUTERSYSTEMISMADEUPOFSEVERALFOLLOWINGPARTS1ONEMICROPROCESSOROF8CPU2ATSLICEDATAMEMORYRAM128B/256B,ITUSENOTDEPOSITTINGNOTCANREADING/DATATHATWRITE,SUCHASRESULTNOTMIDDLEOFOPERATION,FINALRESULTANDDATAWANTEDTOSHOW,ETC3PROCEDUREMEMORYROM/EPROM4KB/8KB,ISUSEDTOPRESERVETHEPROCEDURE,SOMEINITIALDATAANDFORMINSLICEBUTDOESNOTTAKEROM/EPROMWITHINSOMEONECHIPCOMPUTERS,SUCHAS8031,8032,80C,ETC4FOUR8RUNSIDEBYSIDEI/OINTERFACEP0FOURP3,EACHMOUTHCANUSEASINTRODUCTION,MAYUSEASEXPORTINGTOO5TWOTIMER/COUNTER,EACHTIMER/COUNTERMAYSETUPANDCOUNTINTHEWAY,USEDTOCOUNTTOTHEEXTERNALINCIDENT,CANSETUPINTOATIMINGWAYTOO,ANDCANACCORDINGTOCOUNTORRESULTOFTIMINGREALIZETHECONTROLOFTHECOMPUTER6FIVECUTOFFCUTTINGOFFTHECONTROLSYSTEMOFTHESOURCE7ONEALLDUPLEXINGSERIALI/OMOUTHOFUARTUNIVERSALASYNCHRONOUSRECEIVER/TRANSMITTERUART,ISITREALIZEONECHIPCOMPUTERORONECHIPCOMPUTERANDSERIALCOMMUNICATIONOFCOMPUTERTOUSEFOR8STRETCHOSCILLATORANDCLOCKPRODUCECIRCUIT,QUARTZCRYSTALFINELYTUNEELECTRICCAPACITYNEEDOUTERALLOWOSCILLATIONFREQUENCYAS12MEGAHERTASNOWATMOSTEVERYTHEABOVEMENTIONEDPARTWASJOINEDTHROUGHTHEINSIDEDATABUSAMONGTHEM,CPUISACOREOFTHEONECHIPCOMPUTER,ITISTHECONTROLOFTHECOMPUTERANDCOMMANDCENTRE,MADEUPOFSUCHPARTSASARITHMETICUNITANDCONTROLLER,ETCTHEARITHMETICUNITCANCARRYON8PERSONSOFARITHMETICOPERATIONANDUNITALUOFLOGICOPERATIONWHILEINCLUDINGONE,THE1STORINGDEVICETEMPORARILIESOF8,STORINGDEVICE2TEMPORARILY,8SACCUMULATIONDEVICEACC,REGISTERBANDPROCEDURESTATEREGISTERPSW,ETCPERSONWHOACCUMULATEACCCOUNTBY2INPUTENDSENTEREDOFCHECKINGETCTEMPORARILYASONEOPERATIONOFTEN,COMEFROMPERSONWHOSTORE1OPERATIONISITISITMAKEOPERATIONTOGOONTOCOUNTTEMPORARILY,OPERATIONRESULTANDLOOPBACKACCWITHANOTHERONEINADDITION,ACCISOFTENREGARDEDASTHETRANSFERSTATIONOFDATATRANSMISSIONON8051INSIDETHESAMEASGENERALMICROPROCESSOR,ITISTHEBUSIESTREGISTERHELPREMEMBERINGTHATAGREEINGWITHAEXPRESSESINTHEORDERTHECONTROLLERINCLUDESTHEPROCEDURECOUNTER,THEORDERISDEPOSITTED,THEORDERDECIPHER,THEOSCILLATORANDTIMINGCIRCUIT,ETCTHEPROCEDURECOUNTERISMADEUPOFCOUNTEROF8FORTWO,AMOUNTSTO16ITISABYTEADDRESSCOUNTEROFTHEPROCEDUREINFACT,THECONTENTISTHENEXTIATHATWILLCARRIEDOUTINPCTHECONTENTWHICHCHANGESITCANCHANGETHEDIRECTIONTHATTHEPROCEDURECARRIESOUTSHAKETHECIRCUITIN8051ONECHIPCOMPUTERS,ONLYNEEDOUTERQUARTZCRYSTALANDFREQUENCYTOFINELYTUNETHEELECTRICCAPACITY,ITSFREQUENCYRANGEISITS12MHZOF12MHZTHISPULSESIGNAL,AS8051BASICBEATSOFWORKING,NAMELYTHEMINIMUMUNITOFTIME8051ISTHESAMEASOTHERCOMPUTERS,THEWORKINHARMONYUNDERTHECONTROLOFTHEBASICBEAT,JUSTLIKEANORCHESTRAACCORDINGTOTHEBEATPLAYTHATISCOMMANDEDTHEREAREROMPROCEDUREMEMORY,CANONLYREADANDRAMIN8051SLICESDATAMEMORY,CANISITCANWRITETWOTOREAD,THEYHAVEEACHINDEPENDENTMEMORYADDRESSSPACE,DISPOSEWAYTOBETHESAMEWITHGENERALMEMORYOFCOMPUTERPROCEDURE8051MEMORYAND8751SLICEPROCEDUREMEMORYCAPACITY4KB,ADDRESSBEGINFROM0000H,USEDFORPRESERVINGTHEPROCEDUREANDFORMCONSTANTDATA805187518031OFMEMORYDATAMEMORY128B,ADDRESSFALSE00FH,USEFORMIDDLERESULTTODEPOSITOPERATION,THEDATAARESTOREDTEMPORARILYANDTHEDATAAREBUFFEREDETCINRAMOFTHIS128B,THEREISUNITOF32BYTESESTHATCANBEAPPOINTEDASTHEJOBREGISTER,THISANDGENERALMICROPROCESSORISDIFFERENT,8051SLICERAMANDJOBREGISTERRANKONEFORMATIONTHESAMETOARRANGETHELOCATIONITISNOTVERYTHESAMETHATTHEMEMORYOFMCS51SERIESONECHIPCOMPUTERANDGENERALCOMPUTERDISPOSESTHEWAYINADDITIONGENERALCOMPUTERFORFIRSTADDRESSSPACE,ROMANDRAMCANARRANGEINDIFFERENTSPACEWITHINTHERANGEOFTHISADDRESSATWILL,NAMELYTHEADDRESSESOFROMANDRAM,WITHDISTRIBUTINGDIFFERENTADDRESSSPACEINAFORMATIONWHILEVISITINGTHEMEMORY,CORRESPONDINGANDONLYANADDRESSMEMORYUNIT,CANROM,ITCANBERAMTOO,ANDBYVISITINGTHEORDERSIMILARLYTHISKINDOFMEMORYSTRUCTUREISCALLEDTHESTRUCTUREOFPRINCETON8051MEMORIESAREDIVIDEDINTOPROCEDUREMEMORYSPACEANDDATAMEMORYSPACEONTHEPHYSICSSTRUCTURE,THEREAREFOURMEMORYSPACESINALLTHEPROCEDURESTORESINONEANDDATAMEMORYSPACEOUTSIDEDATAMEMORYANDONEINPROCEDUREMEMORYSPACEANDONEOUTSIDEONE,THESTRUCTUREFORMSOFTHISKINDOFPROCEDUREDEVICEANDDATAMEMORYSEPARATEDFORMDATAMEMORY,CALLEDHARVARDSTRUCTUREBUTUSETHEANGLEFROMUSERS,8051MEMORYADDRESSSPACEISDIVIDEDINTOTHREEKINDS1INTHESLICE,ARRANGEBLOCKSOFFFFFH,0000HOFLOCATION,INUNISONOUTSIDETHESLICEUSE16ADDRESSES2THEDATAMEMORYADDRESSSPACEOUTSIDEONEOF64KB,THEADDRESSISARRANGEDFROM0000H64KBFFFFHWITH16ADDRESSESTOOTOTHELOCATION3DATAMEMORYADDRESSSPACEOF256BUSE8ADDRESSESTHREEABOVEMENTIONEDMEMORYSPACEADDRESSESOVERLAP,FORDISTINGUISHINGANDDESIGNINGTHEORDERSYMBOLOFDIFFERENTDATATRANSMISSIONINTHEINSTRUCTIONSYSTEMOF8051CPUVISITSLICE,ROMORDERSPENDMOVC,VISITBLOCKRAMORDERUSESMOVXOUTSIDETHESLICE,RAMORDERUSESMOVTOVISITINSLICE8051ONECHIPCOMPUTERHAVEFOUR8WALKABREASTI/OPORT,CALLP0,P1,P2ANDP3EACHPORTIS8ACCURATETWOWAYMOUTHS,ACCOUNTSFOR32PINSALTOGETHEREVERYONEI/OLINECANBEUSEDASINTRODUCTIONANDEXPORTEDINDEPENDENTLYEACHPORTINCLUDESALATCHNAMELYSPECIALFUNCTIONREGISTER,ONEEXPORTSTHEDRIVERANDAINTRODUCTIONBUFFERMAKEDATACANLATCHWHENOUTPUTTING,DATACANBUFFERWHENMAKINGINTRODUCTION,BUTFOURFUNCTIONOFPASSWAYTHESESELFSAMEEXPANDAMONGTHESYSTEMOFMEMORYOUTSIDEHAVINGSLICE,FOURPORTTHESEMAYSERVEASACCURATETWOWAYMOUTHOFI/OINCOMMONUSEEXPANDAMONGTHESYSTEMOFMEMORYOUTSIDEHAVINGSLICE,P2MOUTHSEEHIGH8ADDRESSOFF;P0MOUTHISATWOWAYBUS,SENDTHEINTRODUCTIONOF8LOWADDRESSESANDDATA/EXPORTINTIMESHARINGTHECIRCUITOF8051ONECHIPCOMPUTERSANDFOURI/OPORTSISVERYINGENIOUSINDESIGNFAMILIARWITHI/OPORTLOGICALCIRCUIT,NOTONLYHELPTOUSEPORTSCORRECTLYANDRATIONALLY,ANDWILLINSPIRETODESIGNINGTHEPERIPHERALLOGICALCIRCUITOFONECHIPCOMPUTERTOSOMEEXTENTLOADABILITYANDINTERFACEOFPORTHAVECERTAINREQUIREMENT,BECAUSEOUTPUTGRADE,P0OFMOUTHANDP1ENDOUTPUT,P3OFMOUTHGRADEDIFFERENTATSTRUCTURE,SO,THELOADABILITYANDINTERFACEOFITSDOORDEMANDTOHAVENOTHINGINCOMMONWITHEACHOTHERP0MOUTHISDIFFERENTFROMOTHERMOUTHS,ITSOUTPUTGRADEDRAWSTHERESISTANCESUPREMLYWHENUSINGITASTHEMOUTHINCOMMONUSETOUSE,OUTPUTGRADEISITLEAKCIRCUITTOTURNON,ISITISITURGENMOSDRAWTHERESISTANCEONTAKINGTOBEOUTERWITHITWHILEINPUTTINGTOGOOUTTOFAILWHENBEINGUSEDASINTRODUCTION,SHOULDWRITE1TOALATCHFIRSTEVERYONEWITHP0MOUTHCANDRIVE8MODELLSTTLLOADTOEXPORTP1MOUTHISANACCURATETWOWAYMOUTHTOO,USEDASI/OINCOMMONUSEDIFFERENTFROMP0MOUTHOUTPUTOFCIRCUITITS,DRAWLOADRESISTANCELINKWITHPOWERONINSIDEHAVEINFACT,THERESISTANCEISTHATTWOEFFECTSAREINCHARGEOFFETANDTOGETHERONEFETISINCHARGEOFLOAD,ITSRESISTANCEISREGULARANOTHERONECANISITLEADTOWORKWITHCLOSEATTWOSTATE,MAKEITSPRESIDENTRESISTANCEVALUECHANGEAPPROXIMATE0ORGROUPVALUEHEAVYTWOSITUATIONVERYWHENITIS0THATTHERESISTANCEISAPPROXIMATE,CANDRAWTHEPINTOTHEHIGHLEVELFAST;WHENRESISTANCEVALUEISVERYLARGE,P1MOUTH,INORDERTOHINDERTHEINTRODUCTIONSTATEHIGHOUTPUTASP1MOUTHHIGHELECTRICITYATORDINARYTIMES,CANISITDRAWELECTRICCURRENTLOADTOOFFEROUTWARDS,DRAWTHERESISTANCEONNEEDNTANSWERANDTHENNINGHEREWHENTHEPORTISUSEDASINTRODUCTION,MUSTWRITEINTO1TOTHECORRESPONDINGLATCHFIRSTTOO,MAKEFETENDRELATIVELYABOUT20,000OHMSBECAUSEOFTHELOADRESISTANCEINSCENEANDBECAUSE40,000OHMS,WILLNOTEXERTANINFLUENCEONTHEDATATHATAREINPUTTHESTRUCTUREOFP2SOMEMOUTHISSIMILARTOP0MOUTH,THEREAREMUXSWITCHESISITSIMILARTOMOUTHPARTLYTOURGE,BUTMOUTHLARGEACONVERSIONCONTROLSSOMETHANP1P3MOUTHONEMULTIFUNCTIONALPORT,MOUTHGETTINGMANYTHANP1ITHAVEAND3DOORAND4BUFFERTWOPARTTHESE,MAKEHERBESIDESACCURATETWOWAYFUNCTIONWITHP1MOUTHJUST,CANALSOUSETHESECONDFUNCTIONOFEVERYPIN,ANDDOOR3FUNCTIONONESWITCHINFACT,ITDETERMINESTOBETOOUTPUTDATAOFLATCHTOOUTPUTSECONDSIGNALOFFUNCTIONACTASWAT1OCLOCK,OUTPUTQENDSIGNAL;ACTASQAT1OCLOCK,CANOUTPUTWLINESIGNALATTHETIMEOFPROGRAMMING,ITISTHATTHEFIRSTFUNCTIONISSTILLTHESECONDFUNCTIONBUTNEEDNTHAVESOFTWARETHATSETUPP3MOUTHINADVANCEITHARDWARENOTINSIDEISTHEAUTOMATICTOHAVETWOFUNCTIONOUTPUTTEDWHENCPUCARRIESONSFRANDSEEKSTHELOCATIONTHELOCATIONORTHEBYTETOVISITTOP3MOUTH/ATNOTLASTINGLINING,THEREAREINSIDEHARDWARELATCHQS1THEOPERATIONPRINCIPLEOFP3MOUTHISSIMILARTOP1MOUTHOUTPUTGRADE,P3OFMOUTH,P1OFP1,CONNECTWITHINSIDEHAVELOADRESISTANCEOFDRAWING,EVERYONEOFTHEYCANDRIVE4MODELLSTTLLOADTOOUTPUTASWHILEINPUTTINGTHEMOUTH,ANYTTLORNMOSCIRCUITCANDRIVEP1OF8051ONECHIPCOMPUTERSASP3MOUTHINANORMALWAYBECAUSEDRAWRESISTANCEONOUTPUTGRADEOFTHEMHAVE,CANOPENAWAYCOLLECTORTOOORDRAINSOURCERESISTANCEISITURGETOOPENAWAY,DONOTNEEDTOHAVETHERESISTANCEOFDRAWINGOUTERLYMOUTHSAREALLACCURATETWOWAYMOUTHSTOOWHENTHECONDUCTISINPUT,MUSTWRITETHECORRESPONDINGPORTLATCHWITH1FIRSTASTO80C51ONECHIPCOMPUTER,PORTCANONLYOFFERMILLIAMPEREOFOUTPUTELECTRICCURRENTS,ISITOUTPUTMOUTHGOWHENURGINGONEORDINARYBASINGOFTRANSISTORTOREGARDAS,SHOULDCONTACTARESISTANCEAMONGTHEPORTANDTRANSISTORBASE,INORDERTOTHEELECTRICITYWHILERESTRAININGTHEHIGHLEVELFROMEXPORTINGP1P3BEINGRESTOREDTOTHETHRONEISTHEOPERATIONOFINITIALIZINGOFANONECHIPCOMPUTERITSMAIN
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