Final Report - REU in Cognitive Communications最终报告- REU认知通信.docx

Sampling Mixer for Software Defined Radio Applications using 0.18m RF CMOS TechnologybyMatt Davis and Chris DavisA Final Report Submitted to the Principal Investigator ofNSF Research Experiences for Undergraduates: Cognitive CommunicationsVirginia Polytechnic Institute and State UniversityBradley Department of Electrical and Computer EngineeringPrincipal Investigator: Dr. Carl DietrichProject Mentors: Dr. Kwang-Jin Koh and Hedieh ElyasiJuly 2013iiiTable of ContentsAbstract11.Introduction22.Basics of Mixer43. Circuit Design84.Simulation Results105.Conclusion135.References14Table of FiguresFigure 1: Ideal SDR Architecture2Figure 2: Primary Functional Units of Receiver: High Level Diagram3Figure 3: Theoretical Output Frequency Spectrum of Mixer4Figure 4: Graphical Representation of 1 dB Compression Point5Figure 5: IIP3 Frequency Spectrum Graphical Theory6Figure 6: IIP3 and 1dB Compression Point Relationship7Figure 7: DSM Simplified Circuit Diagram8Figure 8: Frequency Spectrum: RF Input Power9Figure 9: Frequency Spectrum: IF Output Power9Figure 10: Simulation 1 dB Compression Point10Figure 11: Calculated IIP3 from Simulation10Figure 12: IIP3 Graphical Simulation Result11Table of TablesTable 1: Summary of DSM Simulation Results12AbstractA major aspect of cognitive radio (CR) includes the ability to dynamically adjust transmission frequency due to various changes in a devices operating environment. The basis of CR is built upon software-defined radio (SDR) technology. Sampling mixers provide frequency translation that aid in the analog-to-digital conversion process for SDR, as well as move analog-to-digital converters (ADC) closer to the antenna input; a major goal to achieve enhanced performance while maintaining low power consumption and low cost in software defined radios. In this project, a simple direct sampling mixer has been designed, simulated, and analyzed using 0.18um RF CMOS technology to meet frequency-adaptive carrierdemodulation demands. Proposed sampling mixer simulation results include noise figure (NF) of 15 dB, conversion gain of 20.5 dB, 1dB compression point -16.67 dBm, third-order intercept point (IIP3) of -5.81 dBm and power consumption of 3.66 mW.1.IntroductionSoftware-defined radio (SDR) serves as the current optimal solution to combat the rapid increase of multiple wireless communication standards and protocols that use several different modulation schemes, carrier frequencies, and channel bandwidths 1. Ultimately, software-defined radio wants to replace as many analog components and hardwired digital VLSI devices of the transceiver as possible with programmable devices 2. As a result, the SDR parameters including standards, protocols, and modulation schemes are all generated or defined by software. Two primary advantages that this implementation provides include flexibility and adaptability. Modern technological devices, i.e. mobile devices, consistently change transmission parameters based on available connections and data-specific transmission. Not only is the idea of flexibility self-evident given the need to dynamically adjust transmission parameters for different standards, also innovation and creation of new standards and protocols to further optimize wireless communication are easily integrated into SDR transceivers without overhead cost of custom hardware design, unit fabrication/packaging , and hardware installation/replacement. Ideally, SDR architecture would model a pure Software Radio (SR) consisting of an antenna to an analog-to-digital converter (ADC) that would sample the radio-frequency (RF) signal and provide digital representation of information that would be manipulated by software, as seen in Figure 1. Figure 1: Ideal SDR ArchitectureHowever, due to limitations of current technology, sufficient sampling cannot be achieved by the ADC to provide an accurate representation of high frequency RF information signals, high resolution ADC. Therefore, other functional units are required to achieve correct conversion from analog-to-digital domain. An important functional unit that aids in this conversion process includes a mixer. To provide context of a mixer in the transmission process, Figure 2 displays the major functional units characterized of a modern receiver.Figure 2: Primary Functional Units of Receiver: High Level DiagramA mixer provides necessary frequency translation of desired RF signal, to a lower intermediate-frequency (IF) signal that can be adequately converted to digital domain for SDR applications.A mixer architecture gaining wide notoriety in SDR applications include sampling mixers. Among different architectures of mixers, sampling mixer attracts attention of designers for SDR application because of it discrete output. Due to discrete time signal processing prior to digitization, ADC performance is relaxed. Essentially, sampling mixers use submicron CMOS technology to perform sampling and mixing through “ON/OFF” switches controlled by local oscillator at the gate of MOSFET (Figure 7). Major benefits of passive direct sampling architecture include re-configurability by adjustment of either sample/hold capacitors or input clock frequency, i.e. LO(local oscillator) and capability of mixing, filtering, and decimation for alleviating ADC requirements3.The input signal can be voltage or current domain. In this project we chose charge domain sampling mixer because of following reasons: We can achieve higher bandwidth compared to voltage domain because of capacitance value limitation. Since capacitor and on resistance of switch are behaving as low pass filter, the value of capacitor cannot be very high. Since we dont have limitation on capacitor value, we can increase it to get lower noise. Mixer switches does not need any DC current which results in low power consumption and low flicker noise.The focus of this paper surrounds the design, simulation, and analysis of a passive direct sampling mixer using 0.18m RF CMOS technology to meet the broadband frequency demodulation demands required to more closely realize the ideal SDR architecture explained before above. The following paper outlines the basic fundamental background theory surrounding mixer theory and modern mixer performance metrics, followed by a simplified circuit diagram of simulated DSM architecture, simulation results and analysis of proposed DSM, and concluding remarks regarding current design and future applicable methods to improve designed DSM performance.2.Basics of MixerAs mentioned earlier in his paper, the primary function of a mixer is to provide frequency translation; specifically in context with conducted research, frequency translation from the input RF signal to the output IF signal appropriate for analog-to-digital conversion process necessary for SDR applications in the physical layer of a radio receiver. Figure 3 expresses the theoretical output frequency spectrum of a mixer seen as a result from input signals RF and LO multiplication.Figure 3: Theoretical Output Frequency Spectrum of MixerVIFt=ARFcosRFt*ALOcosLOt=12ARFALOcosRF-LOt+cosRF+LOt (1)As a fundamental result applied to the multiplication of 2 cosine waveforms seen in equation (1), a mixer has outputs at both RF-LO and RF+LO frequencies.Modeling a radio receiver, the down converted signal (RF-LO) stands as the signal of interest with up-converted (RF+LO) signal being filtered out in a real-world implementation setting.Analyzing the output frequency spectrum in Figure 3, one can observe that the output power of the down converted signal holds a higher amplitude than input RF signal voltage/power. This observation serves to express an importance performance metric of the proposed conversion gain. As expressed before in Figure 2, there are multiple functional blocks the both the RF and IF information signals travel through before ADC. To keep context, RF signals typically are received in the W or potentially nW level, meaning that any attenuation from functional units could potentially harm the overall performance of the receiver by not providing an adequate information signal to be converted to the digital domain. Therefore, the overall gain of the mixer unit stands important in the overall process of a receiver relating the output IF voltage to the input RF voltage. The term “conversion” gain stems from the fact that the frequency seen at the output IF terminal potentially could be different from input RF terminal, not reflecting a true gain correspondence.Another performance metric for evaluating a mixer is Noise Figure (NF). Noise Figure serves as a way to measure the SNR degradation due to the noise added by the system 4. Equation 2 highlights the important parameters that define NF.NF=10log10(SNRinSNRout)=10log10(1Gm*NoutNin) dB (2)The lowest possible value NF that can be achieved is desired.Linearity among the input RF signal and output IF signal of designed DSM stands as a crucial metric in mixer performance-evaluation. The high level concept of linearity corresponds to how much input RF power the mixer can sustain until the operation and corresponding output IF is non-ideal/non-desirable. Due to the non-linear aspects of circuit elements, i.e. MOSFEETS, the transistors exhibit an input power threshold that compresses the output power of the circuit, resulting in undesired behavior and potential distortion of information signal. An important key term that describes this event includes 1 dB Compression Point. This point is defined as the input power at which the output power drops by 1dB from the predicted output power based on the small signal power gain. Figure 4 depicts a graphical representation of the 1dB Compression Point 5.Figure 4: Graphical Representation of 1 dB Compression PointFurther describing the figure above, the dotted line represents the ideal linear curve of the input-power to output-power behavior, where the solid non-linear curve exhibits actual output of system with respect to input power. Ultimately, the 1 dB Compression point can be thought of as the self-jamming effect where the output signal of the system under evaluation exhibits nonlinear behavior as a direct result of the circuit elements, when linear behavior is desired.Understanding the actual application of the sampling within an SDR receiver reveals another important key term that must be evaluated and considered within the proposed DSM. At any given point in time, numerous signals occupy the limited spectrum space, meaning that several other signals closely spaced to the desired signal are received and processed by the front end RF systems which may not be are desired signal and behave as an interference. Therefore, definition of the third-order intermodulation intercept point (IIP3) parameter provides more key insight and characterization of the non-linear behavior of the circuit. By applying an experiment labeled the two-tone test, IIP3 is measured and quantified. The two-tone test calls for applying two closely spaced frequency tones which have same amplitude into the input of the designed DSM as seen in Figure 5 below.LORF2RF12s2-s1s2Pout(dBm)2s1-s2s1Figure 5: IIP3 Frequency Spectrum Graphical TheoryIIP3dB=2+Pinput (3)Applying the basic fundamentals discussed earlier regarding mixer output, one can clearly see the expected output frequencies of s1=RF1-LO and s2=RF2-LO. However, due to the intermodulation distortion characteristics, third-order intermodulation tones (IM3) can be seen at frequencies 2s1-s2 and 2s2-s1. These signals fall within the frequency range that cannot be filtered out with added RF circuitry, therefore, having direct effect on the desired frequency of s1. Another way to find IIP3 is defined as the signal level at which the extrapolated output signal levels at s1 (or s2) and 2s1-s2 (or 2s2-s1) meet each other. Figure 6 displays the graphical representation of IIP3 in relation to the previous concept of 1dB compression point.Figure 6: IIP3 and 1dB Compression Point RelationshipUltimately, 3rd order intermodulation distortion corrupts the signal since it falls in the same frequency band as the signal of interest. IIP3 serves as a metric to characterize at which input power level this distortion will occur.3. Circuit DesignFigure 7 displays simple circuit of the proposed DSM with which simulations and quantitative analysis were conducted.Figure 7: DSM Simplified Circuit DiagramThe proposed DSM was designed using process technology 0.18m RF CMOS. Transconductance Amplifier (TA) is implemented as an inverter since it is simple, as well as giving a greater gain and acceptable noise figure by combining the gain of the NMOS transistor and the gain of the PMOS transistor, compared to single NMOS or PMOS. The TA gain is evaluated from the following equation:Gm=gmn+gmp (4)Once the signal passes through the TA, the signal is transferred from the voltage domain to the charge domain. The transfer of the signal from the voltage domain to the charge domain is important for the simple reasons of maintaining linearity in the circuit and broadband capabilities. Due to the filtering effects of the RC components within the circuit the charge domain retains its linearity over broad frequency range. Where as in the voltage domain the filtering effects cause the circuit to experience non-linearity, which limits the bandwidth of the circuit.The high conversion gain of the DSM is a desired result of the system. The conversion gain of the DSM is evaluated from the following equation: CGmixer=2*GmCLs (5) 4.Simulation ResultsFigure 8 shows the RF signal of -25 dBm at 600 MHz in the frequency domain while Figure 9 demonstrates the IF signal at -4 dBm at 125 MHz in the frequency domain. The specified power difference in dBm level in Figure 9 and Figure 8 reflects the conversion gain of the system.Figure 8: Frequency Spectrum: RF Input PowerFigure 9: Frequency Spectrum: IF Output PowerFigure 10 is a graphical representation of the 1-dB compression point of the system. As shown in the graph, the 1-dB compression point of the system is -16.77 dBm; although, the desired result was -12 dBm.Figure 10: Simulation 1 dB Compression PointIIP3dB=2+Pinput (6)Figure 11 is the frequency domain graph of the 2-tone test performed to calculate the IIP