电脑接口定义大全.doc

电脑接口定义大全（硬件技术资料精编） 于二零零八年十月五日100目 录AGP总线定义3ATA 44 接口5CGA-16色显示接口5DIMM DRAM 168线内存条6DIMM SDRAM 168线内存条12ECP-并行口定义17EGA-16 64色显示器接口18EISA总线定义18ESDI 接口22HDMI接口23IDE 接口33ISA 总线定义35Mac 苹果机视频到 VGA 显示器转接器38MDA-单色显示接口39Mitsumi CD-ROM 接口40Panasonic CD-ROM 接口42PCI总线定义43PCI-E接口定义50PCMCIA接口卡引脚定义53PS/2-键盘接口定义56PS/2-鼠标接口定义56PS/2 键盘口到普通键盘转接器56PS/2 鼠标口到串行鼠标转接器57RS-232-串行接口定义57RS-422-串行口定义59PC机-并行接口定义60PC机-键盘接口定义61PC机-游戏杆接口62SATA引脚定义63SCSI接口25针外置65SIMM 30线内存条66SIMM 72线内存条67SIMM ECC 72线内存条70SO DIMM 72线内存条73SO DIMM 144线内存条75Sony CD-ROM 接口79USB 总线定义81VESA总线定义81VGA-9针显示接口85VGA-15针显示接口85VGA/Vesa/DDC-显示接口868 软驱接口定义879针-9针(NullModem) 串行直连电缆889针-25针(NullModem) 串行直连电缆899/25针串行口定义899 针串行口到 25 针转换器9125针-25针(NullModem) 串行直连电缆91扩张IDE(ATA) 接口92内置SCSI卡接口(差分信号方式)93内置SCSI卡接口(单端信号方式)95普通键盘口到 PS/2 键盘转接器96外置SCSI高密接口(差分信号方式)97外置SCSI高密接口(单端信号方式)99外置SCSI接口(差分信号方式)100外置SCSI接口(单端信号方式)102以太网 10/100Base-T (RJ45)接口103以太网 100Base-T4 (RJ45)接口104游戏杆+MIDI 接口定义104软驱接口105串行口到 PS/2 鼠标转接器106AGP总线定义 AGP 是 Accelerated Graphics Port，是 Intel 推出的一种 3D 图形标准接口，它能够提供四倍于 PCI 的效率，AGP2X 的传输速率达到 533MB。有关 AGP 的说明可以在 Intel 的网站上找到。 引脚定义PinB面A面1Spare12V25.0VSpare35.0VReserved4USB+USB-5GroundGround6INTB#INTA#7ClockRST#8REQ#GNT#9Vcc3.3VVcc3.3V10ST0ST111ST2Reserved12RBF#PIPE#13GroundGround14SpareSpare15SBA0SBA116Vcc3.3VVcc3.3V17SBA2SBA318SB_STBReserved19GroundGround20SBA4SBA521SBA6SBA722KeyKey23KeyKey24KeyKey25KeyKey26Address31Address3027Address29Address2828Vcc3.3VVcc3.3V29Address27Address2630Address25Address2431GroundGround32AD_STB1Reserved33Address23C/BE3#34Vddq3.3Vddq3.335Address21Address2236Address19Address2037GroundGround38Address17Address1839C/BE2#Address1640Vddq3.3Vddq3.341IRDY#FRAME#4243GroundGround4445Vcc3.3VVcc3.3V46DEVSEL#TRDY#47Vddq3.3STOP#48Perr#Spare49GroundGround50SERR#PAR51C/BE1#Address1552Vddq3.3Vddq3.353Address14Address1354Address12Address1155GroundGround56Address10Address957Address8C/BE0#58Vddq3.3Vddq3.359AD_STB0Reserved60Address7Address661GroundGround62Address5Address463Address3Address264Vddq3.3Vddq3.365Address1Address066SMB0SMB1ATA 44 接口 ATA 是 AT bus Attachment 的缩写，由 Conner, Seagate 和 Western Digital 公司开发，是新版的 IDE 接口，ATA 44 接口是 ATA 接口再加上电源等线，主要用于便携式计算机用 2.5 硬盘，在设备和主板侧的外观为 44 脚插针：ATA 44 电缆外观为：引脚定义ATA 44 接口的 1-40 脚的定义同 ATA，41-44 的定义为：PinNameDirDescription41+5VL+5 VDC (Logic)42+5VM+5 VDC (Motor)43GNDGround44/TYPEType (0=ATA)CGA-16色显示接口CGA 是 Color Graphics Adapter 的缩写，信号类型为 TTL，最多能显示 16 色，显示卡端的接口为 9 针母插座：显示器连线端的接口为 9 针公插头：引脚定义PinNameDescription1GNDGround2GNDGround3RRed4GGreen5BBlue6IIntensity7RESReserved8HSYNCHorizontal Sync9VSYNCVertical SyncDIMM DRAM 168线内存条 DIMM 是 Dual Inline Memory Module (双列直插)的缩写 引脚定义正面，左方： PinNon-Parity?Parity?72 ECC?80 ECC?Description1VSSVSSVSSVSSGround2DQ0DQ0DQ0DQ0Data 03DQ1DQ1DQ1DQ1Data 14DQ2DQ2DQ2DQ2Data 25DQ3DQ3DQ3DQ3Data 36VCCVCCVCCVCC+5 VDC or +3.3 VDC7DQ4DQ4DQ4DQ4Data 48DQ5DQ5DQ5DQ5Data 59DQ6DQ6DQ6DQ6Data 610DQ7DQ7DQ7DQ7Data 711DQ8DQ8DQ8DQ8Data 812VSSVSSVSSVSSGround13DQ9DQ9DQ9DQ9Data 914DQ10DQ10DQ10DQ10Data 1015DQ11DQ11DQ11DQ11Data 1116DQ12DQ12DQ12DQ12Data 1217DQ13DQ13DQ13DQ13Data 1318VCCVCCVCCVCC+5 VDC or +3.3 VDC19DQ14DQ14DQ14DQ14Data 1420DQ15DQ15DQ15DQ15Data 1521n/cCB0CB0CB0Parity/Check Bit Input/Output 022n/cCB1CB1CB1Parity/Check Bit Input/Output 123VSSVSSVSSVSSGround24n/cn/cn/cCB8Parity/Check Bit Input/Output 825n/cn/cn/cCB9Parity/Check Bit Input/Output 926VCCVCCVCCVCC+5 VDC or +3.3 VDC27/WE0/WE0/WE0/WE0Read/Write Input28/CAS0/CAS0/CAS0/CAS0Column Address Strobe 029/CAS1/CAS1/CAS1/CAS1Column Address Strobe 130/RAS0/RAS0/RAS0/RAS0Row Address Strobe 031/OE0/OE0/OE0/OE0Output Enable32VSSVSSVSSVSSGround33A0A0A0A0Address 034A2A2A2A2Address 235A4A4A4A4Address 436A6A6A6A6Address 637A8A8A8A8Address 838A10A10A10A10Address 1039A12A12A12A12Address 1240VCCVCCVCCVCC+5 VDC or +3.3 VDC41VCCVCCVCCVCC+5 VDC or +3.3 VDC42DUDUDUDUDont Use正面，右方： PinNon-Parity?Parity?72 ECC?80 ECC?Description43VSSVSSVSSVSSGround44/OE2/OE2/OE2/OE245/RAS2/RAS2/RAS2/RAS2Row Address Strobe 246/CAS2/CAS2/CAS2/CAS2Column Address Strobe 247/CAS3/CAS3/CAS3/CAS3Column Address Strobe 348/WE2/WE2/WE2/WE2Read/Write Input49VCCVCCVCCVCC+5 VDC or +3.3 VDC50n/cn/cn/cCB10Parity/Check Bit Input/Output 1051n/cn/cn/cCB11Parity/Check Bit Input/Output 1152n/cCB2CB2CB2Parity/Check Bit Input/Output 253n/cCB3CB3CB3Parity/Check Bit Input/Output 354VSSVSSVSSVSSGround55DQ16DQ16DQ16DQ16Data 1656DQ17DQ17DQ17DQ17Data 1757DQ18DQ18DQ18DQ18Data 1858DQ19DQ19DQ19DQ19Data 1959VCCVCCVCCVCC+5 VDC or +3.3 VDC60DQ20DQ20DQ20DQ20Data 2061n/cn/cn/cn/cNot connected62DUDUDUDUDont Use63n/cn/cn/cn/cNot connected64VSSVSSVSSVSSGround65DQ21DQ21DQ21DQ21Data 2166DQ22DQ22DQ22DQ22Data 2267DQ23DQ23DQ23DQ23Data 2368VSSVSSVSSVSSGround69DQ24DQ24DQ24DQ24Data 2470DQ25DQ25DQ25DQ25Data 2571DQ26DQ26DQ26DQ26Data 2672DQ27DQ27DQ27DQ27Data 2773VCCVCCVCCVCC+5 VDC or +3.3 VDC74DQ28DQ28DQ28DQ28Data 2875DQ29DQ29DQ29DQ29Data 2976DQ30DQ30DQ30DQ30Data 3077DQ31DQ31DQ31DQ31Data 3178VSSVSSVSSVSSGround79n/cn/cn/cn/cNot connected80n/cn/cn/cn/cNot connected81n/cn/cn/cn/cNot connected82SDASDASDASDASerial Data83SCLSCLSCLSCLSerial Clock84VCCVCCVCCVCC+5 VDC or +3.3 VDC反面，左方： PinNon-Parity?Parity?72 ECC?80 ECC?Description85VSSVSSVSSVSSGround86DQ32DQ32DQ32DQ32Data 3287DQ33DQ33DQ33DQ33Data 3388DQ34DQ34DQ34DQ34Data 3489DQ35DQ35DQ35DQ35Data 3590VCCVCCVCCVCC+5 VDC or +3.3 VDC91DQ36DQ36DQ36DQ36Data 3692DQ37DQ37DQ37DQ37Data 3793DQ38DQ38DQ38DQ38Data 3894DQ39DQ39DQ39DQ39Data 3995DQ40DQ40DQ40DQ40Data 4096VSSVSSVSSVSSGround97DQ41DQ41DQ41DQ41Data 4198DQ42DQ42DQ42DQ42Data 4299DQ43DQ43DQ43DQ43Data 43100DQ44DQ44DQ44DQ44Data 44101DQ45DQ45DQ45DQ45Data 45102VCCVCCVCCVCC+5 VDC or +3.3 VDC103DQ46DQ46DQ46DQ46Data 46104DQ47DQ47DQ47DQ47Data 47105n/cCB4CB4CB4Parity/Check Bit Input/Output 4106n/cCB5CB5CB5Parity/Check Bit Input/Output 5107VSSVSSVSSVSSGround108n/cn/cn/cCB12Parity/Check Bit Input/Output 12109n/cn/cn/cCB13Parity/Check Bit Input/Output 13110VCCVCCVCCVCC+5 VDC or +3.3 VDC111DUDUDUDUDont Use112/CAS4/CAS4/CAS4/CAS4Column Address Strobe 4113/CAS5/CAS5/CAS5/CAS5Column Address Strobe 5114/RAS1/RAS1/RAS1/RAS1Row Address Strobe 1115DUDUDUDUDont Use116VSSVSSVSSVSSGround117A1A1A1A1Address 1118A3A3A3A3Address 3119A5A5A5A5Address 5120A7A7A7A7Address 7121A9A9A9A9Address 9122A11A11A11A11Address 11123A13A13A13A13Address 13124VCCVCCVCCVCC+5 VDC or +3.3 VDC125DUDUDUDUDont Use126DUDUDUDUDont Use反面，右方： PinNon-Parity?Parity?72 ECC?80 ECC?Description127VSSVSSVSSVSSGround128DUDUDUDUDont Use129/RAS3/RAS3/RAS3/RAS3Column Address Strobe 3130/CAS6/CAS6/CAS6/CAS6Column Address Strobe 6131/CAS7/CAS7/CAS7/CAS7Column Address Strobe 7132DUDUDUDUDont Use133VCCVCCVCCVCC+5 VDC or +3.3 VDC134n/cn/cn/cCB14Parity/Check Bit Input/Output 14135n/cn/cn/cCB15Parity/Check Bit Input/Output 15136n/cCB6CB6CB6Parity/Check Bit Input/Output 6137n/cCB7CB7CB7Parity/Check Bit Input/Output 7138VSSVSSVSSVSSGround139DQ48DQ48DQ48DQ48Data 48140DQ49DQ49DQ49DQ49Data 49141DQ50DQ50DQ50DQ50Data 50142DQ51DQ51DQ51DQ51Data 51143VCCVCCVCCVCC+5 VDC or +3.3 VDC144DQ52DQ52DQ52DQ52Data 52145n/cn/cn/cn/cNot connected146DUDUDUDUDont Use147n/cn/cn/cn/cNot connected148VSSVSSVSSVSSGround149DQ53DQ53DQ53DQ53Data 53150DQ54DQ54DQ54DQ54Data 54151DQ55DQ55DQ55DQ55Data 55152VSSVSSVSSVSSGround153DQ56DQ56DQ56DQ56Data 56154DQ57DQ57DQ57DQ57Data 57155DQ58DQ58DQ58DQ58Data 58156DQ59DQ59DQ59DQ59Data 59157VCCVCCVCCVCC+5 VDC or +3.3 VDC158DQ60DQ60DQ60DQ60Data 60159DQ61DQ61DQ61DQ61Data 61160DQ62DQ62DQ62DQ62Data 62161DQ63DQ63DQ63DQ63Data 63162VSSVSSVSSVSSGround163CK3CK3CK3CK3164n/cn/cn/cn/cNot connected165SA0SA0SA0SA0Serial Address 0166SA1SA1SA1SA1Serial Address 1167SA2SA2SA2SA2Serial Address 2168VCCVCCVCCVCC+5 VDC or +3.3 VDCDIMM SDRAM 168线内存条 DIMM 是 Dual Inline Memory Module (双列直插)的缩写 引脚定义正面，左方： PinNon-Parity72 ECC?80 ECC?Description1VSSVSSVSSGround2DQ0DQ0DQ0Data 03DQ1DQ1DQ1Data 14DQ2DQ2DQ2Data 25DQ3DQ3DQ3Data 36VDDVDDVDD+5 VDC or +3.3 VDC7DQ4DQ4DQ4Data 48DQ5DQ5DQ5Data 59DQ6DQ6DQ6Data 610DQ7DQ7DQ7Data 711DQ8DQ8DQ8Data 812VSSVSSVSSGround13DQ9DQ9DQ9Data 914DQ10DQ10DQ10Data 1015DQ11DQ11DQ11Data 1116DQ12DQ12DQ12Data 1217DQ13DQ13DQ13Data 1318VDDVDDVDD+5 VDC or +3.3 VDC19DQ14DQ14DQ14Data 1420DQ15DQ15DQ15Data 1521n/cCB0CB0Parity/Check Bit Input/Output 022n/cCB1CB1Parity/Check Bit Input/Output 0123VSSVSSVSSGround24n/cn/cCB8Parity/Check Bit Input/Output 825n/cn/cCB9Parity/Check Bit Input/Output 926VDDVDDVDD+5 VDC or +3.3 VDC27/WE/WE/WERead/Write28DQMB0DQMB0DQMB0Byte Mask signal 029DQMB1DQMB1DQMB1Byte Mask signal 130/S0/S0/S0Chip Select 031DUDUDUDont Use32VSSVSSVSSGround33A0A0A0Address 034A2A2A2Address 235A4A4A4Address 436A6A6A6Address 637A8A8A8Address 838A10/APA10/APA10/APAddress 1039BA1BA1BA1Bank Address 140VDDVDDVDD+5 VDC or +3.3 VDC41VDDVDDVDD+5 VDC or +3.3 VDC42CK0CK0CK0Clock signal 0正面，右方： PinNon-Parity72 ECC?80 ECC?Description43VSSVSSVSSGround44DUDUDUDont Use45/S2/S2/S2Chip Select 246DQMB2DQMB2DQMB2Byte Mask signal 247DQMB3DQMB3DQMB3Byte Mask signal 348DUDUDUDont Use49VDDVDDVDD+5 VDC or +3.3 VDC50n/cn/cCB10Parity/Check Bit Input/Output 1051n/cn/cCB11Parity/Check Bit Input/Output 1152n/cCB2CB2Parity/Check Bit Input/Output 253n/cCB3CB3Parity/Check Bit Input/Output 354VSSVSSVSSGround55DQ16DQ16DQ16Data 1656DQ17DQ17DQ17Data 1757DQ18DQ18DQ18Data 1858DQ19DQ19DQ19Data 1959VDDVDDVDD+5 VDC or +3.3 VDC60DQ20DQ20DQ20Data 2061n/cn/cn/cNot connected62Vref,NCVref,NCVref,NC63CKE1CKE1CKE1Clock Enable Signal 164VSSVSSVSSGround65DQ21DQ21DQ21Data 2166DQ22DQ22DQ22Data 2267DQ23DQ23DQ23Data 2368VSSVSSVSSGround69DQ24DQ24DQ24Data 2470DQ25DQ25DQ25Data 2571DQ26DQ26DQ26Data 2672DQ27DQ27DQ27Data 2773VDDVDDVDD+5 VDC or +3.3 VDC74DQ28DQ28DQ28Data 2875DQ29DQ29DQ29Data 2976DQ30DQ30DQ30Data 3077DQ31DQ31DQ31Data 3178VSSVSSVSSGround79CK2CK2CK2Clock signal 280n/cn/cn/cNot connected81n/cn/cn/cNot connected82SDASDASDASerial Data83SCLSCLSCLSerial Clock84VDDVDDVDD+5 VDC or +3.3 VDC反面，左方： PinNon-Parity72 ECC?80 ECC?Description85VSSVSSVSSGround86DQ32DQ32DQ32Data 3287DQ33DQ33DQ33Data 3388DQ34DQ34DQ34Data 3489DQ35DQ35DQ35Data 3590VDDVDDVDD+5 VDC or +3.3 VDC91DQ36DQ36DQ36Data 3692DQ37DQ37DQ37Data 3793DQ38DQ38DQ38Data 3894DQ39DQ39DQ39Data 3995DQ40DQ40DQ40Data 4096VSSVSSVSSGround97DQ41DQ41DQ41Data 4198DQ42DQ42DQ42Data 4299DQ43DQ43DQ43Data 43100DQ44DQ44DQ44Data 44101DQ45DQ45DQ45Data 45102VDDVDDVDD+5 VDC or +3.3 VDC103DQ46DQ46DQ46Data 46104DQ47DQ47DQ47Data 47105n/cCB4CB4Parity/Check Bit Input/Output 4106n/cCB5CB5Parity/Check Bit Input/Output 5107VSSVSSVSSGround108n/cn/cCB12Parity/Check Bit Input/Output 12109n/cn/cCB13Parity/Check Bit Input/Output 13110VDDVDDVDD+5 VDC or +3.3 VDC111/CAS/CAS/CASColumn Address Strobe112DQMB4DQMB4DQMB4Byte Mask signal 4113DQMB5DQMB5DQMB5Byte Mask signal 5114/S1/S1/S1Chip Select 1115/RAS/RAS/RASRow Address Strobe116VSSVSSVSSGround117A1A1A1Address 1118A3A3A3Address 3119A5A5A5Address 5120A7A7A7Address 7121A9A9A9Address 9122BA0BA0BA0Bank Address 0123A11A11A11Address 11124VDDVDDVDD+5 VDC or +3.3 VDC125CK1CK1CK1Clock signal 1126A12A12A12Address 12反面，右方： PinNon-Parity72 ECC?80 ECC?Description127VSSVSSVSSGround128CKE0CKE0CKE0Clock Enable Signal 0129/S3/S3/S3Chip Select 3130DQMB6DQMB6DQMB6Byte Mask signal 6131DQMB7DQMB7DQMB7Byte Mask signal 7132A13A13A13Address 13133VDDVDDVDD+5 VDC or +3.3 VDC134n/cn/cCB14Parity/Check Bit Input/Output 14135n/cn/cCB15Parity/Check Bit Input/Output 15136n/cCB6CB6Parity/Check Bit Input/Output 6137n/cCB7CB7Parity/Check Bit Input/Output 7138VSSVSSVSSGround139DQ48DQ48DQ48Data 48140DQ49DQ49DQ49Data 49141DQ50DQ50DQ50Data 50142DQ51DQ51DQ51Data 51143VDDVDDVDD+5 VDC or +3.3 VDC144DQ52DQ52DQ52Data 52145n/cn/cn/cNot connected146Vref,NCVref,NCVref,NC147n/cn/cn/cNot connected148VSSVSSVSSGround149DQ53DQ53DQ53Data 53150DQ54DQ54DQ54Data 54151DQ55DQ55DQ55Data 55152VSSVSSVSSGround153DQ56DQ56DQ56Data 56154DQ57DQ57DQ57Data 57155DQ58DQ58DQ58Data 58156DQ59DQ59DQ59Data 59157VDDVDDVDD+5 VDC or +3.3 VDC158DQ60DQ60DQ60Data 60159DQ61DQ61DQ61Data 61160DQ62DQ62DQ62Data 62161DQ63DQ63DQ63Data 63162VSSVSSVSSGround163CK3CK3CK3Clock signal 3164n/cn/cn/cNot connected165SA0SA0SA0Serial address 0166SA1SA1SA1Serial address 1167SA2SA2SA2Serial address 2168VDDVDDVDD+5 VDC or +3.3 VDCECP-并行口定义ECP 是 Extended Capabilities Port 的缩写，外观同并行口，是 25 针母插座：引脚定义PinNameDirDescription1nStrobeStrobe2data0Address, Data or RLE Data Bit 03data1Address, Data or RLE Data Bit 14data2Address, Data or RLE Data Bit 25data3Address, Data or RLE Data Bit 36data4Address, Data or RLE Data Bit 47data5Address, Data or RLE Data Bit 58data6Address, Data or RLE Data Bit 69data7Address, Data or RLE Data Bit 710/nAckAcknowledge11BusyBusy12PErrorPaper End13SelectSelect14/nAutoFdAutofeed15/nFaultError16/nInitInitialize17/nSelectInSelect In18GNDSignal Ground19GNDSignal Ground20GNDSignal Ground21GNDSignal Ground22GNDSignal Ground23GNDSignal Ground24GNDSignal Ground25GNDSignal GroundEGA-16 64色显示器接口EGA 是 Enhanced Graphics Adapter 的缩写，信号类型为 TTL，颜色数为 16/64 色，显示卡端的接口为 9 针母插座：显示器连线端的接口为 9 针公插头：引脚定义PinNameDescription1GNDGround2SRSecondary Red3PRPrimary Red4PGPrimary Green5PBPrimary Blue6SG/ISecondary Green / Intensity7SBSecondary Blue8HHorizontal Sync9VVertical SyncEISA总