NT-QQ11对讲机装配说明.doc

KT0803M型号NT-QQ08调频数字对讲机 套件装配说明武汉莱斯特电子科技有限公司www. 一套件特点：随着数字信号处理(Digital Signal Processing，简称DSP)及高频技术的飞速发展，DSP已经在无线电广播得到应用，历经百年发展的无线电广播技术又一次技术革命已经到来。NT-QQ08型对讲机套件就是莱斯特公司基于最新的微电脑控制结合DSP技术设计的一款DSP数控调频对讲套件。这款套件主要是针对学生电子实训的特点而设计。基于DSP技术的数字收发机具有，高灵敏度、噪声低、抗干扰能力强、外围元件少、便于组装，免调试等优点，非常适合在校学生对单片微型计算机及DSP技术应用加深了解及学习使用。二.功能特点:u 采用单片微型计算机控制，液晶（LCD）数字显示；u 6个操控按键，按键电子调谐控制，接收和发射电台频率准确稳定性高；u 可步进选择工作频率，也可自动扫描电台；u 收发频率范围：65MHz108MHz；u 15段电子音量控制；三原理图：四装配图：五电路原理解析：NT-QQ08由主控MCU、显示、键盘、FM收音、发射电路、功放及系统电源五部分构成（如以下框图）。系统结构图收音线路是采用基于DSP技术的SOC芯片RDA5807SP, RDA5807SP内部可分模拟和数字部分，模拟部分包括支持FM频段的低噪声放大器（LNA）、自动增益控制器(AGC),正交镜像抑制混频器（MIXER）、可调增益放大器（PGA）、自动频率控制器（AFC）、高精度模数转换器（ADC）、高精度数模转换器(DAC)及电源用的LDO；数字部分包括音频处理DSP及数字接口。天线接收到空中的电台信号，首先由LNA将信号放大，并转为差分输出电压，这可以有效抑制芯片内部及PCB板上的噪声，提高接收灵敏度,混频器将LNA输出信号变频到低中频，同时实现对镜像的抑制，PGA将混频器输出的I、Q两路正交中频信号放大送给ADC,信号的增益由DSP动态控制，有效地降低了对ADC输入动态范围的要求，ADC采用的是Delta-Sigma带通过采样结构，它具有高精度低功耗特点，并对带外噪声有抑制作用，适用中低频信号处理；DSP对ADC输出信号解调后，将音频信号分别送给左右声道高精度DAC,DAC具有低通滤波的作用，将语音频带外的噪声进行衰减；最后音频信号通过内置功放将声音输出。收音IC结构图发射IC结构图六电器特性主控IC参数：CharcteristicsSymbolRatingsDC supply voltageV+ 5.5VInput voltage rangeVin- 0.5V to (V+) +0.5vOperating temperatureTo0 +70Storage temperatureTsto-40 +90n 主控IC直流特性 【VDD=3.0V，T=25】CharcteristicsSymbolLimitunitconditionMin.Typ.Max.Operating voltageVDD2.03.6VFor 2-batteryOperating currentIop400uARadio/LCD offStandby currentIst5uAVDD=3.0V, LCD OnInput High LevelVih2.0VVVDD=3.0VInput Low LevelVil0.8VVDD=3.0VOutput High IIoh-300uAVDD=3.0V, Voh=2.4VOutput Sink IIol600uAVDD=3.0V, Vol=0.8VLCD DrvieVDD2.83.0VVlcd=3.0V,Io=6.0 uAn 收音IC参数：CharcteristicsSymbolRatingsDC supply voltageV+ 5.5VInput voltage rangeVin- 0.5V to (V+) +0.5vOperating temperatureTo0 +70Storage temperatureTsto-40 +90n 收音IC直流特性 【VDD=3.0V，T=25】CharcteristicsSymbolLimitunitconditionMin.Typ.Max.Operating voltageVDD2.03.6VOperating currentIa25.0mAVDD=3.0VStandby currentIst100UaVDD=3.0VInput currentIin-10+10mAInput voltageVin-0.3VIO+0.3VLNA FM Input LevelVina-20DBmInput High LevelVih2.0VVInput Low LevelVil0.8Vn 收音IC接收特性 【VDD=3.0V，T=25】CharcteristicsSymbolLimitunitconditionMin.Typ.Max.FM Input FreqencyFin65.0108.0MHzSensitivity1,2,3Vrf1.21.5V EMF(S+N)/N=26dBLNA Input Resistance 7Rin150LNA Input Capacitance 7Cin246pFInput IP3IP3in80dBVAGCD=1AM Suppression1,2am40dBm=0.3Adjacent Channel SelectivityS20045dB200KHzLeft and Right Audio Frequency Output Voltage (Pins LOUT and ROUT)VAFL; VAFR110mVVolume =MaxMaximum Signal Plus Noise to Noise Ratio1,2,3,5(S+N)/N5460dBStereo Channel SeparationSCS35dBAudio Total Harmonic Distortion1,3,6THD0.30.5%Audio Output L/R ImbalanceAOI1dBAudio Output Loading ResistanceRL32Single-ended发射IC工作条件：ParameterSymbolOperating ConditionMinTypMaxUnits1.8V Analog Supply1VDDRelative to GNDVIO/Regulator SupplyIOVDDRelative to GND1.63.6VOperating TempTAAmbient Temperature02570CNote: 1. No external voltage should be applied to this supply. Decoupling cap should be used instead发射IC规格与性能IOVDD=1.63.6 V, Fin = 1 kHz)Parameter Symbol Test/OperatingCondition Min Nom Max UnitsFM Frequency Range Ftx Pin 16 76 108 MHzCurrent Consumption IVDD Pin 4 with PA (power13amp.) at default powermode (PA_bias = 0, RFGAIN3:0=1111)- 15 mAStandby Current Istand Pin 4 - 0.1 1 A Signal to Noise Ratio SNR Vin = 0.7 Vp-p, Gin = 0 - 60 - dB Total Harmonic Distortion THD Vin = 0.7 Vp-p, Gin = 0 - 0.3 % Left/Right Channel Balance BAL Vin = 0.7 Vp-p, Gin = 0 -0.2 - 0.2 dB Stereo Separation (LeftRight) SEP Vin = 0.7 Vp-p, Gin = 0 40 - dB Sub Carrier Rejection Ratio SCR Vin = 0.7 Vp-p, Gin = 0 - - 60 dB Input Swing1 Vin Single-ended input - 0.35 1.4 VRMS PGA Range for Audio Input Gin -12 0 12 dB PGA Gain Step for Audio Input Gstep 1 4 dBRequired Input Common-ModeVoltage when DC-coupledVcm Pin 5,7 0 0.8 1.8 VPower Supply Rejection2 PSRR IOVDD = 1.9 3.6 V 40 - - dB Ground Bounce Rejection2 GSRR IOVDD = 1.9 3.6 V 40 - - dB Input Resistance (Audio Input) Rin Pin 5, 7 120 150 180 k Input Capacitance (Audio Input) Cin Pin 5, 7 0.5 0.8 1.2 pF Audio Input Frequency Band Fin Pin 5, 7 20 - 15k Hz Transmit Level Vout 96 103 113 dBV Channel Step STEP - 50 kHz Pilot Deviation 7.5 15 kHz Audio Deviation 75 150 kHzFrequency Response Mono,-3dB, F=60kHz,50/75s pre-emphasis 30 15k HzPre-emphasis Time Constant TpreSIG_PROC = 1 - 50 - sSIG_PROC = 0 - 75 - sCrystal/External Clock CLK Input clock 7.6 MHz2-wire I2C Clock SCL Pin 14 0 100 400 kHzHigh Level Input Voltage VIH Pin 4, 8, 12, 14, 16 0.75 xIOVDD-VLow Level Input Voltage VIL Pin 4, 8, 12, 14, 16 - 0.25 - 0.25 xIOVDDNotes:1. Maximum is given on the condition of PGA gain = -12dB.2. Fin = 20 15k Hz.发射IC引脚定义Pin Index Name I/O Type Function2 XI Analog I/O Crystal input.3 XO Analog I/O Crystal input4 IOVDD Power 1.63.3V external logic IOVDD1, 5,11,15 GND Ground Can be shorted together and connectedground to ground 6 INL Analog Input Left channel audio input.7 INR Analog Input Right channel audio input.8 SW Digital Input Control bit. Chip enable, supply mode9, 12 GND Ground Ground10 RSTB Digital Input Reset (active low).13 SDA Digital I/O Serial data I/O.14 SCL Digital I/O Serial clock input.16 PA_OUT Analog Output FM RF output.典型应用电路The KT0803L can be integrated in a wide range of systems by requiring only a single power supply. Figure 9 shows the external diagram for the drop-in replacement of KT0803.MCU(3.3 V CMOS Logic)OptionalI2C POR On/OffStereo AudioLine Input33nF33nFSDA SCL INLINRIOVDDPinRSTB SWKT0803LPA_OUT HFAntennaPin1,5,11,15 GNDXI XO1,5,11,15KT080 3.3VKT08033 3VAs shown in the red block above, Pin 1, 5, 11 and 15 are VDD pins in KT0803 that are required to be connected to a decoupling capacitor. These four pins are GND pins in KT0803M. Customers can replace the decoupling capacitor of a 0-ohm resister without PCB board change.Typical configuration for a drop-in replacement武汉爱 武汉莱斯特 六装配操作说明：u 装配前准备：1. 图纸：原理图及装配图，物料清单；2. 原件：按照物料清单准备电子元件，并将其分类；3. 辅料：锡线、线材；4. 工具：烙铁、吸锡器、镊子、剪钳、螺丝刀；5. 仪器：万用表、示波器、高频信号源。u 装配步骤：在焊接时请按照先焊接小元件，再焊接大元件，最后焊接集成块的原则进行操作，元件尽量贴到印制电路板上，按标号对号入座，不得将元件焊错位置；1. 焊接阻容类贴片元件：阻容类元件采用点焊方式，元件类别及具体参数请参考装配图（图3）；2. 焊接贴片IC：焊接IC时，先将IC按正