About 89c51.doc

About89c51pinsingle-chipfunctionpowerpinVcc(40feet):atypicalvalueof+5V.Vss(20feet):low-levelaccess.externalcrystalX1,X2,respectively,connectedwiththecrystalatbothends.groundingpininputandoutputport:P0port:I/Obi-directionalport.Forinput,theywouldfirstbuythesoftware1.P1port:I/Obi-directionalport.Forinput,theywouldfirstbuythesoftware1.P2port:I/Obi-directionalport.Forinput,theywouldfirstbuythesoftware1.P3port:I/Obi-directionalport.Forinput,theywouldfirstbuythesoftware1.controlpin:RST,ALE/-PROG,-PSEN,-EA/VppformedthecontrolofMSC-51bus.RST(9feet):resetinputsignal(highactive).ALE/-PROG(30feet):Addresslatchoutputsignal.Thesecondfunction:programmingpulseinput.-PSEN(29feet):theelectionofexternalprogrammemoryreadsignal.-EA/Vpp(31feet):externalprogrammemoryenableclient.Thesecondfunction:inputprogrammingvoltage(+21V).AT89C51single-chipfeaturesofthePport:P0port:P0portisan8-bitopen-drainoutput-basedtwo-wayI/Oport.Asoutputports,eachabletoabsorbthecurrenteightTTLdriveninput,writetotheport1,whileforhigh-impedanceinputwith.Duringhisvisittoanexternalprogramordatamemory,itistimedivisionmultipleconversionoftheaddress(lower8bits)/databus,duringthevisitwillbetoactivatetheinternalpull-upresistor.P1port:P1portiswithapull-upresistorinternal8-bitbi-directionalI/Oport.P1Icandrivetheoutputbuffer(oroutputcurrentabsorptionmethod)4TTLinput.Writetotheport1,throughaninternalpull-upresistortotheportpulledhighpotentials,canbeinputatthistime.P2fortheinputIuse,becausetheinternalpull-upresistors,externalsignalsthataredrivingdownthepinwilloutputacurrent(Iil).P2port:P2portisaninternalpull-upresistorwithan8-bitbi-directionalI/Oport.P2portoutputbuffercandrive(oroutputcurrentabsorptionmethod)4TTLinput.Writetotheport1,throughaninternalpull-upresistortotheportpulledhighpotentials,canbeinputatthistime.P2fortheinputIuse,becausetheinternalpull-upresistors,externalsignalsthataredrivingdownthepinwilloutputacurrent(Iil).Duringhisvisit,whentheexternalprogrammemoryand16-bitexternaladdressoftheexternaldatamemory(suchastheimplementationofMOVXDPTR)when,P2Isendaddresshigh8.Duringhisvisittoeightoftheexternaldatamemoryaddress(suchastheimplementationofMOVXRI),when,P2pinonthecontentsofthemouth(thatis,exclusiveregister(SFR)areainthecontentsofP2register),andwillnotchangeduringtheentirevisit.P3port:P3portisaninternalpull-upresistorwithan8-bitbi-directionalI/Oport.P3Icandrivetheoutputbuffer(oroutputcurrentabsorptionmethod)4TTLinput.Writetotheport1,throughaninternalpull-upresistortotheportpulledhighpotentials,canbeinputatthistime.P3portinputforuseasaninternalpull-upresistors,externalsignalsthataredrivingdownthepinwilloutputacurrent(Iil).Internalmodules:operator:1,arithmetic/logicunitALU:+,-,*,/tocompletethearithmeticoperationsandBooleanalgebraoflogicoperations,andproceduresforcomputingtheresultsoftheimpactofsomeofthestateofregisterPSWbit,soastodetermine,transfer,themetricsystem,suchasamendmentsandprovidethebasisforanerror.2,accumulatorA:Inthearithmetic/logicoperationsinastoreortheresultsofoperations,withtheexternalmemoryandI/OinterfacewhendealingwithdatatransmissiontogothroughtheAtocomplete.3,registerB:inthe*,/registertobeusedincomputingB.Multiplicationtime,Bisusedtostorethemultiplieraswellastheplotofthehigh-byte;divisionwhen,Bisusedtostoredivisorandremainder.Whenmultiplicationanddivisiondoesnot,Bcanbeusedforgeneral-purposeregister.4,theprogramstatusregistersignPSW:commandisusedtostorethecurrentoperatingresultsaftertheimplementationofcertaincharacteristicsinorderforthenextoneprovidethebasisfortheimplementationofdirectives.【PSW】(D0H)D7 D6D5D4D3D2D1D0CyACF0RS1RS0 OV-Pcy:binarylogo.Therebinaryorbybit,theCy=1,otherwise,Cy=0;whentheBooleanoperation,Cy(referredtoasC)asaBooleanprocessor.AC:Auxiliarycarryflag.F0:Userflag:UserscanpurchasesoftwareF0-bit1ormoney0totheflowofdecision-makingprocess.OV:Overflowflag:Whenoverflowwhencomputingtheresults,OV1,otherwise0.D.1:undefined.P:paritybit:WhentheaccumulatorAofthe1whenthenumberisodd,PPurchase1,otherwisePPurchase0。RS1,RS0:choiceofplaceofworkstoragearea:registerRS1,RS0-chipworkwiththecorrespondencebetweenregisters。RS1RS0RegisterDistrict-chipRAMaddressregisterthenameofcommon00000H07HR0R701108H0FHR0R710210H17HR0R711318H1FHR0R7controller:1,instructionregisterandinstructiondecoderIR.2,theprogramcounter:thestorageofaCPUtothenextinstructionaddress.Isa16-bitregisters,addressable64KB.3,thestackpointerSP:forsubroutinecallsandinterrupthandling.【Afterresetthemachine,SP#07H,thereforepushthefirstunitofdatainthe08H】.4,datapointerregisterDPTR:16-bitregisters,butalsocanbeusedastwo8-bitregisterDPHandDPL.DPTRmainindicatorsforexternaldata,64KBexternalRAMcanbeindirectlyaddressed.89c51单片机功能引脚简介电源引脚Vcc（40脚）：典型值5V。Vss（20脚）：接低电平。外部晶振XTAL1、XTAL2分别与晶振两端相连接。输入输出口引脚：P0口：I/O双向口。作输入口时，应先软件置“1”。P1口：I/O双向口。作输入口时，应先软件置“1”。P2口：I/O双向口。作输入口时，应先软件置“1”。P3口：I/O双向口。作输入口时，应先软件置“1”。控制引脚：RST、ALE/-PROG、-PSEN、-EA/Vpp组成了MSC-51的控制总线。RST（9脚）：复位信号输入端（高电平有效）。ALE/-PROG(30脚）：地址锁存信号输出端。第二功能：编程脉冲输入。-PSEN（29脚）：外部程序存储器读选通信号。-EA/Vpp(31脚）：外部程序存储器使能端。第二功能：编程电压输入端（+21V）。AT89C51单片机的P口特点：P0口：是一个8位漏极开路输出型双向I/O端口。作为输出端口时，每位能以吸收电流的方式驱动8个TTL输入，对端口写1时，又可作高阻抗输入端用。在访问外部程序或数据存储器时，它是时分多路转换的地址（低8位）/数据总线，在访问期间将激活内部的上拉电阻。P1口：P1口是一个带有内部上拉电阻的8位双向I/O端口。P1口的输出缓冲器可驱动（吸收或输出电流方式）4个TTL输入。对端口写1时，通过内部的上拉电阻把端口拉到高电位，这时可作输入口。P2口作输入口使用时，因为内部有上拉电阻，那些被外部信号拉低的引脚会输出一个电流（Iil）。P2口：P2口是一个带有内部上拉电阻的8位双向I/O端口。P2口的输出缓冲器可驱动（吸收或输出电流方式）4个TTL输入。对端口写1时，通过内部的上拉电阻把端口拉到高电位，这时可作输入口。P2口作输入口使用时，因为内部有上拉电阻，那些被外部信号拉低的引脚会输出一个电流（Iil）。在访问外部程序存储器时和16位外部地址的外部数据存储器（如执行MOVXDPTR）时，P2口送出高8位地址。在访问8位地址的外部数据存储器（如执行MOVXRI）时，P2口引脚上的内容（就是专用寄存器(SFR)区中的P2寄存器的内容），在整个访问期间不会改变。P3口：P3口是一个带有内部上拉电阻的8位双向I/O端口。P3口的输出缓冲器可驱动（吸收或输出电流方式）4个TTL输入。对端口写1时，通过内部的上拉电阻把端口拉到高电位，这时可作输入口。P3口作输入口使用时，因为内部有上拉电阻，那些被外部信号拉低的引脚会输出一个电流（Iil）。运算器：1、算术逻辑部件ALU：用以完成+、-、*、/的算术运算及布尔代数的逻辑运算，并通过运算结果影响程序状态寄存器PSW的某些位，从而为判断、转移、十进制修正和出错等提供依据。2、累加器A：在算术逻辑运算中存放一个操作数或结果，在与外部存储器和I/O接口打交道时，进行数据传送都要经过A来完成。3、寄