单片机课程设计报告.doc

单片机课程设计题目：多功能闹钟 指导老师：陈维兴姓名： 谢紫微学号： 071141323组员：贺标瑞、雷婷、罗雅芳一、AT89C51英文资料AT89C51DescriptionThe AT89C51 is a low-power, high-performance CMOS 8-bit microcomputer with 4K bytes of Flash Programmable and Erasable Read Only Memory (PEROM). The device is manufactured using Atmels high density nonvolatile memory technology and is compatible with the industry standard MCS-51 instruction-set and pinout. The on-chip Flash allows the program memory to be reprogrammed in-system or by a conventional nonvolatile memory programmer. By combining a versatile 8-bit CPU with Flash on a monolithic chip, the Atmel AT89C51 is a powerful microcomputer which provides a highly flexible and cost effective solution to many embedded control applications.Features Compatible with MCS-51 Products 4K Bytes of In-System Reprogrammable Flash Memory Endurance: 1,000 Write/Erase Cycles Fully Static Operation: 0 Hz to 24 MHz Three-Level Program Memory Lock 128 x 8-Bit Internal RAM 32 Programmable I/O Lines Two 16-Bit Timer/Counters Six Interrupt Sources Programmable Serial Channel Low Power Idle and Power Down ModesThe AT89C51 provides the following standard features: 4K bytes of Flash,128 bytes of RAM, 32 I/O lines, two 16-bit timer/counters, a five vector two-level interrupt architecture, a full duplex serial port, on-chip oscillator and clock circuitry. In addition, the AT89C51 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port and interrupt system to continue functioning. The Power-down Mode saves the RAM contents but freezes the oscillator disabling all other chip functions until the next hardware reset.VCCSupply voltage.GNDGround.Port 0Port 0 is an 8-bit open-drain bi-directional I/O port. As an output port, each pin can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as high-impedance inputs. Port 0 may also be configured to be the multiplexed low-order address/data bus during accesses to external program and data memory. In this mode P0 has internal pullups.Port 0 also receives the code bytes during Flash programming, and outputs the code bytes during program verification. External pullups are required during program verification. Port 1Port 1 is an 8-bit bi-directional I/O port with internal pullups.The Port 1 output buffers can sink/source four TTL inputs.When 1s are written to Port 1 pins they are pulled high by the internal pullups and can be used as inputs. As inputs,Port 1 pins that are externally being pulled low will source current (IIL) because of the internal pullups.Port 1 also receives the low-order address bytes during Flash programming and verification. Port 2Port 2 is an 8-bit bi-directional I/O port with internal pullups.The Port 2 output buffers can sink/source four TTL inputs.When 1s are written to Port 2 pins they are pulled high by the internal pullups and can be used as inputs. As inputs,Port 2 pins that are externally being pulled low will source current (IIL) because of the internal pullups. Port 2 emits the high-order address byte during fetches from external program memory and during accesses to external data memory that use 16-bit addresses (MOVX DPTR). In this application, it uses strong internal pullups when emitting 1s. During accesses to external data memory that use 8-bit addresses (MOVX RI), Port 2 emits the contents of the P2 Special Function Register. Port 2 also receives the high-order address bits and some control signals during Flash programming and verification.Port 3Port 3 is an 8-bit bi-directional I/O port with internal pullups. The Port 3 output buffers can sink/source four TTL inputs.When 1s are written to Port 3 pins they are pulled high by the internal pullups and can be used as inputs. As inputs,Port 3 pins that are externally being pulled low will source current (IIL) because of the pullups. Port 3 also serves the functions of various special features of the AT89C51 as listed below:Port 3 also receives some control signals for Flash programming and verification.RSTReset input. A high on this pin for two machine cycles while the oscillator is running resets the device. ALE/PROGAddress Latch Enable output pulse for latching the low byte of the address during accesses to external memory. This pin is also the program pulse input (PROG) during Flash programming. In normal operation ALE is emitted at a constant rate of 1/6 the oscillator frequency, and may be used for external timing or clocking purposes. Note, however, that one ALE pulse is skipped during each access to external DataMemory. If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is weakly pulled high. Setting the ALE-disable bit has no effect if the microcontroller is in external execution mode.PSENProgram Store Enable is the read strobe to external program memory. When the AT89C51 is executing code from external program memory, PSEN is activated twice each machine cycle, except that two PSEN activations are skipped during each access to external data memory. 二、AT89C51中文翻译资料AT89C51资料AT89C51是一种低功率，高性能的8位CMOS工艺单片机。片内有4KB的可反复擦去的只读程序存储器（PEROM）。该产品采用了Atmel公司的高密度不易变存储技术，并且可以兼容标准MCS-51指令系统。它的闪存集成电路支持程序存储器，在系统运行状态下或是在传统的、存储器不易变的编程器中可被重编。片内置多功能8位CPU与闪存存储单元，Atmel的AT89C51是一款具有强大功能、高灵活性、高性价比的单片机，适用于把解决方案嵌入实际的控制装置中。特点兼容MCS-51型设备4KB可重编闪存存储器（范围：1000次擦写周期）完全静态操作：0Hz到24MHz三重加密的程序存储器1288字节内部数据存储器32根可编程I/O线两个16字节的定时器/计数器6个中断源可编程串行输入输出通道低功率空闲模式和掉电模式AT89C51的标准性能如下：4KB的闪存存储器，128字节的数据存储器，32根I/O线，2个16字节的定时器/计数器，一个5矢量且分两等级的中断结构，一个可全双工的串行口，片内集成振荡器和时钟电路。另外，AT89C51可低至0Hz时的静态逻辑操作，而且支持可用软件选择的两种省电模式。空闲模式时，CPU不工作，但数据存储器，定时器/计数器，串行口和中断系统继续工作。掉电模式时，系统会保存数据存储器（RAM）中的内容，但会使振荡器不工作，并且使芯片的所有其它功能都无效直到下次的硬件复位。外部引脚图：VCC提供电源电压GND地P0口Port 0口是一个8位的漏极开路型双向I/O口。用作输出口时，每一个引脚可驱动8个TTL型负载。当向P0口的各个引脚写入1后，P0的每个引脚都可当高阻抗输入端用。当外扩ROM或RAM时，P0口被设定为（低8位）地址/数据多元化总线。此时，P0口有上拉电阻。在闪存存储器编程时，P0口可接受字节指令。并且在程序校验时，把接受到的指令输出到引脚上，此时必须外接上拉电阻。P1口P1口是一个8位的内置上拉电阻的双向I/O口。P1口的输出缓冲器可驱动4个TTL型负载。当向P1的各个引脚写入1后，P1口每位上的上拉电阻会使各个引脚为1，则此时可当输入端用。用作输入口时，因为P1口有内部上拉电阻，所以引脚在被外界拉低时，会输出一个源电流（IIL）。在闪存器编程和校验时，P1口也可接受低8位地址字节。P2口P2口是一个8位的内置上拉电阻的双向I/O口。P2的输出缓冲器可驱动4个TTL型负载。当向P2的各个引脚写入1时，在P2口的上拉电阻的作用下，各个引脚可被拉高，此时可当输入端用。用作输入口时，因为P2口有内部上拉电阻，所以引脚在被外界拉低时，会输出一个源电流（IIL）。当访问片外ROM或16位地址的片外RAM时（MOVX DPTR），P2口作为高8位地址的发送端。在做此用途发送时，P2口用的上拉电阻非常大。在访问8位地址的片外RAM时（MOVX RI），P2口发送特殊寄存器中的内容。在闪存器编程和校验时，P2口可接受高8位地址和一些控制信号。P3口P3口是一个8位的内置上拉电阻的双向I/O口。P3的输出缓冲器可驱动4个TTL型负载。当向P3的各个引脚写入1时，在P2口的上拉电阻的作用下，各个引脚可被拉高，此时可当输入端用。用作输入口时，因为P3口有内部上拉电阻，所以引脚在被外界拉低时，会输出一个源电流（IIL）。P3口可提供AT89C51的特殊功能，其功能如下表所示：端口引脚第二功能P3.0RXD（串行输入口） P3.1TRD（串行输出口）P3.2INTO（外部中断0）P3.3INT1（外部中断1）P3.4T0（定时器/计数器0的外部脉冲输入口）P3.5T1（定时器/计数器1的外部脉冲输入口）P3,6WR（外部数据存储器写选通道）P3.7RD（外部数据存储器读选通道）当闪存器编程和校验时，P3口也可接受一些控制信号。RST复位输入端。在振荡器工作时，给该引脚一个长达两个机器周期的高电平，即可复位该器件。ALE/PROG在访问片外存储器时，地址锁存使能端（ALE）可输出脉冲来锁存地址的低8位。在闪存器编程时，该引脚也是程序脉冲的输入端（PROG）。在正常操作下，ALE始终发送一个对振荡器进行6分频后的频率信号，并且可把它用作外部定时或计时。注意，每次访问片外数据存储器时都会跳过一个ALE脉冲。Memory需要时，可设定特殊寄存器（SFR）中的位地址为8EH的位为0来取消ALE操作。在该位被置1后，ALE只能在MOVX或MOVC时才可被激活。否则，在其他状况下，该引脚不能被拉升为高电平。但是，当单片机控制器工作在片外模式时，设置ALE取消位是无效