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矽基與太陽能半導體技術編號專利名稱發明人可讓與可專屬授權可非專屬授權專利摘要C1METHOD FOR UTILIZING ROUGH INSULATOR TO ENHANCE METAL-INSULATOR-SEMICONDUCTOR RELIABILITY劉致為A method for utilizing a rough insulator to enhance metal-insulator-semiconductor reliability is provided. The method includes steps of: (a) providing a semiconductor substrate; (b) prebaking the semiconductor substrate under a relatively high vacuum to form a rough surface on the semiconductor substrate; and (c) growing an insulator on the semiconductor substrate to form a rough insulator and increase the metal-insulator-semiconductor reliability when the insulator is applied.C2利用粗糙絕緣層增強金絕半元件穩定度之方法劉致為本案為一種利用粗糙絕緣層以增強金絕半元件(metal-insulator-semiconductor)穩定度的方法,該方法包括下列步驟:提供一半導體基板;於高真空中預烤該半導體基板以形成粗糙表面;及於該半導體表面成長一絕緣層,形成表面及介面之粗糙度;進而增強該絕緣層應用於金絕半元件之穩定度。C3Method of fabricating polysilicon film by nickel/copper induced lateral crystallization李嗣涔The present invention relates to a method of fabricating polysilicon film by Nickel and Copper induced lateral crystallization for the TFT-LCD, comprising the step of: a) a thin (.about.4 nm) Copper and Nickel being evaporated onto the substrate; b) a amorphous-silicon film (.about.50 nm) being evaporated onto thereof obtained according to a); c) applying annealing at less than 600.degree. C. to thereof obtained according to b) for fast fabricating poly-silicon film. It is approximately 10 times faster than that of Ni induced polysilicon. The present invention is to provide a low-temperature (C4一種以鎳/銅金屬誘導橫向成長多晶矽薄膜的方法李嗣涔本發明係一種以鎳銅金屬誘導橫向成長多晶矽薄膜的方法,係用於TFT-LCD平面顯示器上,其主要係於基板上分別蒸鍍1至50nm厚度之銅金屬(Cu)及鎳金屬(Ni);再於蒸鍍有銅(Cu)及鎳(Ni)多層金屬之樣品上成長1至200nm厚度之非晶矽薄膜;最後將蒸鍍有銅(Cu)、鎳(Ni)多層金屬及非晶矽薄膜之樣品以590以下的溫度退火快速形成一多晶矽薄膜,可以比傳統的鎳(Ni)單層金屬誘導橫向成長多晶矽薄膜快十倍以上;如是,可使本發明利用非晶矽氫薄膜於高溫爐退火時具有在低溫條件下快速成長出多晶矽薄膜的特點,藉以大幅減少製程的時間,而使得本技術能為工業界所採用。C5METHOD OF FABRICATING POLYSILICON FILM BY NICKLE/COPPER NDUCED LATERAL CRYSTALIZATION李嗣涔本發明係一種以鎳銅金屬誘導橫向成長多晶矽薄膜的方法,係用於TFT-LCD平面顯示器上,其主要係於基板上分別蒸鍍1至50nm厚度之銅金屬(Cu)及鎳金屬(Ni);再於蒸鍍有銅(Cu)及鎳(Ni)多層金屬之樣品上成長1至200nm厚度之非晶矽薄膜;最後將蒸鍍有銅(Cu)、鎳(Ni)多層金屬及非晶矽薄膜之樣品以590以下的溫度退火快速形成一多晶矽薄膜,可以比傳統的鎳(Ni)單層金屬誘導橫向成長多晶矽薄膜快十倍以上;如是,可使本發明利用非晶矽氫薄膜於高溫爐退火時具有在低溫條件下快速成長出多晶矽薄膜的特點,藉以大幅減少製程的時間,而使得本技術能為工業界所採用。C6High-k gate dielectrics prepared by liquid phase anodic oxidation胡振國A method of preparing high-k gate dielectrics by liquid phase anodic oxidation, which first produces a metallic film on the surface of a clean silicon substrate, next oxidizes the metallic film to form a metallic oxide as a gate oxidizing layer by liquid phase anodic oxidation, then promoting quality of the gate oxidizing layer by processing a step of thermal annealing. With this oxidation, a gate dielectric layer of high quality, high-k and ultrathin equivalent oxide thickness (EOT) can be produced, which can be integrated into a complementary metal oxide semiconductor (CMOS) production process directly.C7利用蝕刻矽基版表面提高元件發光效率之方法林清富The present invention discloses a method of improving an electroluminescent efficiency of a MOS device by etching a semiconductor substrate thereof. A chemical etching process is performed to remove surface states or surface defects located on the surface of a silicon substrate before a nanoparticle layer and a conducting layer is formed on the silicon substrate, in order that the non-radiative electron-hole recombination centers located on the surface of silicon substrate is suppressed. Accordingly, the percentage of radiative electron-hole recombination is heightened and the electroluminescent efficiency of a MOS light emitting device is drastically enhanced. Advantageously, the chemical etching step is able to create a nanostructure on the surface of the silicon substrate to increase the probability of the collision of electron-hole pairs and phonons, and the electroluminescent efficiency of a MOS light emitting device is improved as well.C8利用蝕刻矽基版表面提高元件發光效率之方法林清富本發明係揭露一種利用蝕刻矽基板表面提高元件發光效率之方法,其係在形成奈米粒子層以及導電層之前,先利用化學蝕刻移除矽基板表面能階或表面缺限,以減少矽基板表面的非幅射式電子電洞之復合中心,令金氧矽發光元件的幅射式電子電洞之復合比例提高,使得金氧矽結構產生光時,發光效率大幅提高。且該蝕刻步驟亦可在基板上造成奈米級的表面結構,以提高電子電洞對與聲子碰撞機率,並使得發光效率相對增強。C9利用機械應變矽增加積體電路速度的方法劉致為本案係提供一種利用將基板應力應變以增加積體電路或元件速度的方法,包含以下步驟:(a)提供一基板;(b)固定該基板的邊界;(c)於該基板上施予一應力;以及(d)該基板受該應力而產生應變。C10METHOD WITH MECHANICALLY STRAINED SILICON FOR ENHANCING SPEED OF INTEGRATED CIRCUITS OF DEVICES 劉致為A method with a mechanically strained silicon for enhancing the speeds of integrated circuits or devices is disclosed. The method with a mechanically strained silicon for enhancing the speeds of integrated circuits or devices includes the following steps: (a) providing a substrate, (b) fixing the substrate, (c) applying a stress upon the substrate, and (d) inducing a strain in one of a device and a circuit by stressing the substrate.C11利用特殊佈局方向之互補型金氧半場效電晶體製造方法劉致為一種受應變力之互補型金氧半場效電晶體的佈局擺放方法。該電晶體中之N型金氧半場效電晶體與P型金氧半場效電晶體之通道中電流流動方向且呈垂直。如此可用同一方向的機械應變力施加於兩者之通道,同時增進N型及P型電晶體之驅動電流及操作速度。本案若有化學式,請揭示最能顯示發明特徵的化學式C12多晶矽薄膜之製作方法李嗣涔A polysilicon thin film fabrication method is provided, in which a heat-absorbing layer is used to provide sufficient heat for grain growth of an amorphous silicon thin film, and an insulating layer is used to isolate the heat-absorbing layer and the amorphous silicon thin film. A regular heat-conducting layer is used as a cooling source to control the crystallization position and grain size of the amorphous silicon thin film. Therefore, the amorphous silicon thin film can crystallize into a uniform polysilicon thin film, and the electrical characteristics of the polysilicon thin film can be stably controlled.C13多晶矽薄膜之製作方法李嗣涔一種多晶矽薄膜之製作方法,乃利用吸熱層提供充分熱源予非晶矽薄膜進行晶粒成長,並以絕緣層隔絕吸熱層與非晶矽薄膜,再藉由規則排列的導熱層作為冷源,來控制非晶矽薄膜之結晶位置及晶格大小,使得非晶矽薄膜可結晶為均勻的多晶矽薄膜,進而可穩定控制多晶矽薄膜的電性。C14金氧半穿隧二極體溫度感應器及其製造方法胡振國本發明提供一種可整合於晶片內之金氧半穿隧二極體溫度感應器及其製造方法。本發明之金氧半穿隧二極體溫度感應器乃是採用與CMOS製程相容的製程,因此其可與MOS元件一起形成而整合於一積體電路晶片中。利用金氧半結構穿隧二極體具有的二極體特性,對金氧半結構穿隧二極體施加一固定的逆向偏壓下,計算出閘極電流對基板溫度的指數關係式。經由量測出的閘極電流值,便可求出目前的基板溫度,其代表目前的積體電路晶片溫度。C15低功率掃描單元電路與掃描鏈李建模本發明提出一種掃描單元電路以及由此掃描單元電路所構成的掃描鏈,可內建於晶片內供測試程序使用。此掃描單元電路係由兩個子單元以串接方式組成,每一子單元包含一個多工器與一個鎖存器。在測試模式下,其中一個子單元會在一個時脈週期裡時脈的正緣動作,而另一個子單元係在時脈的負緣動作。因此,本發明的掃描單元電路每時脈週期可傳送兩位元的掃描資料,掃描的時脈頻率因而可以減半且不需要增加任何測試時間。實驗數據顯示本發明相對於傳統的多工掃描技術可有效降低測試模式下三分之二的功率消耗。C16應變矽鰭形場效電晶體劉致為本案係為一種將應變矽圍繞在矽鍺中心體所構成之鰭形場效電晶體,其包含:一絕緣層上矽(SOI)基底;一矽鍺中心體,用以產生應變矽;一圍繞矽鍺中心體的的應變矽通道,使載子在傳輸方向的遷移率增加,使其有較大的電流,較快的速度;一氧化層;一複晶矽閘極電極(或金屬閘極電極);以及源極、汲極在鰭形通道兩端,使其形成場效電晶體結構。C17矽/鍺異質結構的長波長矽金屬氧化半導體發光元件劉致為本發明係提出一種具四族異質接面結構之發光元件的製造方法,該方法至少包含下列步驟:(1)提供一矽基板,其具有一第一表面

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