一种PWM整流器直接功率控制方法_英文_.doc

第 27 卷 第 25 期中 国 电 机 工 程 学 报Vol.27 No.25 Sep. 20072007 年 9 月Proceedings of the CSEE2007 Chin.Soc.for Elec.Eng.文章编号：0258-8013 (2007) 25-0078-07中图分类号：TM46文献标识码：A学科分类号：47040一种 PWM 整流器直接功率控制方法 Hadian Amrei S R，徐殿国，郎永强 (哈尔滨工业大学电气学院，黑龙江省 哈尔滨市 150001)A New Direct Power Control for PWM RectifierHadian Amrei S R, XU Dian-guo, LANG Yong-qiang(Electrical Engineering Dept., Harbin Institute of Technology, Harbin 150001, Heilongjiang Province, China)ABSTRACT: Direct power control (DPC) schemes have been widely used because of its simplicity, noise resistance, good dynamic performance, decoupled active and reactive power control. A new DPC scheme is proposed based on conventional voltage direct power control (V-DPC) and virtual flux direct power control (VF-DPC) schemes. The new DPC scheme mitigates the influence caused by undesired AC line voltage such as distorted or asymmetric voltage. The utilization of PWM modulator makes the switching frequency constant and the adoption of line voltage transducers enables it feasible to carry out the control scheme with less precise ADC devices. Moreover, the system performance in unbalanced and distorted line voltage conditions is greatly improved by introducing the unbalance compensation and the voltage reconstruction blocks. Experiment results show the new scheme is effective.KEY WORDS: direct power control; virtual flux; voltage unbalance; PMW rectifier摘要：PWM 整流器的直接功率控制方法因具有简单实用、 抗干扰能力强、良好的动态性能、可以实现有功无功的解耦 控制的特性而被广泛应用。基于传统的 V-DPC(voltage direct power control)和 VF-DPC(virtual flux direct power control)控 制方案，提出了一种新的控制方案。新控制方案减轻了电网 电压不理想条件下(电网电压畸变或不平衡)产生的影响。 PWM 调制器应用保证了恒定的开关频率。增加电网电压传 感器使得利用低分辨率 ADC 转换器实现控制策略成为可 能。通过引入电网电压的不平衡补偿模块和重构模块，改善 了系统在电网电压不平衡或畸变条件下的性能。实验结果证 实了这种方法的有效性。关键词：直接转矩控制；虚拟磁通；电压不平衡；PWM 整 流器0 INTRODUCTIONPWM rectifiers are well known for their advantages and merits compared to uncontrolled dioderectifiers including less THD factor, power factor (PF) correction, regenerative operation, and active filtering (AF) capabilities 1-8. Lately, most of the common power utility connected adjustable speed drive (ASD) systems for induction machine and AC-exited induction generator drive systems utilize the bi- directional AC-DC-AC power converters, whereas the three-phase PWM boost rectifiers with high-speed power switches (e.g. IGBT modules) are used in VSR (voltage source rectifier) topology 1 as grid- connected rectifiers.Regardless of common VSR circuit topology,different control strategies have been applied to PWM boost rectifiers for improving their functionality and usefulness such as VOC, VFOC, V-DPC, VF-DPC 9-12, etc. Among the above-mentioned strategies, VF- DPC is more attractive because of its advantages such as simplicity and noise resistance, good dynamic performance, decoupled active and reactive power control, lower THD of current at distorted and unbalance line voltage, and so on. However, there are some difficulties in the implementation of conventional VF-DPC, such as variable switching frequency (difficulties of LC input filter design), violation of polarity consistency rules (to avoid switching over dc-link voltage), high sampling frequency need for digital implementation of hysteresis comparators, fast microprocessor and A/D converters requirement, etc. Nevertheless, most of the above drawbacks can be eliminated by using PWM voltage modulator instead of switching table7-9,11-13. However, the scheme becomes more第 25 期Hadian Amrei S R 等： 一种 PWM 整流器直接功率控制方法79complicated due to the addition of PWM modulatorblock. Although the integration of voltage makes the L uL dt u dt= L L LLOAD(1)low pass effect on the resulted virtual fluxes and reduces the instantaneous and fast disturbances12-17, for serious input line voltage distortions,AC-sideRLuaPWM Rectifier DC-sideAespecially when the active filtering function (AFF) of VSR is employed 6-7, some additional means for unbalance mitigation are indispensable, which makes the control scheme more complex.In this paper, firstly the V-DPC and VF-DPC areRLB UdcCubCRLucVirtual AC Motor MLL(a)三相 PWM 整流器交流侧虚拟为交流电机结构图described. Then the new control strategy based on the two schemes is proposed in order to integrate the advantages of them and improve the performance without loosing the simplicity. The theoretical analysis has been verified by experiment result.1 BASIC DPC AND VF-DPC SCHEMESU = jLI q -axis U = UILLq LqI LU S -axisU LI L L L Id -axis(rotating) SConventional V-DPC is based on the instantan-UI L LL =tI Ld L -axis(fixed)eous active and reactive power control loops by using the AC line voltages and currents. In DPC, there are no internal current control loops and no PWMwhere(b)参考坐标系以及相量图图 1 三相 PWM 整流器模型Fig. 1 Model of three-phase PWM rectifiermodulator block, because the converter switchingstates are selected by a switching table based on the1u = uL =2 1 2 uab (2)L instantaneous errors between the commanded anduL 30 3 ubc 2 estimated values of active and reactive power.Therefore, the key point of the DPC implementation is a correct and fast estimation of the active and reactive line power.considering the relationship thatuL = uS + uIthen, similarly a VF equation can be derived as L = S + I(3) (4)It is possible to replace the AC-line voltagesensors with a virtual flux (VF) estimator to establish the so-called VF-DPC, which brings advantages, such as simplification, isolation between the power circuitBased on the measured dc-link voltage and present switch states，the next switch states arederived. Fig.2 shows the configuration of conven tionalDPC, where the digitized variables dp, dq and the lineand control system, reliability, and cost effectiveness,to the system.The voltages imposed by the power line inLiauaubibucicia,bUdcLoadPWMUdccombination with the AC-side inductors are assumedto be quantities related to a virtual ac motor as shown in Fig. 1. Thus, R and L represent the stator resistanceCurrent measurementInstantaneous powerVirtual flux estimator(PVF)SaSa Sb ScSb SwitchingScTable Udc-refand the stator leakage inductance of the virtual motor and line-to-line voltages uab, ubc and uca would be induced by a virtual air-gap flux. In other words, the integration of the voltages leads to a virtual flux (VF)Lp qqref =0dq dpprefUdcPIL vector, in stationary coordinates Fig. 1(b)one can get图 2 传统的 VF-DPC 控制结构图Fig. 2 Conventional VF-DPC block diagram80中 国 电 机 工 程 学 报第 27 卷voltage vector position UL=arctan (uL/uL) togetherform a digital word; then the appropriate voltage vectors are selected by accessing the address of the lookup table. However, disturbances superimposed on the line voltage influence the phase and amplitude of line voltage. Sometimes, this problem can be overcome by phase-locked loops (PLL) only, but the quality of the controlled system depends on how effectively the PLL have been designed.Another problem about conventional VF-DPC isthat the hysteresis ban controllers make the switchingseriously unbalanced or distorted, the derivatives in (7), (8) can no longer be neglected. Some especial means should be used to reduce the asymmetries before applying them to the integrator blocks in (5) and (6) to get the virtual fluxes. Also the synchronization with input line voltage angle during the start-up stage needs the additional control software or hardware utilization. Another necessity is that the precise ADC chips(with at least 12 bits resolution) should be used for integral calculations, otherwise theaccuracy becomes poor.frequency be variable. In contrast, duty cycles of modulator Da, Db and Dc can be used for virtual fluxcomponentscalculationinstationary()Liauaubibuc icia,bUdcPWMLoadUdccoordinates system in the block (P&VF) as follows:Current measurementInstantaneous powerUdc-ref = 2U (D 1 (D+ D )dt + Li(5)Virtual flux estimatorL 3dca2bcL(PVF)SaSaSbScSbSVM/ SPMWSc = 1 U(D D )dt + Li(6)LPIL 2dcbcLThe active and reactive power then can be calculated from the below equations:puSd uSqqPI PIp = d L i+ d L i+ (i i )(7)prefdt dt L L qref =0q = d L i+ d L i+ (i + i )(8)图 3 DPC-SPWM 结构框图dt dt L L Fig. 3 Block scheme of DPC-SPWMIf the line voltages are assumed to be sinusoidal and symmetric, the derivatives are zero and (7), (8) can be reduced to2PROPOSED CONTROL STRATEGYuSuSdq2.1Scheme of Proposed New DPC ControlStrategyp = ( L i L i )q = ( L i + L i )(9)(10)Fig.4 shows the proposed new control strategy. The most important change is the replacement ofwhere the commands of reactive power qref(set to zerofor unity power factor) and active power prefvirtual flux estimator with the unbalance compensator and signal reconstruction block, which uses the line-(determined from the outer PI voltage controller) are compared with the estimated q and p values fromuaubua,b,cia ib icia,bUdcPWMLoadUdccontrollers respectively. Thus, the hysteresis bandcontrollers can be replaced by a SVM/SPWMmodulator, which makes the frequency constant.Fig.3 shows block scheme of DPC-SPWM. TheCurrent measurement Unbalance comp Voltage reconstructionSaSbScSVM/ SPMWInstantaneous power calcL Udc-refPIangle of the line voltage vectoris replaced by thatLuSuSdqupSd uSqUof VF vector L = arctan(L/ L), becauseqisLPI PIless sensitive thanto disturbances in line voltageULqref =0prefdue to the natural low-pass behavior of the integratorsin estimators (5), (6). Nevertheless, if line voltages are图 4 提出的新型控制策略结构图Fig. 4 Proposed new control strategy第 25 期Hadian Amrei S R 等： 一种 PWM 整流器直接功率控制方法81to-line voltage transducers to calculate power and synchronize line voltage. Although the total cost of system transducers is increased obviously, it is feasible to carry out the control strategy with less precise ADC, such as ADC with 10 bits. Moreover, the additional means for line synchronization are not further necessary.The SPWM is applicable if the simplicity of implementation is concerned, but SVM can be alternatively used if the full utilization of DC bus voltage is required, especially in the case of low inputcoupled by cross terms. The synthesis of the PI parameters should be done in order to get a good response and minimize coupling effects. Consideredthat the reactive power is null and iLd=0, the activepower control loop becomes disconnected from reactive power as shown in Fig. 6. The line voltage can be seen as periodic perturbation, which is compensated by the integral part of the PI controller. In this way, the zero of the PI controller is placed over the pole of the system, i.e,Uline voltage.Theunbalancecompensationandvoltage reconstruction blocks are designed to have lineQrefuLd 0+ +PI1Ls + RiLdvoltages as their inputs. So such scheme can be applied to virtual flux unbalance conditions.2.2 Synthesis of Active and Reactive PowerControllersThe active and reactive power controllers can bePrefPILL +1+Ls + RiLqsynthesized by using a simplified model. In this model, the switching waveforms created by the PWM converter are replaced by its average value within theswitching period. The voltages in dq coordinates canuLq UU图 5 Boost 型整流器的简化结构框图Fig. 5 Simplified block diagram of boost rectifierbe expressed as:uLd = RiLd + LdiLddt LiLq + uSd(11)Pref+1 1 + sTnsTiusq+U U pR + LsuLq = RiLq + LdiLqdt LiLd + uSq(12)图 6 有功功率控制结构框Fig. 6 Block diagram of active power control loopAccording to the reference frame defined in Fig.4, we can obtain following properties:T = L =Tn RolanduLq = U(13)uLd = 0(14)where Tol is the systems open loop time constant.With this synthesis, in closed loop, the system will be simplified as shown in Fig.7. The closed loop transferp = UiLqq = UiLd(15) (16)function isPref+ U psTi R Introducing (13), (14) into (11), (12), the equation issimplified as:diLd图 7 闭环控制结构框图Fig. 7 Closed loop block diagram0 = RiLd + LdtdiLq LiLq + uSd(17)Geq=1 + G U isTi R U = 1 sT R(19)U = RiLq + L dt LiLd + uSq(18)eq1 + sT R1 +iUPI controllers are introduced to control activepower p and reactive power q. The block diagram isThe closed loop time constant Tcl is given byshown as Fig.5.Tcl= Ti R U(20)The active and reactive power controllers areThat can be a specification of the controller design. So82中 国 电 机 工 程 学 报第 27 卷Ti = UTcl / RThe parameters of PI controller can be given bypk = Tn = 1 L TiU Tclik = 1 = 1 R TiU Tcl(21)(22) (23)phase angle of the line voltage. The reason of adopting arcsin rather than arctan function is that the former can be implemented in a DSP with shorter data table length than the latter.The initial zero angle is detected and used toreconstruct the line voltage by initiating the resetThe specification of Tcl should be done in orderto get good response and decoupling between the two controllers. The ratio kp/ki with different closed loop time constants is constant and equals to open loop time constant Tol. The active and reactive power loops are similar; therefore the equations are applicable to both controllers.2.3 Unbalance Compensation and Voltagesignal. This signal resets the initial value of the proceeding integral block to zero, and completes the PLL operation. The integral block then calculates the angle according to the power frequency of line voltage, which is set to 50 Hz or 60 Hz.Finally, the sine generator generates the sine and cosine functions, which are used in the next block forReconstructionFig.8 shows the general scheme for mitigatingcalculating the values of reconstructeduq.u , u , ud andunbalance and frequency error. The scheme can be applied to calculate the active and reactive power with line voltages and virtual fluxes respectively.Such block can also be used for virtual fluxunbalance compensation in VF-DPC scheme. The only modification is the bypass of three-to-two phasestationary reference frame (abc/) transform.LDFLDFPeak detectUL/Luabcu3EXPERIMENTAL RESULTSUAB/LUBC/LuddquqUnbalance compOffset NullAmplitude detectLDE LDEPLLTo implement the control strategy, a full-bridge VSR converter shown in Fig.1 is used, and the central component of the controller is a TMS320LF2407A DSP controller, in which there is a 16-bit processor with 16 multiplexed 10-bit ADC channels and 12u usin cossin cosarcsin angzerodetPWM output channels. The inductance of lineinductors is 10mH and the capacitance of DC link capacitor is 6 800 F.Fig.9 shows the line current i and phase voltage图 8 不平衡补偿及重组框图Fig. 8 Unbalance compensation and reconstruction block The line voltage unbalances are first trimmed according to the detected positive and negative peak values. The offset null block compares the detected peak in previous cycle with the instantaneous calculated amplitude, and selects the real peak value based ontheir difference.The amplitude detection uses the coordi-nates transformed variables to calculate the amplitude as22uan when the input line voltage is 120 V(50 Hz) and the reference voltage is 400 V(DC). It can be seen that although the voltage is distorted and unbalanced, the current is near sinusoidal and balanced, and the power factor is obviously equal to 1. For example, if theoutput load is 200 , the output power is 800 Watts. InFig.10, the output DC voltage along with current is illustrated.The line-to-line voltages and line current are shown in Fig.11. The performance of PLL block forunbalanced and distorted input voltage is shown inU M =u + u(24)Fig.12. The voltage waveform here is assumed to beSubs