8-3 时序电路的设计移位计数器 chenyu(1)演示幻灯片

1,01,+5V,CLOCK,Whatisthemoduloofthecircuitbelow?,2,AnswerKey,DLD-LCQDQCQBQA00000010011001111000101011101111,3,Reviewoflastclass,4,anMSI4-bitbidirectional,parallel-in,parallel-outshiftregister(4位双向移位寄存器74x194),left-in左移输入,right-in右移输入,leftmeans“inthedirectionfromQDtoQA,”rightmeans“inthedirectionfromQAtoQD.”,5,Functiontableforthe74x1944-bituniversalshiftregister,6,CLKCLRS1S0,移位寄存器的扩展,7,8.5.3Shift-RegisterCounters,Serial/parallelconversionisa“data”application,butshiftregistershave“nondata”applicationsaswell.Ashiftregistercanbecombinedwithcombinationallogictoformastatemachinewhosestatediagramiscyclic.Suchacircuitiscalledashift-registercounter.Unlikeabinarycounter,ashift-registercounterdoesnotcountinanascendingordescendingbinarysequence,butitisusefulinmany“control”applications.,8,8.5.5Shift-RegisterCounters(移位寄存器计数器),D0=F(Q0,Q1,Qn-1),一般结构：,9,1000,8.5.6RingCounters(环型计数器),D0D1D2D3,非自启动的,无效状态,D0=Qn-1,10,self-correctingcounter,self-correctingcounterisdesignedsothatallabnormalstateshavetransitionsleadingtonormalstates.Self-correctingcountersaredesirableforthesamereasonthatweuseaminimal-riskapproachtostateassignment:Ifsomethingunexpectedhappens,acounterorstatemachineshouldgotoa“safe”state.,11,1000,8.5.6RingCounters(环型计数器),非自启动的,无效状态,D0=Qn-1,12,self-correcting自启动的,自校正的,13,JohnsonCounter（扭环计数器）,D0=Qn-1,0000,无效,有效的状态循环,14,Shift-RegisterCounters,一般结构：,D0=F(Q0,Q1,Qn-1),环形计数器：,最简单的：D0=Qn-1,自校正的：D0=(Qn-2+Q1+Q0),0111,1011,1101,1110,(Qn-2Q1Q0),Q3,Q0,Q2,Q1,Q0Q1Q2Q3,15,RINGCOUNTER(P735),Themajorappealofaringcounterforcontrolapplicationsisthatitsstatesappearin1-out-of-ndecodedformdirectlyontheflip-flopoutputs.Thatis,exactlyoneflip-flopoutputisassertedineachstate.Furthermore,theseoutputsare“glitchfree”.Forthegeneralcase,ann-bitself-correctingringcounterusesann-1-inputNORgate,andcorrectsanabnormalstatewithinn-1clockticks.,16,JOHNSONCOUNTER：,最简单的实现：D0=Qn-1,有效状态,无效状态,如何得到自校正的扭环计数器？,Q3,Q0,Q2,Q1,Q0Q1Q2Q3,17,Johnsoncounter(P533),Ann-bitshiftregisterwiththecomplementoftheserialoutputfedbackintotheserialinputisacounterwith2nstatesandiscalledatwisted-ring,Moebius,orJohnsoncounter.Ann-bitJohnsoncounterhas2n-2nabnormalstates,andisthereforesubjecttothesamerobustnessproblemsasaringcounter.,18,Johnsoncounter,19,self-correcting,1、确定有效的状态循环,2、对无效状态进行处理，使其进入有效循环。,Q0Q1Q2Q3,1,有效,无效,1,D0=Q3+Q2Q1,20,=(Q2Q1)Q3),D0=Q3+Q2Q1,Self-correcting4-bit,8-stateJohnsoncounter,21,Self-correcting4-bit,4stateringcounterwithasinglecirculating1,Q0Q1Q2Q3,10,CLOCK,1000,Q0Q1Q2Q3,RESET载入,自校正的,22,Self-correcting4-bit,8stateJohnsoncounter,S1S0wiredasashift-leftshiftregister(接成左移形式),自校正改进：（法一）LIN=Q3+Q2Q1,23,self-correcting,1、确定有效的状态循环,2、对无效状态进行处理，使其进入有效循环。,Q0Q1Q2Q3,有效,无效,1001,1010,0110,1011,可利用置数法。,自校正改进：（法二）利用置数每当电路Q3Q2Q1Q0出现0XX0就置数到下一状态0001D0=Q3.Q0,24,Self-correcting4-bit,8stateJohnsoncounter,自校正改进：（法二）利用置数每当电路Q3Q2Q1Q0出现0XX0就置数到下一状态0001,S0=Q3.Q0,0,0,0,1,25,8.5.6LinearFeedbackShiftRegisterCounters线性反馈移位寄存器（LFSR）计数器,LFSR计数器有2n-1种有效状态,最大长度序列发生器,26,LFSRn-bitLinearFeedbackShiftRegisterCountersamaximum-lengthsequencegenerator.,全0态的下一状态？,反馈方程P535表8-21,27,典型应用：产生逻辑电路的测试输入信号用于检错及纠错码的编码和译码电路,28,Linearfeedbackshiftregister(LFSR)counters,Shiftregistercounters,29,LFSR:Maximum-lengthsequencegeneratorForgivenN,asequence(1,c1,c2)canbefoundtomakeamode2N-1counter.(Table8-26),Shiftregistercounters,N=2:(1,1)N=3:(1,1,0)n=4:(1,1,0,0)N=5:(1,0,1,0,0)N=7:(1,0,0,1,0,0,0)N=12:(1,1,0,0,1,0,1,0,0,0,0,0)N=16:(1,0,0,1,1,1,0,0,0,0,0,0,0,0,0,0,0),30,LFSRcounterexample:3bits,Shiftregistercounters,Q0Q1Q2,31,LFSRcounters:modifiedtoinclude“0”state,Shiftregistercounters,32,移位寄存器应用,Shiftingthestoreddatatothenextflip-flop,Applications:Delayline,33,Applications:SequentialsignaldetectorTestchaininASICS/Psignalconvertor,移位寄存器应用,34,Datamaybereused,Sequentialsignaldetector序列检测器,35,Datanotbereused,Sequentialsignaldetector序列检测器,36,Series/parallelsignalconvertor串并转换器,37,顺序脉冲发生器,利用移位寄存器构成注意自校正（环形计数器）利用计数器和译码器构成注意“毛刺”（二进制计数器的状态译码）,38,序列信号发生器,用于产生一组特定的串行数字信号例：设计一个110100序列信号发生器利用触发器利用计数器利用移位寄存器,39,利用D触发器设计一个110100序列信号发生器,1、画状态转换图,2、状态编码,000101表示S0S5,3、列状态转换输出表,4、得到激励方程和输出方程考虑未用状态的处理,5、得到电路图,000001,40,用计数器和数据选择器构成序列信号发生器,例：产生一个8位的序列信号0