数字逻辑邓建01

1、1,第1章 引言,模拟与数字,模拟量： 其变化在时间或数值上是连续的 数字量： 其变化在时间和数量上都是离散的,2,Digital vs. Analog,5,3,Example of Digitization Benefit,time,lengthy transmission (e.g, cell phone),lengthy transmission (e.g, cell phone),4,第1章 引言,数字系统及其优越性 结果再现性（稳定可靠、精度更高） 易于设计，灵活性和功能性 可编程性（具有“智能”） 快速、经济性、稳步发展的技术,5,第1章 引言,数字电子技术的应用,6,Softwa

2、re,Application software, a program in C: swap (int v , int k) int temp; temp = vk; vk = vk+1; vk+1 = temp; ,MIPS binary machine code: 0000011000 1100100001 1000000000 1000000100 1000000000 1000000100 0000001000,Compiler,Assembler,Application software,Hardware,Systems software,Machine instructions,MI

3、PS compiler output, assembly language program: swap; muli$2,$5, 4 add$2,$4, $2 lw$15, 0 ($2) lw$16, 4 ($2) sw$16, 0 ($2) sw$15, 4 ($2) jr$31,7,市场统计,Top 10 Semiconductor Vendors by Revenue, Worldwide, 2013 (Millions of Dollars),8,第1章 引言,数字器件 门电路（gate）： 最基本的数字器件（与、或、非）,9,第1章 引言,数字器件 门电路（gate）： 最基本的数字器

4、件（与、或、非） 触发器（flip-flop）： 一种能存储 0 或 1 的器件 组合电路（combinational circuit） 时序电路（sequential circuit）,10,第1章 引言,数字电子技术的发展 电子管、晶体管、集成电路（ IC ）,集成电路 （Integrated Circuit，IC）,按所包含的门数分类 SSI（小规模集成） : 120 MSI （中规模集成 ）: 20200 LSI （大规模集成） : 200200,000 VLSI （超大规模集成） : 100万,11,Transistor Counts,Moores Law: Number of tr

5、ansistors that can be packed on a chip doubles every 18 months while the price stays the same.,12,第1章 引言,可编程逻辑器件 （PLA、PLD、CPLD、FPGA） 专用集成电路（ASIC） 印制电路板,13,Basys2 FPGA Board,14,Basys2, 100,000-gate Xilinx Spartan 3E FPGA Atmel AT90USB2 Full-speed USB2 port providing board power and programming/data t

6、ransfer interface Xilinx Platform Flash ROM to store FPGA configurations 8 LEDs, 4-digit 7-segment display, 4 buttons, 8 slide switches PS/2 port and 8-bit VGA port User-settable clock (25/50/100MHz), plus socket for 2nd clock Four 6-pin header expansion connectors,15,Basys2,Switches (8),Buttons (4)

7、,7 Segment Displays (4),VGA connector,ON/OFF Switch,Expansion ports,LEDs (8),16,Basys2 I/O Circuits,17,Seven Segment Display,By lighting different combinations of LEDs, different figures appear For Instance CA, CB, CC make 7 Common anode means that writing a 0 to CA-DP illuminates the led, where a 1

8、 turns it off,18,实验平台,19,Binary Arithmetic,Switching Theory,Semiconductor Technology,Digital Systems,Boolean Algebra,DIGITAL CIRCUITS,20,第1章 引言,数字设计的电子技术 逻辑上的 0 和 1 在物理上如何实现？ 什么电平范围对应逻辑 0（或 1）？ 如何正确产生和识别处于适当范围的信号？ 数字与模拟之间的关系 数字设计的软件技术 软件工具有助于提高设计的效率、正确性和质量。,21,Hardware Description (ABEL,VHDL,Verilog

9、),Specification,On-paper hardware design,FPGA Design process (1),22,FPGA Design process (2),On chip testing,23,Digital System Design,Realization of a specification subject to the optimization of Area (Chip, PCB) Lower manufacturing cost Increase manufacturing yield Reduce packaging cost Performance

10、Power dissipation Testability Fault tolerance Design time (time-to-market) Cost reduction Be competitive,24,Design Example,Problem: It is required to design a circuit to add two 8-bit numbers. The design must be as economical as possible in terms of hardware. Possible Solutions:There are numerous wa

11、ys to design the above circuit, some of which are listed below. Use an 8-bit ripple-carry adder Use an 8-bit carry look-ahead adder. Use two 4-bit carry look-ahead adders and ripple the carry between stages. Use a 1-bit adder and perform the addition serially in 8 clock cycles. Serial is cheap but slow, parallel fastest in terms of performance but most costly.,25,How to Deal with Design Complexity?,Hierarchy: structure of a design at different levels of description. Top-down/bo