级联多电平变换器电压平衡算法

1、AbstractVoltage-balancing controller in cascaded multilevel converters has been discussed extensively in previous literatures where several effective methods have been proposed. The coupling effect between a voltage-balancing controller and the original system controller is however not addressed com

2、prehensively. This paper proposes a new voltage-balancing controller for single-phase cascaded multilevel converters in a d-q coordinate. The theoretical finding shows that the proposed method can effectively eliminate the coupling between two controllers in both steady and dynamic state. Simulation

3、 and experimental results validate the proposed method.Index Termscascaded multilevel converter, voltage balance, d-q control, decouple controlI. I NTRODUCTIONHE multilevel converters are appealing solutions for high voltage applications since it is generally difficult to utilize a single power semi

4、conductor to switch directly1. Cascaded multilevel converters have gained considerable attention recently compared with other multilevel topologies due to its advantages in terms of modularization, extendibility, and minimization of power semiconductors 1-28. It has been proposed and widely employed

5、 in high voltage and high power applications such as inverters in AC motor drives, static synchronous compensators (STATCOM, and active power filters (APF 4-9. Another attractive application is to use this topology as a bidirectional active rectifier because of the available distinct dc links feedin

6、g separate loads 10. It can reduce the harmonic distortion at the AC side and provide satisfactory regulation for all DC links. A good application example is the solid-state transformer (SST, which is reported in 11. DC capacitor voltage imbalance is an inherent problem for both multilevel converter

7、 systems and multi-pulse converter systems 12-13. In a cascaded multilevel converter, this can be caused by mismatch of active and passive components, different switching pattern, control resolutions, and different loads (operating as a rectifier 7, 10. The imbalance of the DC capacitor voltage will

8、 lead to degradation of the input current, imbalance of loss in each H-This work was supported National Science Foundation under Award EEC-0812121.Xu She, Alex Q.Huang, Gangyao Wang, and Fei Wangare with Future Renewable Electric Energy Delivery and Management Systems Center, North Carolina State Un

9、iversity, Raleigh, NC 27695, USA (e-mail: , , , .In this paper, a new voltage-balancing controller is proposed to reduce the coupling effect between the voltage-balancing controller and the original system controller for a single-phase cascaded

10、multilevel converter. A single-phase d-q model is firstly established with consideration of DC voltage imbalance. Then the coupling term between two controllers is identified and a control scheme is proposed to eliminate it. Comparisons between the proposed method and previous methods are conducted.

11、 Furthermore, DC voltage-balancing controller reference generation techniques are discussed and proved to be of big impact to the DC voltage balance during the start up process. A suitable reference is then chosen to get rid of this undesired impact. Simulations and experiments are provided to valid

12、ate the theoretical findings.II. A VERAGE M ODELING IN D-Q C OORDINATE CONSIDERINGV OLTAGE I MBALANCEFig.1 (a shows the configuration for a single-phase cascaded multilevel rectifier with N H-bridges.sv is the point ofcommon coupling (PCC voltage,sL is the boostinductor,sR is the equivalent resistor

13、 of the inductor ,wire, andlosses.iC andiR( 1.=i N are DC capacitors and loads in each DC output. N H-bridges are series connected tosynthesize a 2N+1 level waveform, which isabv, from N isolated DC voltage sources, which are denotedas1dc dcNv v.( 1., 1.4=aijT i N j denotes the switches in the conve

14、rter.A New V oltage-balancing Controller inCascaded Multilevel Converters Xu She, Student Member, IEEE, Alex Q.Huang, Fellow, IEEE, Gangyao Wang, Student Member,IEEE, Tiefu Zhao, Member, IEEE, Fei Wang, and Wenxi YaoT1R(a Topology of original N H-bridges cascaded rectifierR R R2mN T T(b Topology of

15、N H-bridges cascaded rectifier with hypothesized phaseFig. 1 Topology for cascaded rectifier with N H-bridgesDifferent from the three-phase system, N imaginary H-bridges, which lag 900 with the original N H-bridges, have to be hypothesized in order to realize the single-phase d-q transformation 29.

16、This is illustrated in Fig. 1 (b. The inductor current in the real and hypothesized cascaded H-bridges are represented as s i and m i while the PCC voltage for the hypothesized converter is m v . (1., 1.4=mij T i N j denotes the switches in the hypothesized converter. The relationship between s v an

17、d m vis shown in Fig. 2. The detailed theory of the single-phase d-q transformation can be found in 29. Fig. 2 Relationship between values in real and hypothesized circuitsThe average modeling in d-q coordinate considering the voltage imbalance can be obtained as:1212121(.s sd sd sd d d dN s dc dc d

18、cN q q qN s s ss s sq sq sq s R d w i i v d d d L v v v dt d d d d R L L L L i v w dt L =+(1( 1.dci dcidi sd qi sq iidv v d i d i C i N dt R +=+= (2 In the cascaded multilevel inverter application, the reactive current is controlled to a certain value for reactive power compensation (such as in STAT

19、COM and APF. In the active rectifier application, the reactive current is controlled to zero to obtain unity power factor. The DC capacitor voltage is regulated by the active current. Fig. 3 demonstrates the d-q coordinate dual loop control for a cascaded multilevel rectifier with N H-bridges. In Fi

20、g. 3, NE is the total DC voltage reference, base V is the base value of the PCC voltage, and base I is the base value of the input current. ed H ,id H ,iq H arethe controllers for the DC bus voltage, active current, and reactive current respectively. The dq-am transformation and the d-q decoupling c

21、ontrol can be found in 29, which is similar with the classical d-q decoupling control in a three-phase system. PCC voltage feed-forward control is also implemented so that the distortion of the grid voltage will not affect the controller since only the L-type filter is adopted in this paper. In the

22、DC voltage loop, a notch filter at 120Hz is added to the feedback loop to eliminate the second harmonic component in the DC capacitor voltages by assuming that the grid frequency is 60Hz. If the controller only considers the DC capacitor voltages balanced condition and only controls the total DC vol

23、tages, it is called the original system controller in this paper. If the system is unbalanced, certain modification has to be made for active component of duty cycles, which are 1d ,2d , n d , as shown in dotted arrow, and these are given by an additional voltage balancing controller. Since the tota

24、l DC voltage is already regulated by the original system controller, only N-1 additional DC voltage control loop can be added. If the duty modification of the last one is not well designed, this additional voltage-balancing controller is coupled with original system controller. The effort of this pa

25、per is to minimize the coupling effect between the original system controller and the voltage balancing controller as such they can be designed separately.III. A N EW V OLTAGE B ALANCING C ONTROLLER WITH M INIMUM E FFECT T O THE O RIGINAL C ONTROLLER A. Theoretical AnalysisDC voltage in each capacit

26、or may become imbalanced for many reasons such as different loads connected to each DC port. Although the total voltage is still controlled by the original system controller, the unequal distribution of voltage among H-bridges exists. Active power should be re-distributed among H-bridge modules in o

27、rder to achieve voltage balance.+v 1s drefidH /s wL NE/s wL NEs d v v si 1/s baseI +Fig. 3 D-q coordinate controller for N H-bridges cascaded multilevel converterThe dynamic equation for the original system controller can be described by (3, where d d and q d are active and reactive duty cycle gener

28、ated by it. The average voltage of each DC output is assumed to be E , which should be selected as the reference for the DC voltage balance controller as shown in (4. This will be further explained in detail in part IV. sd s s sd s sq sd dsqss sq s sd sq q diL R i wL i v N dtdi L R i wL i v N Ed dt=

29、+=+ (31Ndci i N E v = (4When DC voltages become imbalanced, voltages in DC ports are denoted as ( 1.dci v i N = and ,( 1.di qi d d i N = are the modified duty cycles. The dynamic equation for the system becomes:11Nsd s s sd s sq sd dci dii N sqss sq s sd sq dci qi i diL R i wL i v v d dt di L R i wL

30、 i v v d dt =+=+ (5 This can be rewritten as:11(Nsd s s sd s sq sd d d dci di i N sqs s sq s sd sq q q dci qi i diL R i wL i v N Ed N Ed v d dt di L R i wL i v N Ed N Ed v d dt =+=+(6Comparing equation (6 with (3, it is clear that1(Nd dci di i N v d = and 1(Nq dci qi i N v d =are the additional term

31、sadded by the voltage balancing controller. If an advanced modulation strategy is adopted, these two terms will be zero since duty cycles are not modified. However if feedback closed loop regulation is adopted, duty cycle is modified for each H-bridge thus making the first term unequal to zero. The

32、key strategy in this paper is to eliminate this additional term so that the voltage-balancing controller will not affectthe pre-designed original system controller. Define the coupling index as follows:22111(NNd di dci d d i dci i i J N Ed d v N Ed d d E v =+(7221(Nq qi dci i J N Ed d v = (8Where, i

33、 d is the modification of duty cycle and dci v is the error between the reference and the feedback voltage for each DC output.Since the reactive duty cycle are not modified and this means q qi d d =. (8 is already zero since E is chosen as shown in (4. The problem of how to minimize 1J can be achiev

34、ed if equation (9 is satisfied.1(Ndi dci d i dd E v N Ed =+= (9Expand (5 further leads to:1111NNNNd d dci i i dci d i i i i d E d v d E d v N Ed =+= (10Equation (10 can be simplified as:111(NN Ndcii dci i dci d i i i E vd v d v d = (11Since there are altogether N DC voltages needed to becontrolled a

35、nd the total DC voltage has already been regulated by the original system controller, only N-1 closed loop regulator can be added in order to ensure the stability of the control system. Without losing generality, the modifications of duty cycles for the first N-1 H-bridges are generated by a PI cont

36、roller, thus to eliminate the difference between the feedback value and the reference value.( 1.1i pi dcref dci ii dcref dci d k v v k v v i N =+= (12 Then the modification of active duty cycle in Nth H-bridge should meet (13 in order to minimize the coupling effect.111NN dci d dci ii i N dcNv d v d

37、 d v = (13If the total DC voltage is controlled properly, which means the voltage difference comes out among H-bridges while the total DC bus voltage is controlled well, then the following approximation is reasonable:10Ndcii v= (14Then the following approximation equation for (13 is satisfied:11N dc

38、i ii N dcNv d d v = (15The proposed voltage-balancing controller is shown in Fig. 4, where ( 1.1edci H i N =are PI controllers for the first N-1 H-bridges. It should be noted that (13 provides the fundamental relationship among modification values of active duty cycles for all H-bridges, which is es

39、pecially important and differs with previous methods especially when DC capacitor voltages are not exactly the same. If the total DC voltage is controlled well, (15 can be adopted as a good approximation, as shown in the dotted line in Fig. 4. 1dc v 2dc v (dc N vFig. 4 Voltage balance controller for

40、 cascaded H-bridge converterB. Comparison of proposed methods with previous methods In order to compare the proposed method with the previous methods proposed in 25-28, which all try to balance the DC bus voltage in the d-q coordinate. The equivalent duty cycle modification expressions in these lite

41、ratures are analyzed below. (1 Method proposed in 25-26The methods proposed in 25 and 26 are based on the per-phase modification concept, and the modifications of duty cycles are defined in (16. This method is theoretically not suitable since it has together N+1 voltage loops to control N DC voltage

42、s, thus may bring oscillation in the system. ( 1.i pi dcref dci ii dcref dci d k v v k v v i N =+= (16(2 Method proposed in 27 The method adopted in 27, which is the same with the one used in 20, is shown in (17. The idea is to distribute the duty cycle to each H-bridge so that the total power trans

43、ferred is guaranteed. The relationship among modifications of duty cycles are satisfied as shown in (18. 1( 1.i pi dcref dci ii dcref dci idi d Ni i k k v v k v v i N k d d k =+= (17 10Nii d= (18(3 Method proposed in 28The method proposed in 28 is actually the same with the method in 27, as illustra

44、ted in (19 The summation of the duty modification equals to zero.11( 1.1i pi dcref dci ii dcref dci N N ii d k v v k v v i N d d =+= (1910Nii d= (20The difference between the proposed method and the previous methods is that it considers the actual DC voltages when designing the voltage-balancing con

45、troller. If assuming that the system has operated in a steady state after the load disturbance, which means the DC bus voltages have converged to the same value, (13 and (15 proposed in this paper are the same with (18 and (20. However, when the cascaded converter is operating as a rectifier with lo

46、ad on each DC port, power in each DC port always changes. Therefore, the DC bus voltage is always in a dynamic state. During these dynamic responses, the DC voltages are actually imbalanced. The addition of the voltage-balancing controller will affect the original system controller dynamics. Take th

47、e coupling index 21(Nd dci di i N v d = as the criterion, itis obvious that the lower the coupling index is, the better the performance is.The comparison is made between the proposed method and the method in 20, 27, and 28. In the comparison, three H-bridges are cascaded to a seven-level converter.

48、The input AC voltage is 110 V and the DC voltages are set to 70 V for each port, which has 25 load connected to it. The inductor is chosen to be 3.5mH , and capacitor is chosen as 900F . Fig. 5 demonstrates the value of 21(Nd dci di i N Ed v d = for bothcases when there is a voltage imbalance caused

49、 by load change at 2s . In this scenario, the load connected to the third H-bridge is changed from 25 to 35 . The red one is the coupling index by adopting the proposed method, and the blue one is the one by adopting the method equivalent to the one proposed in 20,27, and28. It can be observed that

50、before the load disturbance, both values approximate to zero. Unlike the proposed method, in which the value is still zerowhen voltage becomes imbalanced, the value becomes large when imbalance happens and it will decrease as the voltage becomes balanced by using the methods proposed in 20, 27,and 2

51、8.Obviously, the previously proposed methods will bring an additional term to the original system dynamics when the system is imbalanced, and this can be eliminated bythe proposed method. Besides, the coupling interaction becomes worse when the voltage imbalance is serious. Thewider the range of loa

52、d changes, the larger the effect of the additional term to the original system dynamic becomes. Theconsequence of the term 1(N d dci di i N v d =may lead to an unexpected performance of the pre-designed systemcontroller, and this unpredicted effect may be unacceptable. The purpose of the proposed de

53、coupling method is to eliminate this effect so that the two controllers can be designed separately with the desired performance. Fig. 5 Comparison of coupling index between proposed method and previousmethodsC. Discussion of on voltage balancing controller effective range issue The proposed control

54、system contains an original system controller and N-1 voltage-balancing controllers. The PI tuning process should follow certain principles. The original system controller should be designed firstly by assuming that there is no voltage imbalance exists. The design of this controller is the same with

55、 a traditional boost rectifier dual loop control system 10. The output of voltage balancing controller is added to the original system controller output as the modification, so the effective voltage balancing area should be defined, which is mainly limited by the modulation index. Finally, the N-1 D

56、C voltage-balancing controllers can be designed within the preset PI output limitation according to the real operation conditions. The PI parameter tuning is not the key in this paper and is not discussed in detail. The voltage-balancing constraint can be derived as shown below 28. According to the

57、circuit shown in Fig. 1:1Nabis s s i VV jwL I = (21( 1.=+=abi di qi V d d j E i N (22Substitute (22 into (21 and rearrange the terms: 1Ns di i Vd = (23 1= Ns sqi i wL I d E (24 The active power of each H-bridge can be calculated as:( 1.=in i s di di sPP I d E d E i N V (25When loads connected to DC ports are different, the active power consumed by them is different. Without losing generality, assume that