课件无线录音笔

1、bq500412ZHCSBW1A NOVEMBER 2013 REVISED DECEMBER 2013(WPC) TX A6 的低系统成本，无线电源控制器查询样片: bq500412针对无线电源特性说明bq500412 是一款符合 Qi 标准的超值解决方案，此解针对发射侧应用的，经验证，符合 Qi 标准的WPC1.1 解决方案（适用于 1，2 或 3 线圈配置）针对完全 WPC1.1 12V A6 解决方案的最低器件数量（针对所有线圈的单驱动器级）全新的待机系统配置减少了待机和睡眠功耗，而又决方案集成了控制到单个 WPC1.1 兼容无线电源传输所需的全部功能。 它与 WPC1.1 标准兼容，

2、并且设计用于具有可选升压转换器的 12V，或 5V 系统，作为一个无线电源A6 类型定位。无需额外的器电路bq500412 询问 周围环境以寻找将被供电的 WPC 兼容器件，安全使用器件，接收来自被供电器件的数据包通信并根据 WPC1.1 技术规范管理电源传输。 为了大大经改进的外来物体检测 (FOD) 校准系统配置简化了认证并且提高了较高功率时的准确度（客户可配 置）当使用 5V 输入电压时，针对 USB 和受限电源运增加无线电源控制应用中的灵活性， DynamicerLimiting (DPL) 在器件与 5V 输入电源供电的可选升压转换器一同使用时具有 bq500412 的性能。行的 D

3、ynamicer Limiting数字解调制免除了对于外部滤波器电路的需要10 个表示充电状态和故障状态的可配置发光二极管(LED) 模式Dynamicer Limiting 通过无缝优化受限输入电源上可用功率的用量， 提高了用户体验。 通过持续监控已建立的电源传输的效率，bq500412 支持针对以往产品的外来物体检测 (FOD) 和增强性寄生金属检测 (PMOD)，从而防止由于在无线电源传输场中错误放置金属物体而导致的电源丢失。 如果在电源传输期间发生任何异常情况，bq500412 对其进行处理并提供指示器输出。 综合状态和故障监视特性可实现一个低成本但是稳健耐用的，符合 Qi 标准的无线

4、电源系统设计。bq500412 采用 48 引脚，7mm x 7mm 四方扁平无引线 (QFN) 封装。应用范围(WPC1.1) 兼无线电源线充电器，用于：和其它手持设备符合 Qi 标准的智能汽车和其它车辆配件 TI 无线充电解决方案的见信息，请er系统图和效率与系统输出功率之间的关系12 V Input3.3 VDC RegulatorCurrent SenseWPC A 6 Coil AssemblyHalf- Bridge StageCOMMSignalCoil SelectPlease be awaret an important notice concerning availabil

5、ity, standard warranty, and use in critical applications ofTexas Instruments semiconductor products and diers thereto appears atof this data sheet.Dynamicer Limiting is a trademark of Texas Instruments.PRODUCTION DATA information is current as of publication date. Products conform to specifications

6、per the terms of the Texas Instruments standard warranty. Production pro sing does not ne sarily include testing of all parameters.Copyright 2013, Texas Instruments IncorporatedEnglish Data Sheet: SLUSBO2Efficiency (%)8070605040302010000.511.522.533.544.55er (W)bq500412ZHCSBW1A NOVEMBER 2013 REVISED

7、 DECEMBER 2013These devihave limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foamduring storage or handling to prevenectros ic damage to the MOS gates.ORDERING INFORMATION(1)(1) For the most current package and ordering information, see the Pa

8、ckage Option Addendum at web site atof this, or see the TIUM RATINGS(1)ABSOLUTEover operating free-air temperature range (unless otherwise noted)(1)Stressesthose listed under absoluteum ratings may cause permanent damage to the device. These are stress ratingsonly and functional operation of the dev

9、ice at these or any other conditionsthose indicated undermended operatingconditions is not imp d. Exure to absolute-um-rated conditions for extended periods may affect device reliability.(2)All voltages referenced to GND.2Copyright 2013, Texas Instruments IncorporatedVALUEUNITMAXVoltage app d at V33

10、D to GND0.33.6VVoltage app d at V33A to GND0.33.6Voltage app d to any pin (2)0.33.6Storage temperature,TSTG40150COPERATING TEMPERATURE RANGE, TASUPPLYPACKAGETOP SIDE MARKINGORDERABLE PART NUMBIN COUNT-40C to 110CBQ500412RGZR48 pinReel of 2500QFNBQ500412BQ500412RGZT48 pinReel of 250QFNBQ500412bq50041

11、2ZHCSBW1A NOVEMBER 2013 REVISED DECEMBER 2013MENDED OPERATING CONDITIONSover operating free-air temperature range (unless otherwise noted)THERMAL INFORMATION(1)(2)For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.The juncti

12、on-to-ambient thermalunder natural convection is obtained in a simulation on a JEDEC-standard, high-K board, asspecified in JESD51-7, in an environment descr bed in JESD51-2a.(3)The junction-to-case (top) thermalis obtained by simulating a cold plate test on the package top. No specific JEDEC-standa

13、rd test exists, but a close description can be foundhe ANSI SEMI standard G30-88.(4)The junction-to-board thermal temperature, as described in JESD51-8.is obtained by simulating in an environment wiring cold plate fixture to control the PCB(5)The junction-to-top characterization parameter, JT, estim

14、ates the junction temperature of a device in a real system and is extractedfrom the simulation data for obtaining JA, using a procedure described in JESD51-2a (sections 6 and 7).The junction-to-board characterization parameter, JB, estimates the junction temperature of a device in a real system and

15、is extracted from the simulation data for obtaining JA , using a procedure descr bed in JESD51-2a (sections 6 and 7).(6)(7)The junction-to-case (bottom) thermalis obtained by simulating a cold plate test on the exed (er) pad. No specificJEDEC standard test exists, but a close description can be foun

16、dhe ANSI SEMI standard G30-88.3Copyright 2013, Texas Instruments IncorporatedTHERMAL METRIC(1)bq500412UNITSRGZ48 PINSJAJunction-to-ambient thermal(2)28.4C/WJCtopJunction-to-case (top) thermal(3)14.2JBJunction-to-board thermal(4)5.4JTJunction-to-top characterization parameter(5)0.2JBJunction-to-board

17、 characterization parameter(6)5.3JCbotJunction-to-case (bottom) thermal(7)1.4MYP MAXUNITVSupply voltage during operation, V33D, V33A3.03.33.6VTAOperating free-air temperature range40110CTJJunction temperature110bq500412ZHCSBW1A NOVEMBER 2013 REVISED DECEMBER 2013ELECTRICAL CHARACTERISTICSover operat

18、ing free-air temperature range (unless otherwise noted)4Copyright 2013, Texas Instruments IncorporatedPARAMETERTEST CONDITIONSMYPMAXUNITSUPPLY CURRENTIV33ASupply currentV33A = 3.3 V815mAIV33DV33D = 3.3 V4455ITOTALV33D = V33A = 3.3 V5260ERNAL REGULATOR CONTROLLER INPUTS/OUTPUTSV333.3-V linear regulat

19、orEmitter of NPN transistorVV33FB3.3-V linear regulator feedback44.6IV33FBSeries pass base driveVIN = 12 V; current o V33FB pin10mABetaSeries NPN pass device40EXTERNALLYD 3.3 VERV33DDigital 3.3-VerTA = 25C33.6VV33Aog 3.3-VerTA = 25C33.6V33SlewV33 slew rateV33 slew rate betn 2.3 V and 2.9 V

20、, V33A = V33D0.25V/msDIGITAL DEMODULATION INPUTS COMM_A+, COMM_A-, COMM_B+, COMM_B-VbiasCOMM+ Bias Voltage1.0VCOMM+,Modulation voltage digital resolution COMM-1mVREAInput impedanceGround reference0.51.53MIOFFSETInput offset current1-k source impedance55AOG INPUTS V_SENSE, I_SENSE, T_SENSE, LED_MODE,

21、 LOSS_THR, SNOOZE_CAP, PWR_UPVADDR_OPENVoltage indicating open pinLED_MODE open2.37VVADDR_SHORTVoltage indicating pin shorted to GNDLED_MODE shorted to ground0.36VADC_RANGEMeasurement range for voltage monitoringALLOG INPUTS02.5INLADC egral nonlinearity-2.52.5mVRINInput impedanceGround reference8MCI

22、NInpapacitance10DIGITAL INPUTS/OUTPUTSVOLLow-level output voltageIOL = 6 mA , V33D = 3 VDGND1+ 0.25VVOHHigh-level output voltageIOH = -6 mA , V33D = 3 VV33D- 0.6VVIHHigh-level input voltageV33D = 3V2.13.6VILLow-level input voltageV33D = 3.5 V1.4IOH(MAX)Output high source current4mAIOL(MAX)Output low

23、 sink current4SYSTEM PERFORMANCEVRESETVoltage where device comes out of resetV33D Pin2.4VtRESETPulse width needed for resetRESET pin2sfSWSwitching Frequency112205kHzbq500412ZHCSBW1A NOVEMBER 2013 REVISED DECEMBER 2013DEVICE INFORMATIONFunctional Block Diagram678922251813PMOD LED_A LED_B SLEEP FOD_CA

24、L LED_C SNOOZEFODbq500412LED Control /LowerCOMM_A+37erface-38Digital DemodulationM_B+39COMM_B-4012151617-A COIL_1 COIL_2COIL_3ControllerCOIL_PEAK1V_SENSE45I_SENSE4212-bit ADC23BUZ_ACBuzzerT_SENSE2Control24BUZ_DCLOSS_THR43PORLED_MODE4411DATAI2CSNOOZE_CAP310CLK5RESET5Copyright 2013, Texas Instruments

25、Incorporatedbq500412ZHCSBW1A NOVEMBER 2013 REVISED DECEMBER 2013RGZ Package (Top View)COIL_PEAK T_SENSE SNOOZE_CAPPWR_UPGND BPCAP V33AV33D GNDGNDRESET PMODLED_A LED_B SLEEPCLK DATA_ALED_C6Copyright 2013, Texas Instruments IncorporatedFODADCREF GND V_SENSE V_SENSELED_MODELOSS_THR I_SENSECOIL_1 COIL_2

26、 COIL_3SNOOZE- M_B+ COMM_A-COMM_A+SNOOZE_CHGFOD_CAL BUZ_ACBUZ_DC48 47 46 45 44 43 42 41 40 39 383713623533443353263173082992810271126122513 14 15 16 17 18 19 20 21 22 23 24bq500412bq500412ZHCSBW1A NOVEMBER 2013 REVISED DECEMBER 2013PIN FUNCTIONS7Copyright 2013, Texas Instruments IncorporatedPINI/ODE

27、SCRIPTIONNO.NAME1COIL_PEAKIConnected to peak detect circuit. Protects from coil overvoltage event.2T_SENSEISensor Input. Devihuts down when below 1 V for longern 150ms. If not used, keep above 1 V by connecting to the 3.3-V supply.3SNOOZE_CAPIConnected toerval timing capacitor4PWR_UPIer-up indicator

28、5RESETIDevice reset. Use a 10-k to 100-k pull-up resistor to the 3.3-V supply.6PMODOSelect for PMOD threshold7LED_AIConnect to an LED via 470- resistor for s us indication. Typically GREEN8LED_BIConnect to an LED via 470- resistor for s us indication. Typically RED9SLEEPOForLEEP (5 sec lower)10CLKI/

29、O10-k pull-up resistor to 3.3-V supply. Please contact field fUI application assitance.11DATAI/O10-k pull-up resistor to 3.3-V supply. Please contact field fUI application assitance.12_AOOutput A, controls one half of the full bridge in a phase-shifted full bridge. Switching deadtimes must be extern

30、ally generated.13FODOSelect for FOD threshold14O. Leave open.15COIL_1OSelectcoil16COIL_2OSelect second coil17COIL_3OSelect third coil18SNOOZEOForNOOZE (500ms lower)19O, leave this pin open.20I, connect to GND.21SNOOZE_CHGOCharge the snooze cap22FOD_CALOSelect for FOD calibration resistor23BUZ_ACOAC

31、Buzzer Output. Outputs a 400-ms, 4-kHz AC pulse when charging begins.24BUZ_DCODC Buzzer Output. Outputs a 400-ms DC pulse when charging begins. This could also be connected to an LED via 470- resistor.25LED_CI/OConnect to an LED via 470- resistor for s us indication. Typically YELLOW26I/O, connect t

32、o GND.27I/O, leave this pin open.28I/O, leave this pin open.29I/O, leave this pin open.30I/O, leave this pin open.31GNDI/O, connect to GND.bq500412ZHCSBW1A NOVEMBER 2013 REVISED DECEMBER 2013PIN FUNCTIONS (continued)8Copyright 2013, Texas Instruments IncorporatedPINI/ODESCRIPTIONNO.NAME32GNDGND.33V3

33、3DDigital core 3.3-V supply. Be sure to decouple with bypass capacitors as close to the part as sible.34V33Aog 3.3-V Supply. This pin can be derived from V33D supply, decouple with 10- resistor and additional bypass capacitors35BPCAPBypass capacitor forernal 1.8-V core regulator. Connect bypass capa

34、citor to GND.36GNDGND.37COMM_A+IDigital demodulation non-inverting input A, connect parallel to input B+.38COMM_A-IDigital demodulation inverting input A, connect parallel to input B-.39COMM_B+IDigital demodulation non-inverting input B, connect parallel to input A+.40COMM_B-IDigital demodulation in

35、verting input B, connect parallel to input A-.41O, leave this pin open.42I_SENSEITransmitter inpurrent, used for efficiency calculations. Use 20-m sense resistor and A=50 gain currenselifier.43LOSS_THRIInput to program FOD/PMOD thresholds and FOD_CAL correction.44LED_MODEIInput to select from four L

36、ED modes.45V_SENSEITransmitter input voltage, used for efficiency calculations. Use 76.8-k to 10-k divider to minimize quiescent current.46V_INISystem input voltage, used for DPL. Use 76.8-k to 10-k divider to minimize quiescent current.47GNDGND.48ADCREFIExternal Reference Voltage Input. Connect thi

37、s input to GND.49EPADFlood with copper GND plane and stitch vias to PCBernal GND plane.bq500412ZHCSBW1A NOVEMBER 2013 REVISED DECEMBER 2013Principles of OperationFundamentalsThe principle of wirelesser transfer is simply an open cored transformer consisting of prind secondarycoils and assoted electr

38、onics. The primary coil and electronics are also referred to as the transmitter, and thesecondary side the receiver. The transmitter coil and electronics are typically builto a chargad. Thereceiver coil and electronics are typically builto a portable device, such as a.When the receiver coil isitione

39、d on the transmitter coil, magnetic coupling occurs when the transmitter coil isdriven. The flux is coupledo the secondary coil which indua voltage, current flows, it is rectified andercan be transferred quite effectively to a load - wirelessly. familiar closed-loop control schemes.er transfer can b

40、e managed via any of variousWirelesser Consortium (WPC)The Wirelesser Consortium (WPC) is anernational group of companies from diverse industries. The WPCstandard was developed to facilie cross compatibility of compliant transmitters and receivers. The standard defines the physical parameters and th

41、e communication protocol to be used in wirelesser. For moreinformation, go to.er Transferer transfer depends on coil coupling. Coupling is dependent on the distance betn coils, alignment, coildimens, coil materials, number of turns, magnetic shielding, impedance matching, frequency and duty cycle.Mo

42、st importantly, the receiver and transmitter coils must be aligned for best coupling and efficienter transfer.The closer the space betn the coils, the better the coupling, but the practical distance is set to be lessn 5 mm (as defined withhe WPC Specification) to account for housing anderfaurfa.Shie

43、lding is added as a backing to both the transmitter and receiver coils to direct the magnetic field to the coupled zone. Magnetic fields outside the coupled zone do not transf ower. Thus, shielding also serves to conta he fields to avoid coupling to other adjacent system components.Regulation can be

44、 achieved by controlling any one of the coil coupling parameters. For WPC compatibility, the transmitter coils and capacitance are specified and the resonant frequency po is fixed. er transfer is regulated by changing the operating frequency bet n 120 kHz to 205 kHz. The higher the frequency, the fu

45、rther from resonance and the lower the er. Duty cycle remains constan 50% throughout the er band and is reduced only once 205 kHz is reached.The WPC standard describes the dimenand materials of the coils. It also has information on tuning the coilsto resonance. The value of the inductor and resonant

46、 capacitor are critical to proper operation and system efficiency.9Copyright 2013, Texas Instruments Incorporatedbq500412ZHCSBW1A NOVEMBER 2013 REVISED DECEMBER 2013CommunicationCommunication withhe WPC is from the receiver to the transmitter, where the receiverls the transmitter tosender and how mu

47、ch. In order to regulate, the receiver must communicate with the transmitter whether toincrease or decrease frequency. The receiver monitors the rectifier output and using litude Modulation (AM), sends packets of information to the transmitter. A packet is comprised of a preamble, a header, the actu

48、al message and a checksum, as defined by the WPC standard.The receiver sends a packet by modulating an impedance network. This AM signal reflects back as a change in the voltage litude on the transmitter coil. The signal is demodulated and decoded by the transmitter side electronics and the frequenc

49、y of its coil drive output is adjusted to close the regulation loop. The bq500412 features ernal digital demodulation circuitry.The modulated impedance network on the receiver can either be resistive or capacitive. Figure 1 shows the resistive modulation approach, where a resistor is periodically ad

50、ded to the load and also shows the resulting change in resonant curve which causes the litude change he transmitter voltage indicated by the two operating po s at the same frequency. Figure 2 shows the capacitive modulation approach, where a capacitor is periodically added to the load and also shows

51、 the resulting litude change he transmitter voltage.RectifierReceiver CapacitorAmaxReceiver CoilModulation ResitorOperating s eogic “0”A(0)Operating s eogic “1”A(1)CommFswF, kHza)b)Figure 1.Receiver Resistive Modulation CircuitRectifierReceiver CapacitorReceiver CoilModulation Capacitorseogic “ 0”eo

52、gic “ 1”CommFswF, kHzFo(1) Fo(0)a)b)Figure 2.Receiver Capacitive Modulation Circuit10Copyright 2013, Texas Instruments IncorporatedAmaxA(0)A(1)Operating sOperating sbq500412ZHCSBW1A NOVEMBER 2013 REVISED DECEMBER 2013Application InformationCoils and Matching CapacitorsThe coil and matching capacitor

53、 selection for the transmitter has been established by WPC standard. These values are fixed and cannot be changed on the transmitter side.An up to daist of available and compatible A6 transmitter coils can be found here (Texas InstrumentsLiterature Number SLUA649):Capacitor selection is critical to

54、proper system operation. The total capacitance value of 147nF is requiredhe center coil of the resonant. This capacitance is not a standard value and therefore several must becombined in parallel. It ismended to use 100nF + 47nF, as these are very commonly available.NOTEA total capacitance value of

55、147nF/100 V/C0G is requiredhe center coil and133nF/100V/C0Ghe side coils of the resonant frequency.to achieve the desired resonanceThe capacitors chosen must be rated for 100 V operation. Use quality C0G type dielectric capacitors from reputable vendorch as KEMET, MURATA or TDK.Dynamicer LimitingWin

56、 optional 5-V to 12-V boost converter, a 5-V inpan enable a 12-V WPC A6 transmitter. The Dynamicer Limiting (DPL) feature allows operation from a 5-V supply with limited current capability (such as a USBport). When the 5-V input voltage is observed droo, the outputer is dynamically limited to reduce

57、 the load and provides margin relative to the supplys capability.Anytime the DPL control loop is regulating the operating po of the transmitter, the LED will indicate t DPL is active. The LED color and flashing pattern are determined by the LED Table. If the receiver sends a Control Error Packet (CE

58、P) wi negative value, (for ex le, to reduce er to the load), the transmitter in DPL mode will respond to this CEP via the normal WPC control loop.NOTEer limit indication depends on the LED_MODE selected.The11Copyright 2013, Texas Instruments Incorporatedbq500412ZHCSBW1A NOVEMBER 2013 REVISED DECEMBE

59、R 2013Option Select PinsSeveral pins on the bq500412 are allocated to programming the FOD and PMOD Loss Threshold and the LED mode of the device. At er up, a bias current is app d to pins LED_MODE and LOSS_THR and the resulting voltage measured in order to identify the value of the attached programm

60、ing resistor. FOD, PMOD and FOD_CAL pin values are enabled and read sequentially from the same LOSS_THR bias current. The values of the operating parameters set by thes ns are determined using Table 2. For LED_MODE, the selected bin determines the LED behavior based on Table 1; for the LOSS_THR, the