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1、Topics1. i.MX6 HW Design Reference Board. (go through schematic of i.MX6 SDP)2. i.MX6 Hardware Development Guide. (IMX6DQ6SDLHDG.pdf)3. i.MX HW Checking List. (Excel file of i.MX6 HW Design Checking List) 4. i.MX6X Power design5. DDR Calibration and Stress Test.6. IOMux Tool7. i.MX6X Hardware bring

2、up1IMX硬件设计指南与硬件启动医学知识讲解10/3/2022Topics1. i.MX6 HW Design Referi.MX6 HW Design Reference Board.2IMX硬件设计指南与硬件启动医学知识讲解10/3/2022i.MX6 HW Design Reference BoarRelated Hardware materials SABRESDP_DESIGNFILES.zip/SABRE_AI_DESIGNFILES.zip: SDP/AI board schematic/layout.IMX6DQ6SDLHDG.pdf: i.MX6X hardware des

3、ign guide, include schematic/layout checkpoints, iomux tools, bring up, IBIS/BSDL, RMII interface.IMX6DQ/DLS_A/I/CEC.pdf: i.MX6X Datasheet: include chipset electrical Characteristics like the voltage range, Max current and Power sequence.IMX6DQ/DLS_RM.pdf: i.MX6X Chipset reference manual.AN4509: i.M

4、X6DQ Power Consumption Measurement.AN4576: i.MX6DLS Power Consumption Measurement.IMX6_IOMUX_TOOL: iomux configuration tools.Mfgtools-Rel-4.1.0_130816_MX6Q_UPDATER.tar.gz: MFG tools.L3.0.35_4.1.0_130816_images_MX6.tar.gz: linux demo image.HW Design Checking List for i.Mx6 Rev2.6.xlsx: i.MX6X hardwar

5、e check list, download from : /docs/DOC-93819DDR_Stress_Tester_v1.0.3.zip: DDR test tools, download from: /docs/DOC-96412i.Mx6DQSDL DDR3 Script Aid: DDR configuration tools, Download from: /docs/DOC-94917Freescale i.MX6 DRAM Port Application Guide-DDR3 /docs/DOC-1017083IMX硬件设计指南与硬件启动医学知识讲解10/3/2022R

6、elated Hardware materials SABi.MX6 Reference Solution Related MaterialSelect “SABRE Platform for Smart Devices”Hardware Material (Schematic, PCB, Gerber. etc);4IMX硬件设计指南与硬件启动医学知识讲解10/3/2022i.MX6 Reference Solution Relat SABRE Board for Smart Devices (SDB)i.MX 6Quad 1Ghz Cortex-A9 ProcessorCan be con

7、figured as i.MX 6DualFreescale MMPF0100 PMIC 1 GB DDR3 memory (non terminated)3” x 7” 8-layer PCBDisplay connectors2x LVDS connectorsConnector for 24 bit 4.3” 800 x480 WVGA with4-wire touch screenHDMI Connector AudioWolfson Audio CodecMicrophone and headphone jacksExpansion ConnectorCamera CSI port

8、signalsI2C, SSI, SPI signalsConnectivity2x Full-size SD/MMC card slot22-pin SATA connector10/100/1000 Ethernet port1x high-speed USB OTG portmPCI-e connectorDebugJTAG connectorSerial to USB connectorAdditional Features3-axis Freescale accel eCompassPower supplyNo battery charger OS SupportLinux and

9、Android JB from Freescale; Others: support by 3rd partiesTools SupportLauterbach, ARM (DS-5), Macraigor debug/IDE tool chainPart Numbers:MCIMX6Q-SDB ($399)Display (9.7”): MCIMX-LVDS1 ($499)Display (4.3”):MCIMX28LCD ($199)5IMX硬件设计指南与硬件启动医学知识讲解10/3/2022 SABRE Board for Smart DeviSABRE Platform for Sma

10、rt Devices (SDP)i.MX 6Quad 1GHz Cortex-A9 Processori.MX 6DualLite 1GHz Cortex-A9 ProcessorFreescale MMPF0100 PMIC 1 GB DDR3 memory (non terminated)3” x 7” 8-layer PCBDisplay connectorsNative 1024x768 LVDS display (comes with kit)2nd LVDS connectorConnector for 24 bit 4.3” 800 x480 WVGA with4-wire to

11、uch screenHDMI Connector MIPI DSI connector AudioWolfson Audio CodecMicrophone and headphone jacksDual 1W SpeakersExpansion ConnectorEnables parallel LCD or HDMI outputCamera CSI port signalsI2C, SSI, SPI signalsConnectivity2x Full-size SD/MMC card slot22-pin SATA connector10/100/1000 Ethernet port1

12、x high-speed USB OTG portmPCI-e connectorDebugJTAG connectorSerial to USB connectorAdditional Features3-axis Freescale accel GPS receiverAmbient Light SensoreCompassDual 5MP Cameras Power supplyBattery ChargerBattery connectors OS SupportLinux and Android JB from Freescale; Others: support by 3rd pa

13、rtiesTools SupportLauterbach, ARM (DS-5), Macraigor debug/IDE tool chainPart Numbers:MCIMX6Q-SDP ($999) MCIMX6DL-SDP ($999)Display (4.3”): MCIMX28LCD ($199)WiFi:Silex WiFi module6IMX硬件设计指南与硬件启动医学知识讲解10/3/2022SABRE Platform for Smart DevicSABRE Platform for Automotive Infotainment (AI)Power and Memor

14、yFreescale MMPF0100 PMIC 2 GB DDR3 memory (i.MX 6Dual/Quad)1GB DDR3 memory (i.MX 6Solo)32GB Parallel NOR FlashNAND SocketDisplayLVDS connector compatible with MCIMX-LVDS1Parallel RGB display interfaceHDMI output connectorDebugJTAG connectorDebug UART connectorConnectivity and ExpansionSD Card SlotHi

15、gh Speed USB OTGEthernetSATAMIPI CSIPCIeMLB150 INIC connector281-pin MXM card edge connector for main board expansionCan be reused from i.MX53 SABRE AIConnectivity and ExpansionSD card slot (WiFi module or SD)Bluetooth or Bluetooth+WiFi headerAM/FM tuner headerSirius XM Module header (de-popd)GPS (U

16、ART) module connector2x CANDual High Speed USB Host connectorsMLB 25/50 INIC connectorSPI NOR flashDisplay I/OLVDS connector compatible with MCIMX-LVDS1Analog Video InputLVDS InputAudioCirrus multichannel audio codecUp to 8 outputsDual microphone inputsStereo Line Level InputSPDIF receiverOS Support

17、Linux Others: future support by 3rd partiesCPU Card DetailsBase Board DetailsPart NumbersBase Board:MCIMXABASEV1 ($699)CPU Cards: MCIMX6SAICPU1 ($799)MCIMX6QAICPU1 ($799)Display: MCIMX-LVDS1 ($499)7IMX硬件设计指南与硬件启动医学知识讲解10/3/2022SABRE Platform for Automotive i.MX6 SMART DEVICE SYSTEM Block Diagram8IMX

18、硬件设计指南与硬件启动医学知识讲解10/3/2022i.MX6 SMART DEVICE SYSTEM Bloci.MX6 SMART DEVICE SYSTEM Schematic Here, open i.MX6 SabreSD Schematic, go through it.9IMX硬件设计指南与硬件启动医学知识讲解10/3/2022i.MX6 SMART DEVICE SYSTEM Schei.MX6 Hardware Development Guide.10IMX硬件设计指南与硬件启动医学知识讲解10/3/2022i.MX6 Hardware Development GuiSugg

19、estion:Pre-design: Study the datasheet, power consumption, schematic to understand our chipset requirement.In-design: Check the hardware design guide, iomux toolsAfter-design: Fill the HW design checking list, provide the iomux data to software.Hardware-bring up: Check the power, power sequence, clo

20、ck, reset, provide the boot configuration to software, run ddr test.Debug port: Suggest to haveUSB OTG Port: For image program, You can use it as USB host port, no problem. MFG just use USB device mode.Debug serial port, i.MX6X uboot can change to support every serial port as debug port.Sdcard slot:

21、 Suggest to keep at least one Sdcard slot, it will help to use the Sdcard boot, which can burn image directly from PC to Sdcard. No need to debug the MFG kernel.Jtag(optional).Suggest to use the GPIO Boot_cfg but not the fuse Boot_cfg. And boot mode pin can be pulled, because we can use the non-imag

22、e boot to enter the download mode11IMX硬件设计指南与硬件启动医学知识讲解10/3/2022Suggestion:Pre-design:11IMX硬件设i.MX6 Hardware Development Guide Here, open , go through it.1). Design Checklist2). i.MX 6 Series Layout Recommendations3). Requirements for Power Management4). Avoiding Board Bring-up Problems12IMX硬件设计指南与硬

23、件启动医学知识讲解10/3/2022i.MX6 Hardware Development Guii.MX HW Checking List.13IMX硬件设计指南与硬件启动医学知识讲解10/3/2022i.MX HW Checking List.13IMX硬件设i.MX HW Checking ListHere, open , go through it.Clear1Is voltage level matched on bus/signal/logic/buffer two side? Clear2Suggest drawing pull-ups near pin area with pow

24、er domain description in schematic.Clear3Please take care clock source can meet requirement of peripheral devices. (frequency/driving capability/jitter/tolorance/fly-time etc.)Clear4When Buffer/Level shifter/switch are used, SI impaction on signal should be considered.Clear5The control signals polar

25、ity for Direction Sellect/EN/RESET should be checked for all the devices.Clear6IO configuration should be checked using IOMUX Tool which provided by Freescale.Clear7The TEST and FAULT mode inputs of the individual chips should be tied to the proper level for normal operation.Clear8Pin sequence/direc

26、tion/genders of connector should be confirmed with Mechnical consideration.Clear9Pull-ups and voltages should be verified for OC/OD signals.Clear10Proper pull-up and pull-down resistor values provided to avoid excess sourcing or sinking current.Clear11The polarities of the caps and diodes connected

27、to ve voltages should be verified.Clear12Suggest all active low signals-include “_B” at end of the signal net name and all clock signals include “CLK” as part of net name.Clear13Please confirm if all power source have sufficient power capacity and good enough ripple noise level for requirement of po

28、wer input.Clear14Power on/off sequencing should be verified when multiple power sources are used.Clear15The current rating of Diodes/Inductors used in the power supply and other high current sections should be provided properly.Clear16Please pay attention on EMI/EMC/ESD/Ligtening consideration (deco

29、upling caps/TVS diodes/chokes/filters/beads/fuese etc).Clear17Please confirm if unused pins are configured properly following formal recommend.Clear18Please confirm boot mode and configuration pins are set properly and can meet the actual boot requirment.Clear19Please take care watch dog/cold/key re

30、set system design, PMIC and boot device also should be reset at same time.14IMX硬件设计指南与硬件启动医学知识讲解10/3/2022i.MX HW Checking ListHere, opei.MX6X Power design15IMX硬件设计指南与硬件启动医学知识讲解10/3/2022i.MX6X Power design15IMX硬件设计指南i.MX 6 Power Related docIMX6DQCEC.pdf: i.MX 6Dual/6Quad Applications Processors for C

31、onsumer ProductsAN4509.pdf: i.MX 6Dual/6Quad Power Consumption MeasurementIMX6SDLCEC.pdf: i.MX 6Solo/6DualLite Applications Processors for Consumer ProductsAN4576.pdf: i.MX 6DualLite Power Consumption MeasurementSDP schematic(PF0100): SPF-27392.pdfSaberlite schematic(Discrete DCDC)(from boundarydevi

32、ces)IMX6DQ6SDLHDG.pdf(optional): Design Checklist: Table 2-6. Power and decouple recommendations16IMX硬件设计指南与硬件启动医学知识讲解10/3/2022i.MX 6 Power Related docIMX6DQPower Supply, and Common Hardware Design17IMX硬件设计指南与硬件启动医学知识讲解10/3/2022Power Supply, and Common Hardwi.MX 6 System - Power Design Consideration

33、sSystem Power Requirements(on each power rail)Max Current requirementVoltage rangeSystem Over-Voltage ProtectionPower On SequencingSystem control functionsLayout& decouple18IMX硬件设计指南与硬件启动医学知识讲解10/3/2022i.MX 6 System - Power Design Ci.MX 6 Power Rail RequirementsTo Function properly, the i.MX6 Proces

34、sor requires nine different power rails (Some may be combined)VDDARM Power to ARM CoresAllowed voltage: 0.9V 1.5VVDDSOCVP Power to on chip System Peripherals (VDDSOC_CAP):HDMI PHY, SATA PHY, PCIE PHY, & ARM Core CachePower to Image processing modules (VDDPU_CAP)VPU, GPU2D, GPU3D, OpenVGAllowed volta

35、ge: 0.9V 1.5V19IMX硬件设计指南与硬件启动医学知识讲解10/3/2022i.MX 6 Power Rail Requirementsi.MX 6 Power Rail Requirements (con)VDDHIGH VPH Power to on chip System Peripherals (VDDHIGH_CAP)MIPI, HDMI, SATA, PCIE, LVDS, USB, PLLsPower to misc Peripherals (NVCC_PLL_OUT)USD, PLLs, 24 MHz Osc.Shared power of SNVS moduleA

36、llowed voltage: 2.7V 3.3VVSNVS32 KHz Oscillator and SRTC functionsShared power of SNVS moduleAllowed voltage: 2.8V 3.3V20IMX硬件设计指南与硬件启动医学知识讲解10/3/2022i.MX 6 Power Rail Requirementsi.MX 6 Power Rail Requirements (con)USB_H1/OTG_VBUS Power to USB PHYAllowed voltage: 4.4V 5.25VNVCC_DRAMPower supply for

37、 DRAM memoryAllowed voltage: 1.14V 1.575V (Depends on type DRAM)Ethernet IO pins (NVCC_RGMII)Allowed voltage: 1.14 1.9VGeneral IO pins (NVCC_)Typically 1.8V or 3.3VAllowed voltage: 1.65V 3.6V21IMX硬件设计指南与硬件启动医学知识讲解10/3/2022i.MX 6 Power Rail Requirementsi.MX 6 Power Rail Requirements - SummaryIn a typ

38、ical application, six different voltages are required for the processor to function: FunctionTypical Voltage VDDARM, VDDSOC 1.375V VDDHIGH, VSNVS 3.0V USB_VBUS 5.0V NVCC_DRAM 1.5V NVCC_3.3V 3.3V NVCC_1.8V 1.8V22IMX硬件设计指南与硬件启动医学知识讲解10/3/2022i.MX 6 Power Rail Requirementsi.MX6 Power Requirements VDDAR

39、M, VDDSOCDatasheet Max Requirements for VDDARM: 3920 mADatasheet Max Requirements for VDDSOC:1890 mATypical Maximum Current Requirements (AN4509):Showing three separate video outputs1080p Video playback HDMI1080p Video playback IPU Parallel port (LCD)3D graphics through LVDS portVDDARM: 1625 mAVDDSO

40、C: 1250 mA23IMX硬件设计指南与硬件启动医学知识讲解10/3/2022i.MX6 Power Requirements VDDi.MX6 Power Requirements VDDHIGH, VSNVSDatasheet Max Requirements for VSNVS: 300 uAPull Up resistors on VSNVS will add to current requirementsDatasheet Max Requirements for VDDHIGH:160 mATypical Maximum Current Requirements (AN4509

41、):VDDHIGH: 85 mA24IMX硬件设计指南与硬件启动医学知识讲解10/3/2022i.MX6 Power Requirements VDDi.MX6 Power Requirements DRAM, IO PinsDatasheet Max Requirements for DRAM: 1900 mATypical Maximum Current Requirements (AN4509):DRAM: 1390 mADatasheet requirements for IO Pins, use:I(A) = N x C x V x (0.5 x F)N Number of IO p

42、ins suppliedC Equivalent external capacitive load (Farads)V IO voltage (Volts)(0.5 x F) Data change rate, where F = Frequency (Hz)Typical = 2 - 3 mA for a 3.3V pin25IMX硬件设计指南与硬件启动医学知识讲解10/3/2022i.MX6 Power Requirements DRASummary Power RequirementsPower RailVoltageTypicalMaximumVDDARM1.375 V1625 mA3

43、920 mAVDDSOC1.375 V1250 mA1890 mAVDDHIGH2.8V 85 mA 160 mAVSNVS3.0 V - 300 uADRAM1.5 V1390 mA1900 mAUSB 5.0 V 500 mA 530 mAI/O Pins3.3 V 300 mA 500 mA*I/O Pins1.8 V 50 mA 275 mA* Maximum values are mutually exclusive26IMX硬件设计指南与硬件启动医学知识讲解10/3/2022Summary Power RequirementsPoweTypical Consumer Device

44、Power RequirementsFunctionVoltageTypicalMaximumSD Card3.3 V100 mAWIFI/BT3.3 V1000 mA3G/4G Modem3.3 V2000 mA3000 mALVDS3.3 / 5 V300 / 370 mAHDMI5 V50 mAEthernet3.3 V130 mAAudio1.8 / 5 V40 / 100 mA80 / 530 mASATA5 V500 - 1000 mA1500 mAeMMC3.3 V100 mA200 mACAN5 V70 mAGPS1.5 / 3.3 V20 / 100 mACamera1.5

45、/ 1.8 V150 / 20 mA27IMX硬件设计指南与硬件启动医学知识讲解10/3/2022Typical Consumer Device Power Grand Total Power RequirementsVoltageTypicalFull Power1.375 V1875 mA5800 mA1.5 V1500 mA2300 mA1.8 V 100 mA 350 mA3.0 V 160 mA 200 mA3.3 V2000 mA5000 mA5.0 V1500 mA3300 mA28IMX硬件设计指南与硬件启动医学知识讲解10/3/2022Grand Total Power Re

46、quirementsi.MX 6 System - Power Design ConsiderationsTotal System Power RequirementsTypical System requirements (5V source): 2.9ATypical System requirements (3.7V source): 4.1ASystem Over-Voltage ProtectionSelect Power components with high voltage toleranceDesign Over-Voltage protection sub-systemUs

47、er battery charging circuit with protection.Power On SequencingSystem control functionsStand-by, reduced power options29IMX硬件设计指南与硬件启动医学知识讲解10/3/2022i.MX 6 System - Power Design Ci.MX 6 System - Power On/Off SequencingPower On SequencingVDD_SNVS_IN= VDDHIGH_IN any other power supply(FSL suggest VDDH

48、IGN_IN power with VDD_SNVS_IN or in step 2)VDDARM_IN= (VDDSOC_IN-1ms); Vvddarm_cap=(Vvddsoc_cap+50mV): If VDDARM_IN and VDDSOC_IN are connected to different external supply sourcesPower Off Sequencing N/ANotes:Need to ensure that there is no back voltage (leakage) from any supply on the board toward

49、s the 3.3 V supply (for example, from the external components that use both the 1.8 V and 3.3 V supplies)USB_OTG_VBUS and USB_H1_VBUS are not part of the power supply sequence and may be powered at any time30IMX硬件设计指南与硬件启动医学知识讲解10/3/2022i.MX 6 System - Power On/Off SIMX6DQ6SDLHDG: Table 2-6. Power a

50、nd decouple recommendationsVGEN5 for VDDHIGH_IN and increase to 3V to align with datasheetOnly one 22 F bulk capacitor should be connected to each of these on-chip LDO regulator outputs:VDD_ARM/23/SOC/PU_CAP as near as possible with pins/vias. The distance should be less than 50mil between bulk cap

51、and VDD_xx_CAP pins; ripple noise should be less than 5% Vp-p of supply voltage average valueNVCC_LVDS2P5 must be powered-on even when not using the LVDS interface because The DDR pre-drivers share the NVCC_LVDS2P5 power rail with the LVDS interface31IMX硬件设计指南与硬件启动医学知识讲解10/3/2022IMX6DQ6SDLHDG: Table

52、 2-6. Powe32i.MX6 Dual/Quad: 5v INPUT+PFUSE100:SDPIMX硬件设计指南与硬件启动医学知识讲解10/3/202232i.MX6 Dual/Quad: 5v INPUT+PF33i.MX6 Dual/Quad: 5v Discrete PowerIMX硬件设计指南与硬件启动医学知识讲解10/3/202233i.MX6 Dual/Quad: 5v DiscreteDevelop Tools DDR Stress Test34IMX硬件设计指南与硬件启动医学知识讲解10/3/2022Develop Tools DDR Stress TesDDR Stre

53、ss Test ToolWhat is DDR Stress Tester kit? It is downloadable test application architecture. A program running on PC (DDR_Stress_Tester.exe, which running on Command Prompt window) will download the test image to target boards IRAM with the help of UART/USB connection. The test image will do the DDR

54、 stress test and the result will be sent to PC through UART/USB and be printed on the Command Prompt window.For mx6dq, mx6dls or mx6sl, UART is not supported.Support mx53, mx51, mx6dq, mx6dls and mx6sl.35IMX硬件设计指南与硬件启动医学知识讲解10/3/2022DDR Stress Test ToolWhat is DDDDR Stress Test Tool cont.Test Log Li

55、nk36IMX硬件设计指南与硬件启动医学知识讲解10/3/2022DDR Stress Test Tool cont.36IMDevelop Tools IOMux Tool37IMX硬件设计指南与硬件启动医学知识讲解10/3/2022Develop Tools IOMux Tool37IMIOMUX ToolApplication Window Overview38IMX硬件设计指南与硬件启动医学知识讲解10/3/2022IOMUX ToolApplication Window ODownload and Install the Microsoft .NET Framework 4.0/en

56、-us/netframework/aa56926339IMX硬件设计指南与硬件启动医学知识讲解10/3/2022Download and Install the MicroSelect Modules and Signals for BoardCheck the UARTS: UART1, UART2 and UART3.Expand all signals under UART3.40IMX硬件设计指南与硬件启动医学知识讲解10/3/2022Select Modules and Signals forAccessing Muxed-Signal Info41IMX硬件设计指南与硬件启动医学知

57、识讲解10/3/2022Accessing Muxed-Signal Info41IAccessing Muxed-Signal Info42IMX硬件设计指南与硬件启动医学知识讲解10/3/2022Accessing Muxed-Signal Info42IResolve Conflicting SignalsSelect ALT4 EIM_D30(J20) for UART3/CTS.Select ALT4 EIM_D31(H21) for UART3/RTS.Select ALT2 SD4_CLK(E16) for UART3/RXD_MUX.Select ALT2 SD4_CMD(B1

58、7) for UART3/TXD_MUX.43IMX硬件设计指南与硬件启动医学知识讲解10/3/2022Resolve Conflicting SignalsSelAdding Comments for ClarityRight-click the UART2/TXD_MUX row in the Signals tab to bring up the context menu.Clicking on the menu will bring up a text entry field where the user may enter text.44IMX硬件设计指南与硬件启动医学知识讲解10/

59、3/2022Adding Comments for ClarityRigAdding Comments for Clarity45IMX硬件设计指南与硬件启动医学知识讲解10/3/2022Adding Comments for Clarity45IBall Diagram View46IMX硬件设计指南与硬件启动医学知识讲解10/3/2022Ball Diagram View46IMX硬件设计指南与硬Pads “Spreadsheet” View47IMX硬件设计指南与硬件启动医学知识讲解10/3/2022Pads “Spreadsheet” View47IMX硬件Configuring IO

60、MUXC RegistersSelect UART3/RXD_MUX in the left-hand pane.All of the IOMUXC Registers associated with the AD4_CLK(E16) pad are shown on the Registers Tab in the right-hand pane.48IMX硬件设计指南与硬件启动医学知识讲解10/3/2022Configuring IOMUXC RegistersSeDrag a Signal to another Module49IMX硬件设计指南与硬件启动医学知识讲解10/3/2022D

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