基于FPGA的自定义图像显示课件

基于FPGA的自定义图像显示--基于AlteraDE02023/4/21案例说明总体框图模块详述总结参考实践Q&Aoutline2023/4/22拨动开关SW[0]=1时LCD屏显示彩色128X128像素的”Lena”图片，数码管显示”LENA”拨动开关SW[0]=0时LCD屏显示彩色128X128像素的左右颠倒的”Lena”图片，数码管显示”128P”案例要求2023/4/23AlteraDE0多媒体平台资源2023/4/25效果展示2023/4/26系统框图2023/4/27GeneralTimingHorizontalTiming

VerticaltimingVGA时序-640x480@60Hz标准ScanlinepartPixelsTime[µs]Visiblearea64025.422045680238Frontporch160.63555114200596Syncpulse963.87Backporch481.99Wholeline80031.777557100298FramepartLinesTime[ms]Visiblearea48015.253227408143Frontporch100.31777557100298Syncpulse20.0596Backporch331.98Wholeframe52516.683217477656Screenrefreshrate60HzVerticalrefresh31.46875kHzPixelfreq.25.175MHz*2023/4/29输出行同步、场同步信号及RGB数据VGA控制器FPGAEP3C16F484ROMVGA_PatternVGA_ClkVGA_CtrlRGBVSHS2023/4/210VGA控制器的设计时钟分频颜色输出及同步信号读取ROM图片数据2023/4/211// VerticalGenerator:Refertothehorizontalsyncalways@(posedgeoVGA_HSornegedgeiRST_N)begin if(!iRST_N) begin V_Cont <= 0; oVGA_VS <= 1; end else begin if(V_Cont<V_TOTAL-1) V_Cont <= V_Cont+1'b1; else V_Cont <= 0; // VerticalSync if(V_Cont==V_FRONT-1) // Frontporchend oVGA_VS <= 1'b0; if(V_Cont==V_FRONT+V_SYNC-1) // Syncpulseend oVGA_VS <= 1'b1; endendVGA控制器分析-场同步2023/4/213VGA控制器分析-同步信号仿真结果(部分)2023/4/214DE0开发板上VGA连接电路VGA_HS：行同步信号VGA_VS：场同步信号R

：红色分量亮度G

：绿色分量亮度B

：蓝色分量亮度*DE0UserManual2023/4/215计算ROM的地址位数和数据宽度[3:0]R,[3:0]G,[3:0]B→4bits128pix.X128pix.→atleast16384words(14bits)of4bits读取ROM时的地址计算

ROM_address[13:0]=Y_address[13:0]+X_address[7:0]定制片内ROM//-----------计算水平地址----------------------always@(posedgeiVGA_CLKornegedgeiRST_n)if(!iRST_n)Xcoloradd<=7'b0000000;elseif(iVGA_X>=256&&iVGA_X<384) Xcoloradd<=Xcoloradd+1'b1;elseXcoloradd<=0;//-----------计算垂直地址----------------------always@(posedgeiVGA_CLKornegedgeiRST_n)if(!iRST_n)Ycoloradd<=14'b0;elseif(iVGA_Y>=176&&iVGA_Y<304)Ycoloradd<=(iVGA_Y-176)*128;elseYcoloradd<=0;2023/4/217图片格式转化（Matlab）写入mif文件I=imread(‘C:\DocumentsandSettings\Administrator\桌面\lena128.bmp');a=double(I);fori=1:128forj=1:128R(i,j)=a(i,j,1)/16;G(i,j)=a(i,j,2)/16;B(i,j)=a(i,j,3)/16;endend存储图片的RGB三色分量数据fruitRu4(coloradd,iVGA_CLK,colorRR);fruitGu5(coloradd,iVGA_CLK,colorGG);fruitBu6(coloradd,iVGA_CLK,colorBB);//开关控制选择输出assignvalid=((iVGA_Y>=176&&iVGA_Y<304)&&(iVGA_X>=256&&iVGA_X<384))?1:0;assignoBlue[3]=(valid&&SW)?colorB[3]:(valid&&!SW)?colorBB[3]:0;定制片内ROM2023/4/218无位选信号，输出0点亮数码管“LENA”,”128P”编码四位数码管显示*DE0UserManual2023/4/219系统方案VGA时序640X480@60Hz标准IP核提高编程效率PLLOn-chipROM总结2023/4