电源稳压ic lm系列

over-voltageprotection,under-voltagelatch-off,apowergoodsignal,andoutputenable.The5-bitDAChasatypicaltoleranceof1%.Therearetwouser-selectableover-currentprotectionmethods.Oneprovidesaccurateover-currentpro-tectionwiththeuseofanexternalsenseresistor.TheohersavescostbytakingadvantageofherDS_ONofthehigh-sideFET.Theovervoltageprotectionprovidestwolev-elsofprotection.Thefirstlevelkeepsthehigh-sideFEToffandthelow-sideFETon.ThesecondprovidesagatesignalthatcanbeusedtofireanexternalSCR.

LinearSection—Thetwolinearregulatorcontrollersfea-turewidecontrolbandwidth,N-FETandNPNtransistordriv-ingcapability,andanadjustableoutputvoltage.Thewidecontrolbandwidthmakesmeetingfastloadtransientre-sponserequirementsuchasthatoftheGTL+busaneasyjob.Inminimumconfiguration,thetwocontrollersdefaultto

1.5Vand2.5Vrespectively.

turesa5-bitprogr bleDAC,over-currentand

twohigh-speedlinearregulatorcontrollersina24-pinSOpackage.

SwitchingSection—Theswitchingregulatorcontrollerfea-

progrble,synchronousbuckswitchingcontrollerand

RegulatorControllers

GeneralDescription

TheLM2637providesacomprehensiveembeddedpowersupplysolutionformotherboardshostinghighperformanceMPUssuchasMII™,Pentium™II,K6-2andothersimilarhighperformanceMPUs.TheLM2637incorporatesa5-bit

LM2637

MotherboardPowerSupplySolutionwitha5-BitProgrbleSwitchingControllerandTwoLinear

bleSwitchingControllerand

LM2637MotherboardPowerSupplySolutionwitha5-BitProgrTwoLinearRegulatorControllers

DS100848-1

TopView

NSPackageNumberM24B

24-LeadSOIC

PinConfiguration

blehighcurrentDC/DCpowersupply

nProgr

sforPCmotherboardss

Applications

nEmbeddedpower

nTripleDC/DCpower

nSoftstartwithoutexternalcapacitor

LinearSection

nN-FETandNPNdrivingcapability

nUltrafastresponsespeed

nOutputvoltagesdefaultto1.5Vand2.5Vyetadjustable

FETgatedrives

nAdaptivenon-overlap

nTypical1%DACtolerance

nSwitchingfrequency:50kHzto1MHz

nTwolevelsofover-voltageprotection

nTwomethodsofover-currentprotection

blefrom3.5Vto13V

n5-bitDACprogr

Features

nProvides3regulatedvoltages

nPowerGoodflagandoutputenable

nUnder-voltagelatch-off

SwitchingSection

nSynchronousrectification

Bothlinearcontrollershaveundervoltagelatch-off.

October1998

MII™isatrademarkofCyrixCorporationawhollyownedsubsidiaryofNationalSemiconductorCorporation.Pentium™isatrademarkofInCorporation.

K6istrademarkofAdvancedMicroDevices,Inc.

©1999NationalSemiconductorCorporation DS100848 com

PAGE

13

www

PAGE

10

ElectricalCharacteristics(

)

VCC=5V,VDD=12Vunlessotherwisespecified.Typicalsandlimitsappearingin intypeapplyforTA=TJ=+25˚C.Limitsappearinginboldfacetypeapplyoverthe0˚Cto+70˚Crange.

SWITCHINGSECTION

1.5VLDOCONTROLLERSECTION

2.5VLDOCONTROLLERSECTION

Note1:Absolute

umRatingsarelimitsbeyondwhichdamagetothedevicemayoccur.Operatingratingsareconditionsunderwhichthedeviceoperates

correctly.OperatingRatingsdonotimplyguaranteedperformancelimits.

Note2: umallowablepowerdissipationisafunctionofthe umjunctiontemperature,TJMAX,thejunction-to-ambientthermal ,JA,andtheambienttemperature,TA.The umallowablepowerdissipationatanyambienttemperatureiscalculatedusing:PMAX=(TJMAX−TA)/JAThejunction-to-ambientthermal ,JA,forLM2637is78˚C/W.ForaTJMAXof150˚CandTAof25˚C,the umallowablepowerdissipationis1.6W.

Note3:TheletterNstandsforthetypicaloutputvoltagesappearinginitalicboldfacetypeinTable1.

Note4:TheoutputlevelofthePWGDpinisalogicANDofthepowergoodfunctionoftheswitchingsection,the1.5Vsectionandthe2.5Vsection.

Symbol

Parameter

Conditions

Min

Typ

Max

Units

IOVP

OVPPinSourceCurrent

OVP=3V

10

mA

GA

ErrorAmplifierDCGain

76

dB

BWEA

ErrorAmplifierUnityGainBandwidth

5

MHz

VRAMP_L

RampSignalValleyVoltage

1.25

V

VRAMP_H

RampSignalPeakVoltage

3.25

V

tSS

SoftStartTime

4096

ClockCycles

DSTEP_SS

DutyCycleStepChangeinSoftStart

12.5

%

VSNS2

SNS2Voltage

VDD=12V,VCC=4.75Vto5.25V,IG2=0mAto20mA

(Figure1)

1.463

1.5

1.538

V

ROUT2

Output

200

ISNS2

SNS2PinBiasCurrent

WhenRegulating

21

µA

VPWGD_HI

PWGDHighTripPoint

(Note4)

0.63

V

VPWGD_LO

PWGDLowTripPoint

(Note4)

0.44

V

VSNS3

SNS3Voltage

VDD=12V,VCC=4.75Vto5.25V,IG3=0mAto20mA

(Figure1)

2.438

2.5

2.563

V

ROUT3

Output

200

ISNS3

SNS3PinBiasCurrent

WhenRegulating

21

µA

VPWGD_HI

PWGDHighTripPoint

(Note4)

0.63

V

VPWGD_LO

PWGDLowTripPoint

(Note4)

0.44

V

ElectricalCharacteristics(

)

TABLE1.5-BitDACOutputVoltageTable

(VCC=5V,VDD=12V±5%,TA=25˚C,TestMode)

Symbol

Parameter

Conditions

Typical

Units

VDACOUT

5-BitDACOutputVoltagesforDifferentVIDCodes

VID4:0=01111

1.30

V

VID4:0=01110

1.35

VID4:0=01101

1.40

VID4:0=01100

1.45

VID4:0=01011

1.50

VID4:0=01010

1.55

VID4:0=01001

1.60

VID4:0=01000

1.65

VID4:0=00111

1.70

VID4:0=00110

1.75

VID4:0=00101

1.80

VID4:0=00100

1.85

VID4:0=00011

1.90

VID4:0=00010

1.95

VID4:0=00001

2.00

VID4:0=00000

2.05

VID4:0=11111

(shutdown)

VID4:0=11110

2.1

VID4:0=11101

2.2

VID4:0=11100

2.3

VID4:0=11011

2.4

VID4:0=11010

2.5

VID4:0=11001

2.6

VID4:0=11000

2.7

VID4:0=10111

2.8

VID4:0=10110

2.9

VID4:0=10101

3.0

VID4:0=10100

3.1

VID4:0=10011

3.2

VID4:0=10010

3.3

VID4:0=10001

3.4

VID4:0=10000

3.5

BlockDiagram

DS100848-30

TestCircuit

DS100848-2

FIGURE1.LDOControllerTestCircuit

TypicalApplications

DS100848-3

FIGURE2.MotherboardPowerSupplyforPentiumIIProcessorCore(1.3V-2.8V,14.2A),GTL+Bus(1.5V,4A),andLegacyI/O(2.5V,0.3A).Externalsenseresistorisusedtoprovidebothover-currentlimitanddynamicvoltagepositioning.

TypicalApplications(

)

DS100848-4

FIGURE3.MotherboardPowerSupplyforPentiumIIProcessorCore(1.8V-2.8V,14.2A),GTL+Bus(1.5V,4A),andLegacyI/O(2.5V,0.3A).HighsideFETisusedtoprovidethecurrentlimit.

PinDescription

ApplicationsInformation

OVERVIEW

TheLM2637providescontrolandprotectionforthreevolt-ageregulators.Namely,asynchronousbuckswitchingcon-trollerandtwolinearregulatorcontrollersthatdriveanexter-nalN-FETorNPNtransistor.

SwitchingSection—Theswitchingcontrollerfeaturesapatible,5-bitprogrbleoutputvoltage,

over-currentandover-voltageprotection,under-voltagelatch-off,apowergoodsignal,andanoutputenable.The5-bitDAChasatypicaltoleranceof1%.Therearetwouser-selectableover-currentprotecionmethods.Onepro-videsaccurateover-currentprotectionwiththeuseofanex-ternalsenseresistor.Theothersavescostbytakingadvan-tageoftherDS_ONofthehigh-sideFET.Theover-voltageprotectionprovidestwolevelsofprotection.Thefirstturnsoffthehigh-sideFETandturnsonhelow-side.ThesecondprovidesagatesignalthatcanbeusedtofireanexternalSCR.

LinearSection—Thetwolinearregulatorcontrollersfeaturewidecontrolbandwidth,N-FETandNPNtransistordrivingcapability,anadjustableoutputvoltageandatypical2%tol-erance.ThewidecontrolbandwidthmakesmeetingtheGTL+bustransientresponserequirementaneasyjob.Whennoexternalresistordividerisused,thetwocontrollersdefaultto1.5Vand2.5Vrespectively.

Bothlinearsectionshaveunder-voltagelatch-off.Shouldtheoutputvoltagedropbelow0.63V,thecorrespondinggatedrivewillbedisabledandPWGDpinwillbepulledlow.

THEORYOFOPERATION

StartUp

SwitchingSection—Thesoftstartcircuitrystartstoworkwhenthreeconditionsaremet,i.e.,ENpinisalogichigh,the

VIDcodeisvalidandV

involtageexceeds4.2V.Thedu-

rationofthesoftstartisdeterminedbyaninternaldigital

coun

ndtheswitchingfrequency.Duringsoftstart,the

The frequencyisadjustablefrom50kHztobeyond1MHzhroughanexternalresistor.

Softstartisrealizedthroughaninternaldigitalcounter.Noexternalsoftstartcapacitorisnecessary.

Dynamicpositioningoftheswitcheroutputvoltagereducesthenumberofoutputcapacitorsandcanbeeasilyrealizedusingthesamesenseresistorastheover-currentprotection.

outputoftheerroramplifierisallowedtoincreasegradually.Whenthecounterhascounted4,096clockcycles,softstartsessionendsandtheoutputleveloftheerroramplifierisre-leasedandallowedtogotoavaluethatisdeterminedbythefeedbackloop.PWRGDpinisalwayslowduringsoftstartandisturnedovertooutputvoltagemonitoringcircuitryafterthat.BeforeVCCreaches4V,allinternallogicisinapower-on-resetstateandthetwoFETdriversaredisabled.

Pin

PinName

PinFunction

1

LG

LowsideN-FETgatedriveroutput.

2

PGND

GroundforthetwoFETdriversoftheswitchingsection.

3

VDD

SupplyfortheFETgatedrivers.Usuallytiedto+12V.

4

SNS2

Feedbackpinforthe1.5Vlinearregulator.

5

G2

GatedriveoutputfortheexternalN-MOSofthefast1.5Vlinearregulator.

6

SGND

Groundforinternalsignalcircuitryandsystemgroundreference.

7

VCC

Supplyvoltage.Usually+5V.

8

SNS1

Outputvoltagemonitorinputfortheswitchingregulator.

9

CS+

Switchingregulatorcurrenseinput,positivenode.

10

CS−

Switchingregulatorcurrenseinput,negativenode.

11

OVP

Over-voltageprotectionoutputfortheswitchingregulator.CanbeusedtofireanexternalSCR.

12

FREQ

Switchingfrequencyadjustmentpin.Anexternalresistorisneededtosetthedesiredfrequency.

13

EAO

Outputoftheerroramplifier.Usedforcompensatingtheswitchingregulator.

14

FB

Invertinginputoftheerroramplifier.Usedforcompensatingtheswitchingregulator.

15

PWGD

OpencollectorPowerGoodsignal.

16

VID4

5-BitDACinput,MSB.

17

VID3

5-BitDACinput.

18

VID2

5-BitDACinput.

19

VID1

5-BitDACinput.

20

VID0

5-BitDACinput,LSB.

21

G3

GatedrivepinfortheexternalN-MOSofthe2.5Vlinearregulator.

22

SNS3

Feedbackpinforthe2.5Vlinearregulator.

23

EN

OutputEnable.Alogiclowshutsthewholechipdown.

24

HG

HighsideN-FETgatedriveroutput.

ApplicationsInformation(

)

Duringnormaloperation,ifVCCvoltagedropsbelow3.6V,theinternalcircuitrywillgointopower-on-resetagain.ThehysteresishelpsdecreasethenoisesensitivityonheVCCpin.

Aftersoftstartendsandduringnormaloperation,ifthecon-verteroutputvoltageexceeds118%ofDACoutputvoltage,theLM2637willlockintoover-voltageprotectionmode.Thehigh-sidedrivewillbelow,andthelow-sidedrivewillbehigh.Therearetwowaystoclearthemode.OneistocycleVCCvoltageonce.TheotheristotoggletheENlevel.Aftertheover-voltageprotectionmodeiscleared,theLM2637willen-terthesoftstartsessionandstartover.

LinearSection—Thelinearsectiondoesnotgothroughasoftstart.Wheneverthesoftstartoftheswitchingsectionbegins,thelinearsectionimmediayappliesherequiredgatevoltagesorbasecurrentsforexternalpowertransistors.Thereisanunder-voltagelatch-offforthelinearsection.Ifaftersoftstartends,SNS2orSNS3isbelow0.63V,thecor-respondinggatedrivewillbedisabledandPWGDpinwillbepulledlow.

TheLM2637gatedrivesareofBiCMOSdesign.UnlikesomebipolarcontrolICs,thegatedrivehasrail-to-railswingthatensuresnospuriousturn-onduetocapacitivecoupling.

AnotherfeatureoftheFETgatedrivesistheadaptive

non-overlap

mechanism.Agatedriveisnotturnedon

untiltheotherisfullyoff.Thedeadtimeinbetweenistypi-cally20ns.Thisavoidsthepotentialshoot-throughproblemandhelpsimproveefficiency.

LinearSection—Thegatedrivesofthelinearsectioncan

putouta

umcontinuouscurrentofabout40mA.The

typicallowgatevoltageis1.2V.

LoadTransientResponse

SwitchingSection—InatypicalmodernM

pplication

suchastheMII,PentiumIIandK6-2corepowersupply,loadtransientresponseisacriticalissue.TheLM2637uti-lizestheconventionalvoltagefeedbacktechnologyastheprimaryfeedbackcontrolmethod.Whentheloadtransienthappens,theerrorintheoutputvoltagelevelisfedtotheer-roramplifier.Theoutputoftheerroramplifieristhencom-

paredwithaninternallygenerated

rampsignalandthe

NormalOperation

SwitchingSection—Inthenormaloperationmode,theLM2637regulatestheconverteroutputvoltagebyadjustingthedutyratio.Theoutputvoltageisdeterminedbythe5-bitVIDcodesetbytheuserorMPU.

The frequencyissetbyanexternalresistorbetweenFREQpinandground.The neededforadesiredfrequencycanbedeterminedbythefollowingequa-

tion:

Forexample,ifthedesired

(1)

frequencyis300kHz,the

shouldbearound84k.

Theminimumallowable

frequencyis5kHz.

LinearSection—Understeadystateoperation,thelinearsection stheappropriategatevoltageorbasecurrenttocorrectlybiastheexternalpasstransistorsothatthevolt-agedropacrossthetransistoristherightvalue.

ResettingtheLM2637

WhentheLM2637detectsanabnormalconditionsuchasswitchingregulatorovervoltage,itwilllatchitselfoffpartiallyorcompley.ToresettheLM2637,eitherENorVCCvoltagehastobetoggled.AnothermoresubtlewaytorecoveristofloatalltheVIDpinsandreapplythecorrectcode.

resultofthecomparisonisaseriesofpulseswithcertaindutyratios.ThesepulsesarethenusedtocontroltheonandoffoftheFETgatedrives.Inhisway,theerrorintheoutputvoltagegetscorrectedbythechangeinthedutyratiooftheFETswitches.Duringalargeloadtransient,dependingonthecompensationdesign,thechangeindutyratiousuallybeginswithinoneswitchingcycle.RefertotheDesignCon-siderationssectionformoredetails.

Besidesthevoltagefeedbackcontrolloop,theLM2637alsohasapairoffastcomparators(theMINandMAXcompara-tors)tohelpmaintainheoutputvoltageduringalargeandfastloadtransient.Thetrippointsofthecomparatorsaresetto±5%oftheDACoutputvoltage.Whentheloadtransientissolargethattheoutputvoltagegoesoutsidethe±5%win-dow,theMINorMAXcomparatorwillbypasstheprimaryvoltagecontrolloopandimmediaysetthedutyratiotoei-ther100%or0%.Thisprovidesthefastestpossiblewaytoreacttosuchalargeloadtransientinaconventionalbuckconverter.

LinearSection—Thelinearsectionhasahighcontrolband-width.Dependingonexternalcomponentsselected,thetypi-calbandwidthcanbeashighas1.2MHz.Theusermaychoosetolowerthisbandwidthandhaveabetternoiseim-

munitybyaddingasmallcapacitor(1thegateoutputandground.

o10nF)between

GateDrives

SwitchingSection—TheswitchingcontrollerhastwogatedrivesthataresuitablefordrivingexternalpowerN-FETsinasynchronousbucktopology.ThevoltageforthetwoFETdriversis dbytheVDDpin.ThisVDDvoltageshouldbeatleastoneVGS(th)higherthanconverterinputvoltagetobeabletofullyenhancethehigh-sideFET.InatypicalPC

PowerGoodSignal

Thepowergoodsignalistoindicatewhetherallthreeoutputvoltagesarewithintheircorrespondingrange.Therangefortheswitchingregulatorissettoatypical±10%windowoftheDACoutputvoltage.Therangeforthelinearregulatoris0.63Vtoinfinity.Duringsoftstart,thepowergoodsignaliskeptlow.Atthecompletionofsoftstart,allthreeoutputvolt-agesarecheckedandthePWGDpinwillbeassertediftheyareallwithinspecifiedrange.Duringnormaloperation,wheneveravoltagegoesoutofthespecifiedrangeformorethanabout3µs,PWGDpinwillbepulledlow.

motherboardapplication,itis mendedthat12Vbeap-pliedtoVDD,and5Vbeusedastheinputvoltagefortheswitcher.Achargepumpisnot mendedsincethelin-earsectionsneedastableVDDvoltagetominimizehighfre-quencynoise.

ForaVDDof12V,thepeakgatechargingcurrentistypically2A,andthepeakgatedischargingcurrentistypically6A,wellsuitedforhighspeedswitching.

Over-VoltageProtection

SwitchingSection—Whentheoutputvoltageexceeds118%oftheDACoutputvoltageanytimebeyondthesoftstart,theswitchingsectionwillenterover-voltageprotectionmodeandshutsitselfdown.Theuppergatedrivewillbeheldlowwhilethelowergatedrivewillbeheldhigh.PWGD

ApplicationsInformation(

)

willbelow.TherewillalsobealogichighsignalattheOVPpinthatcanbeusedtofireanexternalSCR.Toclearthismode,refertotheResettingtheLM2637section.

LinearSection—Thereisnoover-voltageprotectioninthelinearcontrollers.

Under-VoltageLatch-Off

Atthecompletionofsoftstart,thecontrollerstartstomonitorallthreeoutputvoltages.Ifanyofthevoltagesgoesbelowabout0.63V,thecontrollerwilllatchoffitscorrespondingsection,i.e.,switchingorlinear.ThemodecanbeclearedbyfollowingtheproceduresdescribedintheResettingtheLM2637section.

CurrentLimit

SwitchingSection—Currentlimitcanberealizedbytwomethods.OnemethodishroughsensingtheVDSofthehigh-sideFET.Theotheristhroughaseparatesenseresis-tor.Thefirstmethodischeaperandmorepowerefficientbutlessaccurate.Thesecondmethodismoreaccuratebutdis-sipatesadditionalpowerandiseithermoreexpensiveorre-quiresspecialPCBlayoutconsideration.Asidebenefitofthesecondmehodisitenablesimplementationofatechniquecalleddynamicvoltagepositioning,whichhelpssavethenumberofoutputcapacitors.

TheLM2637lsinwhichcurrentlimitmodeitissupposedtobebydetectingtheCS+pinvoltage.WhenCS+voltageis

1.2VbelowVCCvoltage,senseresistormethodisassumed.OtherwisetheVDSmethodischosen.TheVDSmethodisbasedontypicalrDS_ONofhehigh-sideFETandloadcur-rentlevels.

Method1—High-SideFETVDSSensing

Thismethoddetectsthehigh-sideFETdraincurrentbysensingitsdrain-sourcevoltagewhenitison.SeeFigure4.

DS100848-8

FIGURE4.CurrentLimitviaHigh-SideFETVDSSensing

Sincether

DS_ON

ofaFETisaknownvalue,currentthrough

theFETcanbeknownbymeasuringitsV.Therelation-

DS

shipbetweenthethreeparametersis:

Noticehowever,thattherDS_ONoftheFEThasapositivetemperaturecoefficientanditcanincreasebyasmuchas50%whenheatedup.AlsothedistributionoftherDS_ONcanbefairlywide,a1.25to1.5ratioisnot mon.ConsulttheMOSFETvendorforfurtherinformationonthedistribu-tionofrDS_ON.

ThedesignershouldcarefullychoosethevalueofRIMAXsothatevenundertheextremecase(largestrDS_ONandhigh-esttemperature)thecurrentlimitwillnottriggerbelowthepresetvalue.

Toprovidethegreatestprotectionoverthehigh-sideFET,cycle-by-cycleprotectionisimplemented.ThesamplingoftheVDSstartsasearlyas250nsaftertheFETisturnedon.Wheneveranover-currentconditionisdetected,thehigh-sideFETisimmediayturnedoffandthelow-sideFETturnedon.Thisstatusremainsfortherestofthecycle.Thesameprocedureappliestothenextswitchingcycle.Theblankingtimeof250nsistoavoidtheswitchingnoisethatoccurswhenevertheFETisturnedon.

TheresistorbetweenCS−pinandtheswitchingnode(sourceofhehigh-sideFET)isimportantforminimizingthenoiseandnegativevoltagepresentattheCS−pin.Aresis-tanceof100to300is mended.

Method2—CurrenseResistor

(2)

Toimplementhecurrentlimitfunction,anexternalresistorRIMAXisneeded.Theresistorshouldbeconnectedbetweenthedrainofthehigh-sideFETandIMAXpin.Aconstantcur-rentofaround180µAisdtoflowintotheIMAXpinandcausesafixedvoltagedropacrosstheRIMAXresistor.ThisvoltagedropisthencomparedwiththeVDSofthehigh-sideFETandifhelatterishigher,overcurrentisassumed.TheappropriatevalueofRIMAXforapre-determinedcurrentlimitlevelILIMcanbedeterminedbythefollowingequation:

Thismethodusesasenseresistorinserieswiththeoutputinductortodetecttheloadcurrent.SeeFigure5.Thevoltageacrossthesenseresistorisproportionaltoloadcurrent.Inthecasethatthesenseresistorisofdiscretetype(i.e.,notaPCBetchresistor)orthesenseresistorvalueisoptimizedfordynamicvoltagepositioning(seetheDynamicPosiion-ingofLoadVoltagesection),itmaybenecessarytousetwosignallevelresistors,R1andR2toappropriaysetthede-siredcurrentlimit.

(3)

Forexample,supposethattherDS_ONoftheFETis20m,andthedesiredcurrentlimitis20A,thenRIMAXshouldbe

2.2k.

ApplicationsInformation(

)

buckregulatorthatneedstomeetstringentloadtransientre-quirementsuchasthatofprocessorcorevoltagesupply,a2-pole-1-zerocompensationnetworkshouldsuffice,suchastheoneshowninFigure6(C1,C2,R1andR2).Thisisbe-causetheESRzeroofthetypicaloutputcapacitorsislowenoughtomakethecontrol-to-outputtransferfunctionasingle-poleroll-off.

Asanexample,letusfigureoutthevaluesofthecompensa-tionnetworkcomponentsinFigure6.Assumethefollowingparameters:R=20,RL=20m,RC=9m,L=2µH,C

=7.5mF,VIN=5V,Vm=2Vandfrequency=300kHz.NoticeRLishesumoftheinductorDC andtheon oftheFET’s.

Thecontrol-to-outputtransferfunctionis:

(5)

TheESRzerofrequencyis:

(6)

Thedoublepolefrequencyis:

FIGURE5.CurrentLimitviaCurren

DS100848-9

seResistor

Foragivencurrentlimitvalue,theminimumRSENSEisdeter-minedby:

(7)

(4)

whereVOCPisheover-currenttripvoltageandistypically55mV,seetheElectricalCharacteristictable.Forexample,fora20Acurrentlimit,theminimumRSENSEis2.75m.Ifa3msenseresistorisusedinstead,useappropriatevaluesofR1andR2tomakethevoltageacrossR1tobeVOCPwhenthevoltageacrossRSENSEis60mV.

ThecorrespondingBodeplotsareshowninFigure7.

NoticesincetheESRzerofrequencyissolowthatthephasedoesn’tevengobeyond−90˚.Thismakesthecompensationeasiertodo.

SincetheDCgainandcutofffrequency(0dBfrequency)aretoolow,somecompensaionisneeded.OtherwisethelowDCgainwillcauseapoorlineregulation,andthelowcutofffrequencymayhurttransientresponseperformance.

Thetransferfunctionforthe2-pole-1-zerocompensationnetworkshowninFigure6is:

Thediscretecurrenseresistorusuallyhasaverygoodtemperaturecoefficientandtolerance.Atemperaturecoeffi-cientof±30ppm/˚Cistypical.Toleranceisusually±1%or

±5%.VishayDaleandIRCofferabroadrangeofdiscretesenseresistors.

APCBetchresistorcsobeusedastheRSENSE.The

advantageofthatapproachisflexible

,whichwill

(8)

resultinminimumpowerloss.R1andR2mayalsobeelimi-nated.Thedrawbackistoohighatemperaturecoefficient,

where

typically ppm/˚C,whichwillresultinamuchlessac-curatecurrentlimitthanadiscretesenseresistor.Thecop-perthicknessofaPCBisusuallyof5%tolerance.

LinearSecion—Thereisnocurrentlimitfunctioninthelin-earcontrollers.However,ifthereiseverasevereover-load,theoutputvoltagemaydropbelow0.63V,inwhichcasetheunder-voltagelatch-offwillprovidetheprotection.

DESIGNCONSIDERATIONS

(9)

Oneofthepolesislocatedatorigintohelpachievethehigh-estDCgain.Sotherearethreeparameterstodetermine,thepositionofthezero,thepositionofthesecondpole,andtheconstantA.Todeterminethecutofffrequencyandphasemargin,theloopbodeplotsneedtobegenerated.Thelooptransferfunctionis:

TF=−TF1xTF2

(10)

ControlLoopCompensation

SwitchingSection—Aswitchingregulatorshouldbeprop-erlycompensatedtoachieveastableoperation,tightregula-tionandgooddynamicperformance.Forasynchronous

Bychoosingthezeroclosetothedoublepolepositionandthesecondpoletohalfoftheswitchingfrequency,heclosedlooptransferfunctionturnsouttobeverygood.

ApplicationsInformation(

)

Thatis,iffz=1.32kHz,fp=153kHz,andA=4.8x10−6F,thenthecutofffrequencywillbe50kHz,thephasemarginwillbe72˚,andtheDCgainwillbethatoftheerroramplifier.SeeFigure8.

Thecompensationnetworkcomponentvaluescanbedeter-minedbyEquation(9),sincethevaluesoffz,fpandAarenowknown.Tomoreconvenienlycalculatethevalues,Equation(9)canberearrangedasfollows:

(11)

Noticetherearethreeequationsbutfourvariables.Sooneofthevariablescanbechosenarbitrarily.Sincethecurrentdrivingcapabilityoftheerroramplifierislimitedtoaround3mA,itisagoodideatohaveahighimpedancepathfromEAOtoFB.FromEquation(11)itcanbetoldthatalargerR2willresultinasmallerC1,C2andalargerR1.Calculationsshowthatthefollowingcombinationisagoodone:R2=51,C1=0.022µf,R1=5.6k,C2=820pF.

DS100848-18

FIGURE7.Control-to-OutputBodePlots

DS100848-17

FIGURE6.BuckConverterfromaControlViewpoint

Foradifferentapplicationordifferenttypeofoutputcapaci-tors,adifferentcompensationschememaybenecessary.Theusercaneitherfollowthestepsabovetofiguretheap-propriatecomponentvaluesorcontactNationalforhelp.

DS100848-19

FIGURE8.LoopBodePlots

LinearSection—Thelinearsectionisdesignedforhighcon-trolbandwidthoperation.Thephasemarginandcutofffre-quencydependsonheexternalN-FET,outputcapacitorsandtheirESR.Asaruleofthumb,thedesignercanchooseanycapacitancefrom50µFto4000µF,withatotalESRof10mto100m.Thelargerthecapacitance,thelowerthebandwidth.Theabovecapacitorsusuallyresultinacontrolbandwidthof250kHzto1.2MHz.

ApplicationsInformation(

FETSelection

SwitchingSection—TheselectionofFETswitchesaffects

)

boththeefficiencyofthewholeconver

ndthecurrent

thermalcapacityandcostthatlimitstheselection.Asanex-ample,considera3.3Vto1.5V,4Aapplication.Thelowestinput-outputdifferentialvoltageis33Vx95%–15Vx102%

=1.605V,sothe umallowablerDS_ONis1.605V÷4A

=401m.AlmostalllowvoltagediscreteN-FET’scanmeet

limitsetting(ifVDSsensingmodeisselected).Fromeffi-ciencystandpointitissuggestedthatforthehigh-sideswitch,onlylogiclevelFETsbeused.StandardFETscanbeusedfo