主板维修时钟发生器6611c

PLL52C66-11

SpreadSpectrumClockGeneratorfor3-DIMMwithI2C

FEATURES

GeneratesallclockfrequenciesforPentium,AMDandCyrixsystemrequiringmultipleCPUclocks.

Supports4CPU,12SDRAMand7PCIBUSclocks.

Two14.318Mhzreferenceclocksandone2.5VIOAPIC

One24Mhzfloppyclockandone48MhzUSBclock.

PowermanagementcontrolpinstostopCPUorPCI.

Supports2-wireI2Cserialbusinterfacewithreadback.

SpreadSpectrum0.25,0.5,0.75center.

PowerupfrequencysettingvaluesarereadableviaI2Cforjumperlessapplications

Mixedvoltagesupportfrom2.5Vto3.3V

Availablein300mil48pinSSOP.

FREQUENCYSELECTION(MHz)

PININFORMATION

F3

F2

F1

F0

CPU/SDRAM

PCI

1

0

0

0

50

25

1

0

0

1

100

50

1

0

1

0

83.3

41.6

1

0

1

1

68.4

34.2

1

1

0

0

90

45

1

1

0

1

75

37.5

1

1

1

0

112

56

1

1

1

1

66.8

33.4

0

0

0

0

70.2

35.1

0

0

0

1

72.2

36.1

0

0

1

0

77.2

38.6

0

0

1

.2

42.6

0

1

0

47.5

0

1

1

1

97.2

48.6

Note:F3,F2,F1,F0andMODEareselectableonlyduringpower-on.TheyareHIGHbydefaultandLOWwhen10KPulldownisattached.

VDD1:REF(0:1),XIN,XOUT VDD2:PCI_F,PCI(0:5)VDD3:SDRAM(0:11),48MHZ,24MHZ,SDATA,SCLK

VDDL1:IOAPIC VDDL2:CPU(0:3)

I/OMODECONFIGURATION

45437WarmSpringsBlvd.,Fremont,California94539

510-492-0990FAX510-492-0991

9805Rev.1CPage1

BLOCKDIAGRAM

MODE(Pin25)

PIN15

PIN46

1(OUTPUT)

0(INPUT)

PCI5

PCISTP

REF1

CPUSTP

PLL52C66-11

PhaseLinkLabs.Inc.

SpreadSpectrumClockGeneratorfor3-DIMMwithI2C

PLL52C66-11

PhaseLinkLabs.Inc.

SpreadSpectrumClockGeneratorfor3-DIMMwithI2C

9805Rev.1CPage

PAGE

2

45437WarmSpringsBlvd.,Fremont,California94539

510-492-0990FAX510-492-0991

45437WarmSpringsBlvd.,Fremont,California94539

510-492-0990FAX510-492-0991

9805Rev.1CPage

PAGE

3

POWERMANAGEMENT

CPUSTP

PCISTP

CPU(0:3)

PCI(0:5)

PCI_F

SDRAM(0:11)

CRYSTAL

VCO

1

1

Running

Running

Running

Running

Running

Running

0

1

StoppedLOW

Running

Running

Running

Running

Running

1

0

Running

StoppedLOW

Running

Running

Running

Running

SIGNALDESCRIPTIONS

NAME

PINNUMBER

PINTYPE

DESCRIPTION

VDD1

1

P

PowersupplyforREF0,REF1,crystaloscillator

VDD2

6

P

PowersupplyforPCI_F,PCI(0:5)

VDD3

19,30,36

P

PowersupplyforSDRAM(0:11),24MHZand48MHZ

VDDL1

48

P

PowersupplyforIOAPIC(2.5Vor3.3V)

VDDL2

42

P

PowersupplyforCPU(0:3)2.5Vor3.3V

VSS

3,9,16,22

27,33,39,45

P

Ground

XIN

4

I

14.318Mhzcrystalinputtobeconnectedtooneendofthecrystal.Thisinputcsobeconnecteddirectlytootheravailablesourceof14.318Mhz.

XOUT

5

O

14.318Mhzcrystaloutput

REF0/F3*

PCI_F/F1*

PCI_0/F2*48MHZ/F0*

2,7,8,26

B

Atpower-up,thesepinsareinputpinsandwilldeterminetheCPUclockfre-quency(seeFrequencySelectionTable).Afterinputsampling,thesepinswillgenerateoutputclocks.

PCI_F,PCI(0:5)

7,8,10,11

12,13,15

O

PCIclockswithfrequenciesdefinedbyFrequencyTable.Thesepins exceptPCI_FwillbeLOWwheISTPisLOW

CPU(0:3)

44,43,41,40

O

CPUclockswithfrequenciesdefinedbyFrequencyTablefor2.5Vand3.3V.ThesepinsareLOWwhenCPUSTPisLOW.

SDRAM(0:11)

38,37,35,34

32,31,29,28

21,20,18,17

O

SDRAMclockswithfrequenciesdefinedbyFrequencyTablefor3.3V.

SDATA,SCLK

23,24

I

Serialdatainputforserialinterfaceport

PCI5//PCISTP

15

B

MultiplexedpincontrolledbyMODEsignal(seeI/OMODEconfigurationTa-ble).PCISTPwillstopPCIclockexceptPCI_FwhenLOW.

REF1//CPUSTP

46

B

MulitplexedpincontrolledbyMODEsignal(seeI/OMODEconfigurationTa-ble).CPUSTPwillstopallCndSDRAMclockswithglitch.

48MHZ/F0*

26

B

48MHZoutputforUSBafterinputdatalatchedduringpower-on.

24MHZ/MODE*

25

B

Atpower-on,MODEfunctionisactivated(seeI/OModeconfigurationtable).

Itenablespowermanagementfeatures.Afterinputdatalatched,thispinwillgenerate24MHZoutputforSuperIOapplications.

REF0/F3*

2

B

Bufferedreferenceclockoutputafterinputdatalatchedduringpower-on.

REF1

46

O

Bufferedreferenceclockoutput.

IOAPIC

47

O

2.5V14.318MhzReferenceclockoutputforparallelprocessing.

I2CBUSCONFIGURATIONSETTING

AddressAssignment

A6 A5 A4 A3 A2 A1 A0 R/W

1 1 0 1 0 0 1 —

SlaveReceiver/Transmitter

Providesbothslavewriteandreadbackfunctionality

DataTransferRate

Standardmodeat100kbits/s

SerialBitsreading

TheserialbitswillbereadorsentbytheclockdriverinthefollowingorderByte0-Bits7,6,5,4,3,2,1,0

Byte1-Bits7,6,5,4,3,2,1,0

-

ByteN-Bits7,6,5,4,3,2,1,0

DataProtocol

Thisserialprotocolisdesignedtoallowbothblockwriteandreadfromthecontroller.Thebytesmustbeaccessedinsequenctialorderfromlowesttohighestbyte.Eachbytetransferedmustbefollowedby1acknowledgebit.Abytetransferedwithoutacknowledgebitwillterminatethetransfer.Theblockwriteorreadbothbeginswiththemastersendingaslaveaddressandawritecondition(0xD2)orareadcondition(0xD3).Followingtheacknowledgeofthisaddressbyte,twoadditionalbytesmustbesentbythemasterbutignoredbytheslave:

A:CommandCodebyte:0x00

B:ByteCountbyte:#oftheadditionalbytesrequiredforthetransfer.(32bytesMax)

Afterthetransferofthese2bytesarecompletethenthetransferofacutaldatawillbegininbothwriteandreadoperation.

I2CCONTROLREGISTERS

BYTE0:FunctionalandFrequencySelectClockRegister(1=enable,0=disable)

BIT

PIN#

Defau ESCRIPTION

Bit

7

N/A

0

SST1

Bit

6

8

0

F2(seeFrequencySelectionTable)

Bit

5

7

0

F1(seeFrequencySelectionTable)

Bit

4

26

0

F0(seeFrequencySelectionTable)

Bit

3

N/A

0

Frequencyselectioncontrolbit.1=ViaI2C,0=ViaExternaljumper.

Bit

2

N/A

0

SST0

Bit

1

N/A

0

0=Normal1=Spreadspectrumenable

Bit

0

N/A

0

0=Normal1=TristateMode

SpreadSpectrumControl

SST1

SST0

SSTMODE

1

1

NOSST

1

0

CenterSpread0.5%

0

1

CenterSpread0.25%

0

0

CenterSpread0.75%

BYTE1:CPUClockRegister(1=enable,0=disable)

BIT

PIN#

DefauESCRIPTION

Bit7

26

1

48MHz

Bit6

25

1

24MHZ

Bit5

2

1

F3(seeFrequencySelectionTable)

Bit4

N/A

1

Bit3

40

1

CPU3(Active/Inactive)

Bit2

41

1

CPU2(Active/Inactive)

Bit1

43

1

CPU1(Active/Inactive)

Bit0

44

1

CPU0(Active/Inactive)

BYTE2:PCIBUSClockRegister(1=enable,0=disable)

BIT

PIN#

Defau ESCRIPTION

Bit7

N/A

1

Bit6

7

1

PCI_F(Active/Inactive)

Bit5

15

1

PCI5(Active/Inactive)

Bit4

13

1

PCI4(Active/Inactive)

Bit3

12

1

PCI3(Active/Inactive)

Bit2

11

1

PCI2(Active/Inactive)

Bit1

10

1

PCI1(Active/Inactive)

Bit0

8

1

PCI0(Active/Inactive)

BYTE3:SDRAMClockRegister(1=enable,0=disable)

BIT

PIN#

DefauESCRIPTION

Bit7

28

1

SDRAM7(Active/Inactive)

Bit6

29

1

SDRAM6(Active/Inactive)

Bit5

31

1

SDRAM5(Active/Inactive)

Bit4

32

1

SDRAM4(Active/Inactive)

Bit3

34

1

SDRAM3(Active/Inactive)

Bit2

35

1

SDRAM2(Active/Inactive)

Bit1

37

1

SDRAM1(Active/Inactive)

Bit0

38

1

SDRAM0(Active/Inactive)

Notes:1.InactivemeansoutputsareSTOPPEDandheldLOW.

BYTE4:SDRAMClockRegister(1=enable,0=disable)

BIT

PIN#

DefauESCRIPTION

Bit7

2

1

Power-upF3settingvalue(Readonly)

Bit6

N/A

1

Bit5

N/A

1

Bit4

N/A

1

Bit3

17

1

SDRAM11(Active/Inactive)

Bit2

18

1

SDRAM10(Active/Inactive)

Bit1

20

1

SDRAM9(Active/Inactive)

Bit0

21

1

SDRAM8(Active/Inactive)

BYTE5:PeripheralClockRegister(1=enable,0=disable)

BIT

PIN#

DefauESCRIPTION

Bit7

8

1

Power-upF2settingvalue(Readonly)

Bit6

7

1

Power-upF1settingvalue(Readonly)

Bit5

N/A

1

Bit4

47

1

IOAPIC(Active/Inactive)

Bit3

26

1

Power-upF0settingvalue(Readonly)

Bit2

N/A

1

Bit1

46

1

REF1(Active/Inactive)

Bit0

2

1

REF0(Active/Inactive)

BYTE6:OptionalRegister(1=enable,0=disable)

BIT

PIN#

Defau ESCRIPTION

Bit7

N/A

1

Bit6

N/A

1

Bit5

N/A

1

Bit4

N/A

1

Bit3

N/A

1

Bit2

N/A

1

Bit1

N/A

1

Bit0

N/A

1

Notes:1.InactivemeansoutputsareSTOPPEDandheldLOW.

UMRATINGS

SUPPLYVOLTAGEINPUTVOLTAGEESDVOLTAGE

POWERDISSIPATION

VSS-0.5TO7V

VSS-0.5VtoVDD+0.5V2000V

0.75W

ExposureofthedeviceunderconditionsbeyondthelimitsspecifiedbyumRatingsmaycausepermanentdamagetothedevice

ACSPECIFICATIONS

VDD=3.3V±10%0oCto70oC

PARAMETERS

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

Referenceinputclockrisetime

TIR

From0.8Vto2V

20

ns

Referenceinputclockfalltime

TIF

From2Vto0.8V

20

ns

Jitter,Absolute(20pFload)

TJA

CPU,SDRAM,PCI

80

150

ps

Jitter,OneSigma(20pFload)

TJO

CPU,SDRAM,PCI

16

ps

FrequencyStabilizationafterPowerUp

FST

3

ms

DCSPECIFICATIONS

VDD=3.3V±10%0oCto70oC

PARAMETERS

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

DynamicCurrent

IDYN

Ct66.6MHZnoload

55

110

mA

StaticCurrent

ISTAT

Allinternalcircuitryoff,XIN=0

25

50

A

InputHighVoltage

VIH

AllInputceptXIN

2

V

InputLowVoltage

VIL

AllInputceptXIN

0.8

V

Pull-upresistor

RPu

Pin2,7,8,15,25,26,46

25

Kohm

Pin23,24

250

OutputLowCurrent@VOL=0.4V

IOL

XOUT

1

mA

CrystalLoadCapacitance

CL

Pin3,4(Crystalpins)

17

pF

InputLoadCapacitance

CIN

Allpincept3,4

5

pF

BUFFERSPECIFICATIONS

ACPARAMETERSTA=0Cto+70CVDD=3.3V±5%OTHERWISESPECIFIED

PARAMETERS

SYMBOL

OUTPUTS

CONDITIONS

MIN

TYP

MAX

UNITS

Outputrisetime

TOR

CPU(0:3)

From0.4Vto2.0V,20pfLoad,VDD=3.3V

or2.5V

1

4

V/ns

REF0,48MHZ,24MHZ

From0.4Vto2.0V,20pfLoad

1

4

SDRAM(0:11),REF1

From0.4Vto2.0V,30pfLoad

1

4

PCI_F,PCI(0:5)

IOAPIC

From0.4Vto2.0V,30pFLoad,VDD=3.3V

or2.5V

1

4

OutputFalltime

TOF

CPU(0:3)

From0.4Vto2.0V,20pfLoad,VDD=3.3V

or2.5V

1

4

V/ns

REF0,48MHZ,24MHZ

From0.4Vto2.0V,20pfLoad

1

4

SDRAM(0:11),REF1

From0.4Vto2.0V,30pfLoad

1

4

PCI_F,PCI(0:5)

IOAPIC

From0.4Vto2.0V,30pFLoad,VDD=3.3V

or2.5V

1

4

DutyCycle

DT

CPU(0:3),SDRAM(0:11),PCI_F,PCI(0:5),48MHZ,24MHZ

Measuredat1.5V,Load=20pf

45

50

55

%

IOAPIC,REF(0:1)

40

60

ClockSkew

TSKEW

CPUtoCPU

Measuredat1.5V,equalloads

250

ps

SDRAMtoSDRAM

250

PCItoPCI

500

CPUtoSDRAM

250

CPUtoPCI

1

5

ns

OutputImpedance

Z0

CPU(0:3)

VDD=3.3Vor2.5V

30

OHM

REF0,48MHZ,24MHZ

VDD=3.3V

30

SDRAM(0:11),REF1

20

PCI_F,PCI(0:5)

IOAPIC

VDD=3.3Vor2.5V

20

DCPARAMETERSVDD=3.3V±5%TA=0Cto+70C

PARAMETERS

SYMBOL

OUTPUTS

CONDITIONS

MIN

TYP

MAX

UNITS

OutputHighCurrent

IOH

CPU(0:3)

VOH=1.5V

45

60

80

mA

SDRAM(0:11)

70

90

120

PCI_F,PCI(0:5)

70

90

120

IOAPIC

60

80

105

REF0

40

50

65

REF1

60

80

105

48MHZ,24MHZ

40

50

65

OutputLowCurrent

IOL

CPU(0:3)

VOL=1.5V

45

60

80

mA

SDRAM(0:11)

70

90

120

PCI_F,PCI(0:5)

70

90

120

IOAPIC

60

80

105

REF0

40

50

65

REF1

60

80

105

48MHZ,24MHZ

45

50

65

DCBUFFERSPARAMETERSVDD=2.5V±5%TA=0Cto+70C

PARAMETERS

SYMBOL

OUTPUTS

CONDITIONS

MIN

TYP

MAX

UNITS

OutputHigh

Current

IOH

CPU(0:3)

VOH=1.25V

45

60

80

mA

IOAPIC

40

50

65

OutputLow

Current

IOL

CPU(0:3)

VOL=1.25V

45

60

80

mA

IOAPIC

40

50

65

PLL52C66-11

Pha