IMX6硬件设计指南与硬件启动

i.MXHWDesignGuide

andBoardBringUp

FAE:LindaLinConsolidatedbyi.MXFAE(Draftver0.2)Aug.6,2014Topics1.i.MX6HWDesignReferenceBoard.(gothroughschematicofi.MX6SDP)2.i.MX6HardwareDevelopmentGuide.(IMX6DQ6SDLHDG.pdf)3.i.MXHWCheckingList.(Excelfileofi.MX6HWDesignCheckingList)4.i.MX6XPowerdesign5.DDRCalibrationandStressTest.6.IOMuxTool7.i.MX6XHardwarebringupi.MX6HWDesignReferenceBoard.RelatedHardwarematerialsSABRESDP_DESIGNFILES.zip/SABRE_AI_DESIGNFILES.zip:SDP/AIboardschematic/layout.IMX6DQ6SDLHDG.pdf:i.MX6Xhardwaredesignguide,includeschematic/layoutcheckpoints,iomuxtools,bringup,IBIS/BSDL,RMIIinterface.IMX6DQ/DLS_A/I/CEC.pdf:i.MX6XDatasheet:includechipsetelectricalCharacteristicslikethevoltagerange,MaxcurrentandPowersequence.IMX6DQ/DLS_RM.pdf:i.MX6XChipsetreferencemanual.AN4509:i.MX6DQPowerConsumptionMeasurement.AN4576:i.MX6DLSPowerConsumptionMeasurement.IMX6_IOMUX_TOOL:iomuxconfigurationtools.Mfgtools-Rel-4.1.0_130816_MX6Q_UPDATER.tar.gz:MFGtools.L3.0.35_4.1.0_130816_images_MX6.tar.gz:linuxdemoimage.HWDesignCheckingListfori.Mx6Rev2.6.xlsx:i.MX6Xhardwarechecklist,downloadfrom:DDR_Stress_Tester_v1.0.3.zip:DDRtesttools,downloadfrom:i.Mx6DQSDLDDR3ScriptAid:DDRconfigurationtools,Downloadfrom:Freescalei.MX6DRAMPortApplicationGuide-DDR3

i.MX6ReferenceSolutionRelatedMaterialSelect“SABREPlatformforSmartDevices”HardwareMaterial(Schematic,PCB,Gerber.etc);SABREBoardforSmartDevices(SDB)i.MX6Quad1GhzCortex-A9ProcessorCanbeconfiguredasi.MX6DualFreescaleMMPF0100PMIC1GBDDR3memory(nonterminated)3”x7”8-layerPCBDisplayconnectors2xLVDSconnectorsConnectorfor24bit4.3”

800x480WVGAwith

4-wiretouchscreenHDMIConnectorAudioWolfsonAudioCodecMicrophoneandheadphonejacksExpansionConnectorCameraCSIportsignalsI2C,SSI,SPIsignalsConnectivity2xFull-sizeSD/MMCcardslot22-pinSATAconnector10/100/1000Ethernetport1xhigh-speedUSBOTGportmPCI-econnector

DebugJTAGconnectorSerialtoUSBconnectorAdditionalFeatures3-axisFreescaleacceleCompassPowersupplyNobatterychargerOSSupportLinuxandAndroidJBfromFreescale;Others:supportby3rdpartiesToolsSupportLauterbach,ARM(DS-5),Macraigordebug/IDEtoolchainPartNumbers: MCIMX6Q-SDB($399)Display(9.7”): MCIMX-LVDS1($499)Display(4.3”): MCIMX28LCD($199)SABREPlatformforSmartDevices(SDP)i.MX6Quad1GHzCortex-A9Processori.MX6DualLite1GHzCortex-A9ProcessorFreescaleMMPF0100PMIC1GBDDR3memory(nonterminated)3”x7”8-layerPCBDisplayconnectorsNative1024x768LVDSdisplay

(comeswithkit)2ndLVDSconnectorConnectorfor24bit4.3”

800x480WVGAwith

4-wiretouchscreenHDMIConnectorMIPIDSIconnectorAudioWolfsonAudioCodecMicrophoneandheadphonejacksDual1WSpeakersExpansionConnectorEnablesparallelLCDorHDMIoutputCameraCSIportsignalsI2C,SSI,SPIsignalsConnectivity2xFull-sizeSD/MMCcardslot22-pinSATAconnector10/100/1000Ethernetport1xhigh-speedUSBOTGportmPCI-econnector

DebugJTAGconnectorSerialtoUSBconnectorAdditionalFeatures3-axisFreescaleaccelGPSreceiverAmbientLightSensoreCompassDual5MPCamerasPowersupplyBatteryChargerBatteryconnectorsOSSupportLinuxandAndroidJBfromFreescale;Others:supportby3rdpartiesToolsSupportLauterbach,ARM(DS-5),Macraigordebug/IDEtoolchainPartNumbers: MCIMX6Q-SDP($999)

MCIMX6DL-SDP($999)Display(4.3”): MCIMX28LCD($199)WiFi: SilexWiFimoduleSABREPlatformforAutomotiveInfotainment(AI)PowerandMemoryFreescaleMMPF0100PMIC2GBDDR3memory(i.MX6Dual/Quad)1GBDDR3memory(i.MX6Solo)32GBParallelNORFlashNANDSocketDisplayLVDSconnectorcompatiblewithMCIMX-LVDS1ParallelRGBdisplayinterfaceHDMIoutput

connector

DebugJTAGconnectorDebugUARTconnectorConnectivityandExpansionSDCardSlotHighSpeedUSBOTGEthernetSATAMIPICSIPCIeMLB150INICconnector281-pinMXMcardedgeconnectorformainboardexpansionCanbereusedfromi.MX53SABREAIConnectivityandExpansionSDcardslot(WiFimoduleorSD)BluetoothorBluetooth+WiFiheaderAM/FMtunerheaderSiriusXMModuleheader(de-pop’’d)GPS(UART)moduleconnector2xCANDualHighSpeedUSBHostconnectorsMLB25/50INICconnectorSPINORflash

DisplayI/OLVDSconnectorcompatiblewithMCIMX-LVDS1AnalogVideoInputLVDSInputAudioCirrusmultichannelaudiocodecUpto8outputsDualmicrophoneinputsStereoLineLevelInputSPDIFreceiverOSSupportLinuxOthers:futuresupportby3rdpartiesCPUCardDetailsBaseBoardDetailsPartNumbersBaseBoard: MCIMXABASEV1($699)CPUCards: MCIMX6SAICPU1($799) MCIMX6QAICPU1($799)Display: MCIMX-LVDS1($499)i.MX6SMARTDEVICESYSTEMBlockDiagrami.MX6SMARTDEVICESYSTEMSchematic

Here,openi.MX6SabreSDSchematic,gothroughit.i.MX6HardwareDevelopmentGuide.Suggestion:Pre-design:Studythedatasheet,powerconsumption,schematictounderstandourchipsetrequirement.In-design:Checkthehardwaredesignguide,iomuxtoolsAfter-design:FilltheHWdesigncheckinglist,providetheiomuxdatatosoftware.Hardware-bringup:Checkthepower,powersequence,clock,reset,providethebootconfigurationtosoftware,runddrtest.Debugport:SuggesttohaveUSBOTGPort:Forimageprogram,YoucanuseitasUSBhostport,noproblem.MFGjustuseUSBdevicemode.Debugserialport,i.MX6Xubootcanchangetosupporteveryserialportasdebugport.Sdcardslot:SuggesttokeepatleastoneSdcardslot,itwillhelptousetheSdcardboot,whichcanburnimagedirectlyfromPCtoSdcard.NoneedtodebugtheMFGkernel.Jtag(optional).SuggesttousetheGPIOBoot_cfgbutnotthefuseBoot_cfg.Andbootmodepincanbepulled,becausewecanusethenon-imageboottoenterthedownloadmodei.MX6HardwareDevelopmentGuide

Here,open<<IMX6DQ6SDLHDG.pdf>>,gothroughit.1).DesignChecklist2).i.MX6SeriesLayoutRecommendations3).RequirementsforPowerManagement4).AvoidingBoardBring-upProblemsi.MXHWCheckingList.i.MXHWCheckingListHere,open<<HWDesignCheckingListfori.Mx6Rev2.6.xlsx>>,gothroughit.Clear1Isvoltagelevelmatchedonbus/signal/logic/buffertwoside?Clear2Suggestdrawingpull-upsnearpinareawithpowerdomaindescriptioninschematic.Clear3Pleasetakecareclocksourcecanmeetrequirementofperipheraldevices.(frequency/drivingcapability/jitter/tolorance/fly-timeetc.)Clear4WhenBuffer/Levelshifter/switchareused,SIimpactiononsignalshouldbeconsidered.Clear5ThecontrolsignalspolarityforDirectionSellect/EN/RESETshouldbecheckedforallthedevices.Clear6IOconfigurationshouldbecheckedusingIOMUXToolwhichprovidedbyFreescale.Clear7TheTESTandFAULTmodeinputsoftheindividualchipsshouldbetiedtotheproperlevelfornormaloperation.Clear8Pinsequence/direction/gendersofconnectorshouldbeconfirmedwithMechnicalconsideration.Clear9Pull-upsandvoltagesshouldbeverifiedforOC/ODsignals.Clear10Properpull-upandpull-downresistorvaluesprovidedtoavoidexcesssourcingorsinkingcurrent.Clear11Thepolaritiesofthecapsanddiodesconnectedto–vevoltagesshouldbeverified.Clear12Suggestallactivelowsignals--include“_B”atendofthesignalnetnameandallclocksignalsinclude“CLK”aspartofnetname.Clear13Pleaseconfirmifallpowersourcehavesufficientpowercapacityandgoodenoughripplenoiselevelforrequirementofpowerinput.Clear14Poweron/offsequencingshouldbeverifiedwhenmultiplepowersourcesareused.Clear15ThecurrentratingofDiodes/Inductorsusedinthepowersupplyandotherhighcurrentsectionsshouldbeprovidedproperly.Clear16PleasepayattentiononEMI/EMC/ESD/Ligteningconsideration(decouplingcaps/TVSdiodes/chokes/filters/beads/fueseetc).Clear17Pleaseconfirmifunusedpinsareconfiguredproperlyfollowingformalrecommend.Clear18Pleaseconfirmbootmodeandconfigurationpinsaresetproperlyandcanmeettheactualbootrequirment.Clear19Pleasetakecarewatchdog/cold/keyresetsystemdesign,PMICandbootdevicealsoshouldberesetatsametime.i.MX6XPowerdesigni.MX6PowerRelateddocIMX6DQCEC.pdf:i.MX6Dual/6QuadApplicationsProcessorsforConsumerProductsAN4509.pdf:i.MX6Dual/6QuadPowerConsumptionMeasurementIMX6SDLCEC.pdf:i.MX6Solo/6DualLiteApplicationsProcessorsforConsumerProductsAN4576.pdf:i.MX6DualLitePowerConsumptionMeasurementSDPschematic(PF0100):SPF-27392.pdfSaberliteschematic(DiscreteDCDC)(fromboundarydevices)IMX6DQ6SDLHDG.pdf(optional):DesignChecklist:Table2-6.PoweranddecouplerecommendationsPowerSupply,andCommonHardwareDesigni.MX6System-PowerDesignConsiderationsSystemPowerRequirements(oneachpowerrail)MaxCurrentrequirementVoltagerangeSystemOver-VoltageProtectionPowerOnSequencingSystemcontrolfunctionsLayout&decouplei.MX6PowerRailRequirementsToFunctionproperly,thei.MX6Processorrequiresninedifferentpowerrails(Somemaybecombined)VDDARMPowertoARMCoresAllowedvoltage:0.9V–1.5VVDDSOCVPPowertoonchipSystemPeripherals(VDDSOC_CAP):HDMIPHY,SATAPHY,PCIEPHY,&ARMCoreCachePowertoImageprocessingmodules(VDDPU_CAP)VPU,GPU2D,GPU3D,OpenVGAllowedvoltage:0.9V–1.5Vi.MX6PowerRailRequirements(con)VDDHIGHVPHPowertoonchipSystemPeripherals(VDDHIGH_CAP)MIPI,HDMI,SATA,PCIE,LVDS,USB,PLLsPowertomiscPeripherals(NVCC_PLL_OUT)USD,PLLs,24MHzOsc.SharedpowerofSNVSmoduleAllowedvoltage:2.7V–3.3VVSNVS32KHzOscillatorandSRTCfunctionsSharedpowerofSNVSmoduleAllowedvoltage:2.8V–3.3Vi.MX6PowerRailRequirements(con)USB_H1/OTG_VBUSPowertoUSBPHYAllowedvoltage:4.4V–5.25VNVCC_DRAMPowersupplyforDRAMmemoryAllowedvoltage:1.14V–1.575V(DependsontypeDRAM)EthernetIOpins(NVCC_RGMII)Allowedvoltage:1.14–1.9VGeneralIOpins(NVCC_)Typically1.8Vor3.3VAllowedvoltage:1.65V–3.6Vi.MX6PowerRailRequirements-SummaryInatypicalapplication,sixdifferentvoltagesarerequiredfortheprocessortofunction:FunctionTypicalVoltageVDDARM,VDDSOC1.375VVDDHIGH,VSNVS3.0VUSB_VBUS5.0VNVCC_DRAM1.5VNVCC_3.3V3.3VNVCC_1.8V1.8Vi.MX6PowerRequirements–VDDARM,VDDSOCDatasheetMaxRequirementsforVDDARM:3920mADatasheetMaxRequirementsforVDDSOC:1890mATypicalMaximumCurrentRequirements(AN4509):Showingthreeseparatevideooutputs1080pVideoplaybackHDMI1080pVideoplaybackIPUParallelport(LCD)3DgraphicsthroughLVDSportVDDARM:1625mAVDDSOC:1250mAi.MX6PowerRequirements–VDDHIGH,VSNVSDatasheetMaxRequirementsforVSNVS:300uAPullUpresistorsonVSNVSwilladdtocurrentrequirementsDatasheetMaxRequirementsforVDDHIGH:160mATypicalMaximumCurrentRequirements(AN4509):VDDHIGH:85mAi.MX6PowerRequirements–DRAM,IOPinsDatasheetMaxRequirementsforDRAM:1900mATypicalMaximumCurrentRequirements(AN4509):DRAM:1390mADatasheetrequirementsforIOPins,use:I(A)=NxCxVx(0.5xF)N–NumberofIOpinssuppliedC–Equivalentexternalcapacitiveload(Farads)V–IOvoltage(Volts)(0.5xF)–Datachangerate,whereF=Frequency(Hz)Typical=2-3mAfora3.3VpinSummaryPowerRequirementsPowerRailVoltageTypicalMaximumVDDARM1.375V1625mA3920mAVDDSOC1.375V1250mA1890mAVDDHIGH2.8V85mA160mAVSNVS3.0V-300uADRAM1.5V1390mA1900mAUSB5.0V500mA530mAI/OPins3.3V300mA500mA*I/OPins1.8V50mA275mA**MaximumvaluesaremutuallyexclusiveTypicalConsumerDevicePowerRequirementsFunctionVoltageTypicalMaximumSDCard3.3V100mAWIFI/BT3.3V1000mA3G/4GModem3.3V2000mA3000mALVDS3.3/5V300/370mAHDMI5V50mAEthernet3.3V130mAAudio1.8/5V40/100mA80/530mASATA5V500-1000mA1500mAeMMC3.3V100mA200mACAN5V70mAGPS1.5/3.3V20/100mACamera1.5/1.8V150/20mAGrandTotalPowerRequirementsVoltageTypicalFullPower1.375V1875mA5800mA1.5V1500mA2300mA1.8V100mA350mA3.0V160mA200mA3.3V2000mA5000mA5.0V1500mA3300mAi.MX6System-PowerDesignConsiderationsTotalSystemPowerRequirementsTypicalSystemrequirements(5Vsource):2.9ATypicalSystemrequirements(3.7Vsource):4.1ASystemOver-VoltageProtectionSelectPowercomponentswithhighvoltagetoleranceDesignOver-Voltageprotectionsub-systemUserbatterychargingcircuitwithprotection.PowerOnSequencingSystemcontrolfunctionsStand-by,reducedpoweroptionsi.MX6System-PowerOn/OffSequencingPowerOnSequencingVDD_SNVS_IN=<VDDHIGH_IN<anyotherpowersupply(FSLsuggestVDDHIGN_INpowerwithVDD_SNVS_INorinstep2)VDDARM_IN<=(VDDSOC_IN-1ms);Vvddarm_cap<=(Vvddsoc_cap+50mV):IfVDDARM_INandVDDSOC_INareconnectedtodifferentexternalsupplysourcesPowerOffSequencingN/ANotes:Needtoensurethatthereisnobackvoltage(leakage)fromanysupplyontheboardtowardsthe3.3Vsupply(forexample,fromtheexternalcomponentsthatuseboththe1.8Vand3.3Vsupplies)USB_OTG_VBUSandUSB_H1_VBUSarenotpartofthepowersupplysequenceandmaybepoweredatanytimeIMX6DQ6SDLHDG:Table2-6.PoweranddecouplerecommendationsVGEN5forVDDHIGH_INandincreaseto3VtoalignwithdatasheetOnlyone22μFbulkcapacitorshouldbeconnectedtoeachoftheseon-chipLDOregulatoroutputs:VDD_ARM/23/SOC/PU_CAPasnearaspossiblewithpins/vias.Thedistanceshouldbelessthan50milbetweenbulkcapandVDD_xx_CAPpins;ripplenoiseshouldbelessthan5%Vp-pofsupplyvoltageaveragevalueNVCC_LVDS2P5mustbepowered-onevenwhennotusingtheLVDSinterface becauseTheDDRpre-driverssharetheNVCC_LVDS2P5powerrailwiththeLVDSinterface33i.MX6Dual/Quad:5vINPUT+PFUSE100:SDP34i.MX6Dual/Quad:5vDiscretePowerDevelopTools

DDRStressTestDDRStressTestToolWhatisDDRStressTesterkit?Itisdownloadabletestapplicationarchitecture.AprogramrunningonPC(DDR_Stress_Tester.exe,whichrunningonCommandPromptwindow)willdownloadthetestimagetotargetboard’sIRAMwiththehelpofUART/USBconnection.ThetestimagewilldotheDDRstresstestandtheresultwillbesenttoPCthroughUART/USBandbeprintedontheCommandPromptwindow.Formx6dq,mx6dlsormx6sl,UARTisnotsupported.Supportmx53,mx51,mx6dq,mx6dlsandmx6sl.DDRStressTestToolcont.TestLog

LinkDevelopTools

IOMuxToolIOMUXToolApplicationWindowOverview

DownloadandInstalltheMicrosoft.NETFramework4.0SelectModulesandSignalsforBoardChecktheUARTS:UART1,UART2andUART3.ExpandallsignalsunderUART3.AccessingMuxed-SignalInfoAccessingMuxed-SignalInfoResolveConflictingSignalsSelectALT4–EIM_D30(J20)forUART3/CTS.SelectALT4–EIM_D31(H21)forUART3/RTS.SelectALT2–SD4_CLK(E16)forUART3/RXD_MUX.SelectALT2–SD4_CMD(B17)forUART3/TXD_MUX.AddingCommentsforClarityRight-clicktheUART2/TXD_MUXrowintheSignalstabtobringupthecontextmenu.Clickingonthemenuwillbringupatextentryfieldwheretheusermayentertext.AddingCommentsforClarityBallDiagramViewPads“Spreadsheet”ViewConfiguringIOMUXCRegistersSelectUART3/RXD_MUXintheleft-handpane.AlloftheIOMUXCRegistersassociatedwiththeAD4_CLK(E16)padareshownontheRegistersTabintheright-handpane.DragaSignaltoanotherModuleRenameSignaltoMatchSchematicsCAN1ModulewithAllSignalsCommentsauto-generatedtodenoteoriginalModule/Signal.CodeReflectsAddedSignalsBasicCodeStyleasaTooltip.GenerateConfigurationCodeSeveralCode-StylesavailableintheCodeMenu.ExamplesareshownintheUser’sGuide.Click“GenerateCode”tocreatethefilesforthecurrentdesign.Tryiti.MX6XHardwarebringupi.MX6XHardwarebringup:Doc&Tools.IMX6DQ6SDLHDG.pdf:Chapter8AvoidingBoardBring-upProblems.IMX6XRM.pdf:Chapter7SystemBoot,Chapter60:SystemResetController(SRC)MFGtools,DDRtesttools.USBline;有源可限流电源，万用表，示波器i.MX6XHardwarebringup:Step1目视检查检查主要器件是否有错贴的情况，比方说二极管，三极管，有没有安装位置反向或旋转的问题。可以在PCBA时使用X光检查，有条件的使用BSDL检查来确认焊接与连线i.MX6XHardwarebringup:Step2

电源检查使用万用表，先空板检查每个电源有没有对地短路的情况。使用限流电源上电，检查i.MX6X每路电源的电压是否符合我们datasheet要求，量测电压是要求在电源输出端和i.MX6X电源输入端(越近越好，如在滤波电容上量测)都量测一下，以防止IR跌落。VDD_ARM/SOC_IN供给i.MX6X内部逻辑电路，需要仔细检查，VDD_SNVS_IN，NVCC_JTAG,NVCC_DRAM也对正常启动很重要，NVCC_LVDS2V5也供给了DDRI/OPads,也必须要正常供给。i.MX6X在各路电源稳定后，才能释放reset(POR_B)。如前电源上电时序要求，检查上电时序。i.MX6XHardwarebringup:Step3

时钟检查一般在电源电压正确，无跌落，24Mhz和32K晶体会自动起振。可使用示波器量测这两个时钟，如果24Mhz不工作，那么系统不能启动，如果外部没有32K，或32K不工作，那么i.MX6X会自动使用内部晶振，但根据newerrataIM6DQCERev.4,07/2014:ERR007926ROM:32kHzinternaloscillatortiminginaccuracymayaffectSD/MMC,NAND,andOneNANDboot,由于内部romcode的GPT使用这个时钟，而GPT被用于外设访问中一些event和timeout控制，所以不稳定的时钟有可能导致romcodes读取外设失败，所以建议连接外部32K.i.MX6XHardwarebringup:Step4准备bringup文档一般硬件工程师需要准备三份文档描述板级设计电源文档:每一路电源的源，供给到?输出，输入电压，测量点,时序。如SDPschematic:i.MX6XHardwarebringup:Step4准备bringup文档IOMUX文档：可以使用iomux工具导出，也可以手动准备,内容最好包括：以方便软件工程师配置IOMUX，这个表应该至少包括所有数字管脚,软件工程师根据这个表来配置iomux文件:arch\arm\mach-mx6\Board-mx6q_sabersd.hstaticiomux_v3_cfg_tmx6q_sabresd_pads[]={… /*UART1fordebug*/ MX6Q_PAD_CSI0_DAT10__UART1_TXD,//CSI0_DAT10为管脚名，UART1_TX会功能名。Notes:1i.MX6X根本所有的可做为GPIO的pin在reset状态下都是iomux设为gpio,gpio设为输入高阻，iopad设为100K上拉的.2i.MX6X的datasheet中也列出了一些例外:Formostofthesignals,thestateduringresetissameasthestateafterreset,However,therearefewsignalsforwhichthestateduringresetisdifferentfromthestateafterreset:EIM_A16~A25,EIM_DA0~DA15,EIM_EB1~EB3,EIM_LBA/RW/WAIT,GPIO_17/19,KEY_COL0，请注意有一些pin是用于bootgpio的.管脚名脚管序号网络名IOMUX用于CSI0_DATA10M1UART1_TXALT3UART1_TXi.MX6XHardwarebringup:Step4准备bringup文档Boot_Cfg文档：说明Boot_cfg配置，以SDP的eMMCboot为例FuseSBMR1定义GPIO管脚默认值设置值默认值定义BOOT_CFG1[7:6]Bit7_6启动设备接口EIM_DA7_6000101:BootfromUSDHCBOOT_CFG1[5]bit5SD/MMCSelEIM_DA5010:SD/eSD/SDXC;1:MMC/eMMCBOOT_CFG1[4]bit4FastBootSuppoEIM_DA4000:NormalBoot;1:FastBootBOOT_CFG1[3:2]bit3_2SD/MMC速度模式EIM_DA3_20000MMC:0x:HighSpeedMode;1x:NormalSpeedModeSD:0x:High/Normal;

10:SDR50;

11:SDR104BOOT_CFG1[1]bit1SDPowerCycleeMMCResetEIM_DA100MMC:0:eMMCresetdisabled.1:eMMCresetenabledviaSD_RSTpad(onUSDHC3/4)SD:0:Nopowercycle1:PowercycleenabledvisSD_RSTpad(onUSDHC3/4)BOOT_CFG1[0]bit0SDLoopbackClockSourceSel(SDR50/104only)EIM_DA0000:throughSDpad1:directBOOT_CFG2[7:5]bit15_13BusWidth/SDCalibrationStepEIM_DA15~13000010SD:BusWidth:xx0:1bit;xx1:4bit.SDCalibrationStep:00x~11x:1~3delaycellsMMC000~010:1,4,8bit.101~110:4,8bitDDR(MMC4.4)i.MX6XHardwarebringup:Step4准备bringup文档SDP的BootSelect为:所以eMMC启动的SBMR1=0Xxxx5860FuseSBMR1定义GPIO管脚默认值设置值默认值定义BOOT_CFG2[4:3]Bit12_11启动设备接口EIM_DA12_11001100~11:USDHC1~4BOOT_CFG2[2]Bit10DLLOverride(eMMC)EIM_DA10000:BootROMdefault;1:ApplyvalueperfuseMMC_DLL_DLY[6:0]BOOT_CFG2[1]Bit9BootACKdisable/PulldownDuringPowerCycleEnableEIM_DA900MMC:0:BootACKEnabled;1:BootACKDisabled.SD:0:UsethedefaultSDpadsettingsduringpowercycle.1:SetPulldownonSDpadsduringpowercycleBOOT_CFG2[0]bit