《专业英语》-Unit2教学材料

Lesson4IntroductionofCP-45F/VKeywordsexterior外观HeadAssembly磁头组件spindle轴flyingvision飞行视觉simultaneous同时tapefeeder胶带供料器CoordinateSystem坐标系indicate指出fiducialmark基准标志下一页返回nozzle喷嘴Theta(R)-Axis极坐标clockwise顺时针alignment调准placement安装SideLight侧光灯illuminate照亮emphasize突出lens透镜Lesson4IntroductionofCP-45F/VInnerLight内光灯entire整个reflection反射odd奇怪的desired期望的optimum最佳的，最适度的detach分开，分离accommodate容纳，适应shutter快门下一页返回valve阀门buffer缓冲器cylinder汽缸，泵体process过程，工序，流程counterclockwise逆时针BGAcomponent(BallGridArray)球状引脚栅格阵列封装技术ANC(AutoNozzleChanger)自动喷嘴更换装置Lesson4IntroductionofCP-45F/VHowaretheelectroniccomponentsplacedontheboardsespeciallytheoddandthesmallones?Differentsizes,differenttypes,etc.TheflowoftheproductmanufacturingasshowninFig4-1下一页上一页返回Lesson4IntroductionofCP-45F/VExterior(nameofeachpart)EquipmentexteriorandbasicconfigurationandnameofeachpartofCP45asshowninFig4-2andFig4-3下一页上一页返回Lesson4IntroductionofCP-45F/VHeadassemblyHeadassemblyofCP-45F/VandCP-45FS,asshowninFig4-4

Theheadassemblyismanufacturedinonemodule;themoduleiscomposedofsixspindleunits.Eachspindlehasitsownflyingvision,andadoptsnoncontacttypecenteringsothatstableoperationcanbeperformed.Allspindlesarearrangedatregularintervalsof3000mmforsimultaneouspickupsfromthetapefeeder.下一页上一页返回Lesson4IntroductionofCP-45F/VCoordinatesystemThebasiccoordinatesystemisshowninFig4-5X,Yaxis:Usedtoindicatethepositionsofthehead,ANC,placeposition,andboardfiducialmark.Zaxis:Indicatesthepositionofanozzleinthehead.Theuppersideofthefixedboardisset0.Theta(R)axis:Indicatestheangleforcenteringacomponentbythehead.Thecounterclockwiserotationisindicatedas+,whileclockwiserotationisindicatedas-.下一页上一页返回Lesson4IntroductionofCP-45F/VXYframepartAsshowninFig4-6

Componentalignmentmethod(componentcenteringmethod)FlyingvisionOverview

下一页上一页返回Lesson4IntroductionofCP-45F/VTheflyingvisionsystemisavisionsystemattachedontheheadthatrecognizesacomponentwhenitmovesfromthepickupspositiontotheplacementposition.6CCDcamerasattachedontheheadrecognizecomponentson6headssimultaneously.3typesofmultiplestepdigitallightscanbeselectedforeachhead，asshowninFig4-7下一页上一页返回Lesson4IntroductionofCP-45F/VTheflyingvisionsystemhasamirroronthelightpath.ToavoidacollisionwiththeZaxis,itrotatesduringpickups,recognition,andplacement,asshowninFig4-8

IlluminationTheflyingvisionsystemprovides3typesoflightsforeachhead,asshowninFig4-9

下一页上一页返回Lesson4IntroductionofCP-45F/VUpwardvisionunit(ForCP-45FV)TheupwardvisionunitoftheCP-45FVmodelcanrecognizethegeneralandoddtypecomponents,asshowninFig4-10,andalsohasadigitallightingcontroller.Thus,safeandaccuraterecognitionandplacementispossible.LightpathcontrolTheoptimumlightingconditionsareachievedbyselectingthelightinginthedesireddirectionaccordingtothecomponenttobemeasuredasshowninFig4-11

TheoptimumlightingdirectionforeachcomponentisshowninFig4-12.下一页上一页返回Lesson4IntroductionofCP-45F/VANC(autonozzlechanger)ANCisfixedtotheequipment,andinanothertype,theusercanfreelyattachtoordetachfromthefeederbase.Twentynozzlepocketsforvarioustypesofcomponentsareemployed,asshowninFig4-13

下一页上一页返回Lesson4IntroductionofCP-45F/VBoarddetectionsensorTherearefiveboarddetectionsensorsinstalledonthePCBtakeinandtakeoutpathsoftheconveyor,asshowninFig4-14Thepositionsandfunctionsofeachsensorareasfollows:Inputsensor:DetectstakeinofPCBintothisequipmentfromthepreviousprocess.Waitsensor:DetectsPCBinthewaitbuffer(atthewaitposition).下一页上一页返回Lesson4IntroductionofCP-45F/VPlacesensor:DetectsPCBintheplacebuffer(attheplacementposition).QuickLoadsensor:DetectsPCBcompletedplacementsothatthePCBinthewaitbuffercanbeloadedquickly.Outputsensor:DetectsPCBtakenoutfromtheequipment.上一页返回Lesson5TheDesignofICLayoutKeyWordsIntegratedCircuit(IC)集成电路IP知识产权SystemOnChip(SOC)片上系统ASIC专用集成电路VLSI超大规模集成电路DSP数字信号处理FPGA现场可编程门阵列CPLD复杂可编程器件下一页返回nozzle喷嘴Theta(R)-Axis极坐标clockwise顺时针alignment调准placement安装SideLight侧光灯illuminate照亮emphasize突出lens透镜Lesson5TheDesignofICLayoutDRC设计规则检查LVS版图与电路图的对照match匹配active有源区source源drain漏gate栅well阱metal金属下一页返回resistance电阻capacitance电容inductance电感contact连接diode二极管bipolar三极管parasitic寄生parameters参数schematic电路Lesson5TheDesignofICLayoutWhatistheintegratedcircuit?Andhowistheintegratedcircuitdesigned?Aseveryoneknows,theintegratedcircuitisasinglecomponentincludingalargenumberofactiveandpassivedevicesandtheirinterconnectionstorealizecomplexfunctions.Today,theintegratedcircuitsareusedinvariousaspectsoflife,suchascellphones,computers,DV,TV,buscardsandsoon.Ourlifecan’tbeseparatedfromtheintegratedcircuit,asshowninFig5-1.下一页上一页返回Lesson5TheDesignofICLayoutICdesignflowIntegratedcircuitdesignanddesignabstractionlevelsasshowninFig5-2andFig5-3TheICdesignflowsasshowninFig5-4.Let’sbuildadigitalchip.Wewillfollowadesignteamastheyprogressfromconcept,throughcircuittesting,andfinallytotheactualgateplacementandwiringofadigitalchip,usingasuiteofsoftwaretools.

下一页上一页返回Lesson5TheDesignofICLayoutWhatislayoutLayoutdesigntechniqueshavedevelopedatanenormousrate.Asintegratedcircuitspeedsincrease,thelayoutdesignerisexpectedtoquickly,efficiently,andaccuratelytranslateaschematicintolayout,makeinformedchoicesbasedonknowledgeofincreasinglycomplextools,andunderstandhowcircuitfunctioncanaffectlayoutdecisions.Layoutdesignhasevolvedintoahighlyvaluedprofession.下一页上一页返回Lesson5TheDesignofICLayoutThelayoutdesignisgettingtheICdesignontosilicon,asshowninFig5-5,theplaceandroutetoolscanhelpus.Placeandroutetoolscoverthegamutofhigherlevelandlowerlevelsoftwareassistanceleadingtoyourfinallayout.First,youneedtocompletelyunderstandyourcircuit,bothelectricallyandphysicallySecond,youneedtounderstandyourmanufacturingprocessintimately—howeverycomponentintheprocessisbuiltandused.Aboveall,makesurethatlayoutdesignersgetalltheinformationneededtodotheirjobeffectively.Severalkindsoflayout,asshowninFig5-6

下一页上一页返回Lesson5TheDesignofICLayoutLayoutverification—DRC,LVSDRC〖WTBZ〗(DesignRuleCheck)：TheDRCprogramknowseverythingthereistoknowaboutyourprocess.Itwillgoawayanddiligentlycheckeverythingthatyouhavelaidout.ADRCprogramtypicallywillputbackintoyourlayoutabunchoferrormarkers.Thesearehighlightsonthelayoutlocatingyourerrors.下一页上一页返回Lesson5TheDesignofICLayout（LayoutVersusSchematic）:ExtensionstodesignrulecheckingsoftwarethatarefoundinLVSactuallycreaterealcomponentsandcircuits.MostpeoplecalltheprocessLVS,butinreality,itisnotjustlayoutversusschematic.Itisatowstepprocess.ThefirstpartoftheLVSprocessistheextractionofthedeviceinformationfromthelayout.ThesecondpartoftheLVSprocessisthecomparison.Thetoolextractsanetlistofthedevicesthatitfindsfromthelayout,thengeneratesnetlistfromtheschematic,thencomparesthosetwonetlists.下一页上一页返回Lesson5TheDesignofICLayoutLayouttutorial—creatinganinverterlayoutInLibraryManager:(File→New→Library,we’llcreateaDesignLibrarywhichisattachedtoaTechnologyLibrary)TechnologyLibrarycontainmaterialandrulesinyourICfabricationprocess.File→New→CellView,twowindowsappear,oneiscalledLSW,theotherisLayoutEditorWindow,asshowninFig5-7，Fig5-8.InLayoutEditor:DrawthelayoutofINV,asshowninFig5-9

下一页上一页返回Lesson5TheDesignofICLayoutDRC:ICfoundrieshavesetsofdesignrulesthatensurethatdesigncanbemanufacturedreliably—DRCcheckstoseeifthelayoutofINVviolatesanyoftheserules.LVS:ItverifiesthatthelayoutofINVandschematicaretopologicallyequivalent,asshowninFig5-10.上一页返回Lesson6ManufacturingProcessofSemiconductorKeyWordswafer芯片oxidation氧化etch刻蚀dryetching干法刻蚀ionimplant离子注入diffusion扩散下一页返回semiconductor半导体photolithography光刻wetetching湿法刻蚀doping掺杂ICproductionline集成电路生产线Lesson6ManufacturingProcessofSemiconductorIntroductionWhyisdesigningdigitalICsdifferenttodayfromwhatitwasbefore?Willitchangeinthefuture?Thefirstelectroniccomputer，computertoday，firsttransistorandtransistortodayasshowninFig6-1，Fig6-2，Fig6-3andFig6-4

下一页上一页返回Lesson6ManufacturingProcessofSemiconductorCircuitIntegrationThefirstintegratedcircuit,orIC,wasindependentlyco-inventedbyJackKilbyatTexasInstrumentsandRobertNoyceatFairchildSemiconductorin1959,asshowninFig6-5.AnICintegratesmultipleelectroniccomponentsononesubstrateofsiliconMoore’sLawIn1965,GordonMoorenotedthatthenumberoftransistorsonachipdoubledevery18to24months.Hemadeapredictionthatsemiconductortechnologywilldoubleitseffectivenessevery18months,asshowninFig6-6下一页上一页返回Lesson6ManufacturingProcessofSemiconductorICFabricationChips(ordie)arefabricatedonathinsliceofsilicon,knownasawafer(orsubstrate).Wafersarefabricatedinafacilityknownasawaferfab,orsimplyfab.ThefivestagesofICfabricationare:Waferpreparation:siliconispurifiedandpreparedintowafers.Waferfabrication:microchipsarefabricatedinawaferfabbyeitheramerchantchipsupplier,captivechipproducer,fablesscompanyorfoundry下一页上一页返回Lesson6ManufacturingProcessofSemiconductorWafertest:eachindividualdieisprobedandelectricallytestedtosortforgoodorbadchipsAssemblyandpackaging:eachindividualdieisassembledintoitselectronicpackage.Finaltest:eachpackagedICundergoesfinalelectricaltest.AsshowninFig6-7

ThewaferpreparationflowasshowninFig6-8ThewaferpreparationasshowninFig6-9

下一页上一页返回Lesson6ManufacturingProcessofSemiconductorOxidationOxidationistheprogressofgrowingsilicondioxideorsiliconnitrideonsilicon,asshowninFig6-10,siliconisconsumedasthesilicondioxideorthesiliconnitridearegrown.Growthofsilicondioxideoccursinoxygenat800℃-1200℃.OxidationcanpreventO2diffusion.下一页上一页返回Lesson6ManufacturingProcessofSemiconductorPhotolithographicPhotolithgraphicasshowninFig6-11

Theprocessofphotolithography:CoatingSoftbakeExposurePostexposurebakeDevelopHardbakeDevelopcheck下一页上一页返回Lesson6ManufacturingProcessofSemiconductorEtchEtchisthemethodofremovingthematerialsonsilicon.Themethodofetchcanbeclassifiedaswetetchinganddryetching.Isotropicetchantsetchatthesamerateineverydirection,andanisotropicetchantsetchatdifferentratesineverydirection,asshowninFig6-12.Selectivityistheratiooftherateofthetargetmaterialbeingetchedtotheetchrateofothermaterials.Chemicaletchesaregenerallymoreselectivethanplasmaetches.下一页上一页返回Lesson6ManufacturingProcessofSemiconductorDiffusionandIonImplantDopingisthemethodofimportingimpurityinsilicontochangeitselectricperformance.WecanrealizeitbydiffusionorionimplantCareerpaths

Thereisawiderangeofcareerpathsinsemiconductormanufacturing，includingtechnician，engineerandmanagement.上一页返回Lesson7ThePackageTechnologyofICKeyWordsassembly装配dieseparation分片leadframe引线框架eutecticattach共晶焊粘贴ultrasonicbonding超声键合backgrind背面减薄wirebonding引线键合epoxyattach环氧树脂粘贴下一页返回glassfritattach玻璃焊料粘贴Ceramicpacking陶瓷封装plasticpacking塑料封装thermocompressionbonding热压引线键合Thermosonicballbonding热超声球键合Lesson7ThePackageTechnologyofICIntroductionTraditionalassemblyandpackagingasshowninFig7-1

Chipsthatpassthewafersorttestundergofinalassemblyandpackaging.ICfinalassemblyseparateseachgooddiefromthewaferandattachesthedietoametalleadframeorsubstrate.ICpackagingenclosesthedieinaprotectivepackage.下一页上一页返回Lesson7ThePackageTechnologyofICTraditionalassemblyICfinalassemblyconsistsoffoursteps:backgrind,dieseparation,dieattachandwirebonding.Backgrindreducesthewaferthicknesstotheappropriatedimension.Dieseparationcutseachdiefromthewafer,asshowninFig7-2.Dieattachisthephysicalattachmentofthedietotheleadframeorsubstrate.Wirebondingattachesfinediameterwiresbetweendiebondingpadsandtheterminalsoftheleadframetoformelectricalconnections.下一页上一页返回Lesson7ThePackageTechnologyofICDieattachisdonebyepoxyattach,eutecticattachandglassfritattach.Thecommonepoxyattachmethodbondsthechiptotheleadframeusingepoxy,asshowninFig7-3,typicalleadframeasshowninFig7-4Eutecticattach,commonforbipolarICs,usesathinfilmofgoldonthebacksideofthewaferthatisalloyedwiththemetalizedsurfaceoftheleadframe,asshowninFig7-5Glassfritattachusesamixtureofsilverandglassinanorganicmediumtoattachchipsinaceramicpackage.下一页上一页返回Lesson7ThePackageTechnologyofICThethreebasictypesofwirebondingare:thermocompressionbonding,ultrasonicbondingandthermosonicballbonding,asshowninFig7-6,Fig7-7,Fig7-8.Thermalenergyandpressureareusedinthermocompressionbonding.〖JP3〗Ultrasonicbondingisbasedonultrasonicenergyandpressuretoformawedgebondbetweenthewireandpad.Thermosonicballbondingcombinesenergy,heatandpressuretoformaballbond.下一页上一页返回Lesson7ThePackageTechnologyofICTraditionalpackagingThetypicalICpackagingasshowninFig7-9TraditionalICpackagingmaterialsareplasticpackagingandceramicpackaging.Plasticpackagingusesanepoxypolymertoencapsulatethewirebondeddieandleadframe.Thistechnologyhasmanydifferenttypesofplasticpackages.下一页上一页返回Lesson7ThePackageTechnologyofICCeramicpackagingisusedforstateofthe—artICpackagesthatrequireeithermaximumreliabilityorhighpower.Thetwomaintypesofceramicpackagingareeitherarefractory(hightemperature)ceramic,asshowninFig7-10,orceramicDIP(CERDIP)technology.Bothhaveahermeticseal(sealedagainstmoisture).

下一页上一页返回Lesson7ThePackageTechnologyofICAdvancedassemblyandpackagingNewpackagingdesignsarebeingintroducedtoprovideformorereliable,fasterandhigherdensitycircuitsatlowercost.Advancedpackagingdesignsinclude:FlipchipBallgridarray(BGA)Chiponboard(COB)Tapeautomatedbonding(TABMultichipmodules(MCM)Chipscalepackaging(CSP)Wafer-levelpackaging下一页上一页返回Lesson7ThePackageTechnologyofICFlipchippackagingmountstheactivesideofachiptowardthesubstrate.Itusesbumptechnology(typicallysolderbumps)toformtheinterconnectionbetweenthechipandsubstrate.Anepoxyunderfillisusedaroundtheareaarrayofbumpstoimprovereliability,asshowninFig7-11.Ballgridarray(BGA)usesaceramicorplasticsubstratewithanareaarrayofsolderballstoconnectthesubstratetothecircuitboard，asshowninFig7-12.Tolowercosts,thistechnologyisreadilyintegratedintostandardsurfacemountassembly下一页上一页返回Lesson7ThePackageTechnologyofICChiponboard(COB)mountsICchipsdirectlytothesubstrate,alongsideothersurfacemount(SMT)orpininhole(PIH)components,asshowninFig7-13.Tapeautomatedbonding(TAB)usesaplastictapeasachipcarrier.Thetapehasathincopperfoilthatisetchedtoformtheleads.Thechipandleadsareremovedfromthecarrierpriortoassemblyontothecircuitboard,asshowninFig7-14.下一页上一页返回Lesson7ThePackageTechnologyofICMultichipmodule(MCM)hasseveraldieassembledontoonesubstrate.Thispermitsahigherdensityofchips,asshowninFig7-15.Chipscalepackaging(CSP)hasanICpackagethatisaboutthesamesizeasthesiliconchip(＜12timesthefootprintofthedie).Thisisafastgrowingmethodofadvancedpackaging,andprovidesforlowercost,lowerweightandlowerthickness.下一页上一页返回Lesson7ThePackageTechnologyofICWaferlevelpackagingplacesthe1stlevelinterconnectionsandpackageinput/outputterminalsonthewaferbeforeitisdiced.Itistypicallydonewith