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1、ABCDE11LCFCNM-A221Confidential22Rev1.0Schematic3344TitleSecurity ClassificationLC Future Center Secret DataCOVER PAGEIssued Date2013/09/07Deciphered Date2014/09/07THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIALSizeDocument NumberRev 1.0AND

2、 TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DCustomAITE1_NM-A221DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN

3、CONSENT OF LC FUTURE CENTER.Date:Thursday, November 06, 2014Sheet1of81ABCDEIntel Crescent Bay Processor with DDRIIIL + Wild Cat Point PCH AMD Opal-XT/ Jet-XT2013-09-07 Rev1.0ABCDEBroad WellUSB 2.0 Port 7eDP Conn.USB Port 7DP Port 0Page 38Memory BUS (DDRIII)1DPC (Interleaved)DP Port0DDR3L-SO-DIMM X2B

4、ANK 0, 1, 2, 31.35V DDRIIIL 1333/1600 MT/sUSB 2.0 Port 2 & 35V 480MHzUP TO 16G Page 181911OneLink boardIntel Crescent Bay ProcessorBGA116840mm*24mmUSB 3.0 Port 45V 5GT/sPage 34DP RepeaterOn OneLink boardDDI1 HDMIDDI1MUXHDMI Conn.DDI2 DPDDI1Page 42USB LeftPage 46USB 2.0 Port 0,15V 480MHzVGA ConnDPTra

5、slaterto CRTPage 43DDI2USB 3.0 Port1,2 5V 5GT/s+22Page 44PCIe Gen1 Port 3NGFF CardIntelWGI218V-QQJZ Non Vpro WGI218LM QQJY Vpro QFN48_6X6PCIe port 4Page 47RJ45 Conn.Page 48PCIe Gen1 Port 4SATA Gen3 Port1Intel WPTPointPCHUSB 2.0 port 4&6RealtekRUSB 2.0 Port 5Finger printerPage 50TS5227EPCIe Gen1 Port

6、 6SD/MMC/XD ConnPage 32SATA Gen3 Port0SATA HDDSATA Port 0page 3733Power Circuit DC/DCSPI ROM(8MB for NVpro) (12MB for Vpro)Page 9Page 6570SPI BUSSATA Gen2 Port1SATA ODD3.3V 33MHzSATA Port 1page 37One-Link Docking BoardLPC BUS3.3V 33MHz&HD AudioCodec ALC3232-CGPage 35, 36USB3.0 Port3SP_OUTR/L3.3V 24M

7、HzSPK Conn.Page 36ECITE IT8586E/FXPage 62Mirror functionUSB 2.0 Port 4HP_R/L_JACKExt MicCombon Jack BoardCombon JackPage 54Thermal Sensor Fintek F75303MPage 55Touch Pad ConnUSB Port 4Page 51Int.KBDPage 5144TitleSecurity ClassificationLC Future Center Secret DataXXXXIssued Date2013/09/07Deciphered Da

8、te2014/09/07THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DSizeDocument NumberRev 1.0CustomAITE1_NM-A221DEPARTMENT EXCEPT AS AU

9、THORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.Date:Thursday, November 06, 2014Sheet2of81ABCDEPower BoardPCIE Port 5Jet-XT M2 (AMD Radeon R5 M240)Topaz-XT M2(AMD Radeon R

10、5 M240)VRAM 128M*16 *8 VRAM 256M*16 *8PCIe port 5Page 2029NGFF Card mSATA/WWAN(option)SATA Port 1USB 2.0 port4page 52NGFF Card WLANPCIe Port 3USB 2.0 port6page 52JUSB2USB 3.0 Port 1USB 2.0 Port 0Page 40JUSB1USB 3.0 Port 2USB 2.0 Port 1Page 41ABCDEHigh Speed I/O portUC1Voltage Rails( O - Means ON, X

11、- Means OFF )UC1I/OHighSpeed SignalConfigurationPort assignment+5VS+3VS+1.5VS+VCCSA+V1.5S_VCCP+CPU_CORE+VGA_CORE+GFX_CORE+1.8VS+1.05VS+0.75VS+3.3VS_VGA+1.5VS_VGA+1.05VS_VGABroadwell-1.8GHz 15W 2+2U 1600 DDR ES2QGH9 Haswell-ULT-CL8064701478202_SR16Q SA000810900 SR16Q1USB31USB31On MB USBPowerPlaneSA00

12、005VY10UC12USB32USB32On MB USBUC13PCIE1/ USB3 3NCNC11Broadwell-1.6GHz ULV 15W 2+2U 1600 DDR ES2QGHB Broadwell-ULT-CL8065801674128_QG21SA000811100 QG21+3VALW4PCIE2/ USB3 4USB34Docking USB+1.5VB+5PCIE3PCIE3WLANSA000067H00UC1+5VALWUC16PCIE4PCIE4LANState7PCIE5L0PCIE5L0GPUBroadwell-1.6GHz 15W 2+2U 1333 D

13、DR ES2QGHA Broadwell-ULT-CL8065801675027_QG22SA000811000 QG228PCIE5L1PCIE5L1GPUSA000067I00UC1UC19PCIE5L2PCIE5L2GPU10PCIE5L3PCIE5L3GPUHaswell-CL8064701478404 QEARD0QEAR Haswell-ULT-CL8064701477400_SR1EDSA00005YZ00 SR1EDS0OOOO11PCIE6L0 / SATA 3PCIE6CardreaderSA00005YW10UC112PCIE6L1 / SATA 2SATA2mSATAS

14、3OOOX13PCIE6L2 / SATA 1SATA1ODDUV1Haswell-CL8064701477600 QEAH D0 2.0GQEAH SA000066W00214PCIE6L3 / SATA 0SATA0HDD2S5 S4/ACOnlyOOXXBOM Structure TableJET M2 XTJET SA000066500BOM StructureNOTES5 S4Battery onlyOXXXPCBFor PCB load BOMZZZ7 X76_S2GZZZ8 X76_H2G ZZZ9 X76_M2G3G3G function(Option with TS)S5 S

15、4AC & Battery dont existK4W4G1646D-BC1A H5TC4G63AFR-11C MT41J256M16HA-093G:EXXXXTPMTrusted Platform Module (TPM)X7603901003X7603901001X7603901002NM1414 SKU IDZZZ10 X76_S1G ZZZ11 X76_H1G ZZZ12 X76_M1GNM1515 SKU IDSMBUS Control TableUMAUMA SKU IDK4W2G1646Q-BC1A H5TC2G63FFR-11C MT41J128M16JT-093G:KX760

16、3901004X7603901005X7603901006DISOptimus SKU IDX76GPU VRAM Setting33UL1 VPROM2GMicron 256Mx16 VRAMM1GMicron 128Mx16 VRAMWGI218LM-QQJY-B1_QFN48_6X6SA00005TP10S2GSamsung 256Mx16 VRAMUC1UC1UC1S1GSamsung 128Mx16 VRAMMEME ConnectorBDW-i7-2.2G QH15 SA000072L00BDW-3205U-1.5G BDW-3755U-1.7GQGZ6 SA000072M00QG

17、Z5 SA000072J00TSTouch screen functionUC1UC1UC1UC1DEBUGFor debugBYPASSFor bypassBDW-i3-2G QH18 SA000072H00BDW-i3-2G QGZ3 SA000072P00BDW-i5-2G QH17 SA000072K00BDW-3805U-1.9G QGZ4 SA000072N00MIRRORFor mirror functionSIGNALNVPROFor Non-VPRO functionUC1UC1UC1ZZZ1STATESLP_S1# SLP_S3# SLP_S4# SLP_S5#+VALW+

18、V+VSClock44VPROFor VPRO functionFull ONHIGHHIGHHIGHHIGHONONONONX76_S2G S2GFor Samsung 2G VRAMHSW I3 4030U HSW I5 4210U HSW I3 4005U SR1ENSR1EFSR1EK SA000810100SA000066Y20 SA00005YZ20NM-A221 PCB DAZ0TS00100S1(Power On Suspend)LOWHIGHHIGHHIGHONONONLOWS3 (Suspend to RAM)LOWLOWHIGHHIGHONONOFFOFFTitleSec

19、urity ClassificationLC Future Center Secret DataNOTE LISTIssued Date2013/09/07Deciphered Date2014/09/07S4 (Suspend to Disk)LOWLOWLOWHIGHONOFFOFFOFFTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIALSizeDocument NumberRev 1.0AND TRADE SECRET IN

20、FORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DS5 (Soft OFF)LOWLOWLOWLOWONOFFOFFOFFCustomAITE1_NM-A221DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WI

21、THOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.Date:Thursday, November 06, 2014Sheet3of81ABCDESOURCEMain VGALANBATTIT8586ESODIMMWLAN WiMAXThermal SensorPCHCPModuleChargerPCH_SML0_CLK PCH_SML0_DATPCH+3V_PCHXV+3V_PCHXXXXXXXXPCH_SML1CLK PCH_SML1DATAPCH+3V_PCHV+3VSXXV+3VSXXV+3VSXXXEC_SMB_CK1 EC_SMB_DA1

22、IT8586E+3VLXXV+3VLXXXXXXV+3VLPCH_SMBCLK PCH_SMBDATAPCH+3V_PCHXXXXV+3VSXXV+3V_PCHV+3VSX54321Performance Mode P0 TDPat Tj = 102 C* (GDDR5)Hot plug detect for IFP link EVGA and GDDR5 Voltage Rails(N13Px GPIO)DDCCMasterSlave+3VS_VGABB+VGA_COREtNVVDD 0+1.5VS_VGAtFBVDDQ 0+1.05VS_VGAtPEX_VDD 01. all power

23、rail ramp up time should be larger than 40usOther Power rail+3VS_VGAAATpower-off 10msTitleSecurity ClassificationLC Future Center Secret DataVGA NOTEIssued Date2013/09/07Deciphered Date2014/09/071. all GPU power rails should be turned off within 10ms2. Optimus system VDD33 avoids drop down earlier t

24、han NVDD and FBVDDQTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DSizeDocument NumberRev1.0CustomAITE1_NM-A221DEPARTMENT EXCEPT

25、 AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.Date:Thursday, November 06, 2014Sheet4of8154321GPUN13P-GTFB Memory (GDDR5)ROM_SISamsung 2500MHzK4G10325FG-HC0432Mx32P

26、D 45KHynix 2500MHzH5GQ1H24BFR-T2C32Mx32PD 35KSamsung 2500MHzK4G20325FD-FC0464Mx32PD 30KHynix 2500MHzH5GQ2H24MFR-T2C64Mx32PD 25KGPUROM_SOROM_SCLKSTRAP0STRAP1STRAP2STRAP3STRAP4N13P-GT128nmPU 10KPU 25KPU 45KPD 35KPD 10KPU 5KPD 10K PU 20KPU 25KPU 45KPD 35KPD 10KPD 5KPD 10KsettingI2C Slave addrees IDSMB_

27、ALT_ADDR (ROM_SO Bit 1)00x9E10x9CDevice IDN13P-GT(28nm)0x0FDBPhysical Strapping pinPower RailLogical Strapping Bit3Logical Strapping Bit2Logical Strapping Bit1Logical Strapping Bit0ROM_SCLK+3VS_VGAPCI_DEVID4SUB_VENDORSLOT_CLK_CFGPEX_PLL_EN_TERMROM_SI+3VS_VGARAM_CFG3RAM_CFG2RAM_CFG1RAM_CFG0ROM_SO+3VS

28、_VGAFB1FB0SMB_ALT_ADDRVGA_DEVICESTRAP0+3VS_VGAUSER3USER2USER1USER0STRAP1+3VS_VGA3GIO_PAD_CFG_ADR33GIO_PAD_CFG_ADR23GIO_PAD_CFG_ADR13GIO_PAD_CFG_ADR0STRAP2+3VS_VGAPCI_DEVID3PCI_DEVID2PCI_DEVID1PCI_DEVID0STRAP3+3VS_VGASOR3_EXPOSEDSOR2_EXPOSEDSOR1_EXPOSEDSOR0_EXPOSEDSTRAP4+3VS_VGARESERVEDPCIE_SPEED_ CH

29、ANGE_GEN3PCIE_MAX_SPEEDDP_PLL_VDD33VGPIOI/OACTIVEFunction DescriptionGPIO0OUT-GPU VID4GPIO1OUT-GPU VID3GPIO2OUT-VGA_BL_PWMGPIO3OUT-VGA_ENVDDGPIO4OUT-VGA_ENBKLGPIO5OUT-GPU VID1GPIO6OUT-GPU VID2GPIO7OUT-DPRSLPVR_VGAGPIO8I/O-Thermal Catastrophic Over TemperatureGPIO9OUT-GPIO9GPIO10OUT-Memory VREF Contr

30、olGPIO11OUT-GPU VID0GPIO12INAC Power Detect Input(10K pull High)GPIO13OUT-GPU VID5GPIO14OUT-FB_CLAMP_TOGGLE_REQ#GPIO15INN/A(100K pull low)GPIO16OUT-FRMLCK#GPIO17INN/AGPIO18IN-dGPU_HDMI_HPDGPIO19IN-HPD_IRQProductsGPU (4)Mem (1,5)NVCLK/MCLKNVVDDFBVDD (1.35V)FBVDDQ (GPU+Mem) (1.35V)PCI Express (1.05V)(

31、6)I/O and PLLVDD (1.8V)I/O and PLLVDD (1.05V)Other (3.3V)(W)(W)(MHz)(V)(A)(W)(A)(W)(A)(W)(mA)(W)(mA)(W)(mA)(W)(mA)(W)N13X128bit 1GB GDDR5TBDTBDTBDTBDTBDTBDTBDTBDTBDTBDTBDTBDTBDTBDTBDTBDTBDTBD54321DDUC1AHSW_ULT_DDR3LQFSYDDI1_MUX_TX0-C54C45CPU_EDP_TX0-DDI1_MUX_TX0- DDI1_MUX_TX0+ DDI1_MUX_TX1- DDI1_MUX

32、_TX1+ DDI1_MUX_TX2- DDI1_MUX_TX2+ DDI1_MUX_TX3- DDI1_MUX_TX3+DDI1_TXN0 DDI1_TXP0 DDI1_TXN1 DDI1_TXP1 DDI1_TXN2 DDI1_TXP2 DDI1_TXN3 DDI1_TXP3EDP_TXN0 EDP_TXP0 EDP_TXN1 EDP_TXP1CPU_EDP_TX0- CPU_EDP_TX0+ CPU_EDP_TX1- CPU_EDP_TX1+ DDI1_MUX_TX0+C55 B58B46CPU_EDP_TX0+DDI1_MUX_TX1-A47CPU_EDP_TX1-DDI1_MUX_T

33、X1+ DDI1_MUX_TX2-C58 B55B47CPU_EDP_TX1+ For 14 : DOCKINGFor 15 : HDMI & DOCKINGDDI1_MUX_TX2+ DDI1_MUX_TX3-A55 A57C47 C46EDP_TXN2 EDP_TXP2 EDP_TXN3 EDP_TXP3DDI1_MUX_TX3+B57A49 B49DDIEDPDDI2_VGA_TX0-C51 C50DDI2_VGA_TX0- DDI2_VGA_TX0+ DDI2_VGA_TX1- DDI2_VGA_TX1+DDI2_TXN0 DDI2_TXP0 DDI2_TXN1 DDI2_TXP1 D

34、DI2_TXN2 DDI2_TXP2 DDI2_TXN3 DDI2_TXP3DDI2_VGA_TX0+A45CPU_EDP_AUX#For 14 : HDMI For 15 : VGACPU_EDP_AUX# CPU_EDP_AUX EDP_AUXN EDP_AUXPEDP_RCOMP EDP_DISP_UTILDDI2_VGA_TX1-C53 B54B45CPU_EDP_AUXDDI2_VGA_TX1+C49 B50 A53 B53D20 A43RC1 12 24.9_0402_1%EDP_COMP+VCCIOA_OUTEDP_RCOMP1. Trace width=20 mils, Spa

35、cing=25mil, Max length=100mils2. RC25 close to MCPTrace Width=20mil, Spacing=25mil, Max length=100milCC1 OF 19 Broadwell-ULT_CL8064701614813_QFSY SA000064600PU/PD Res. For CPU-XDP SIGNAL, Place R Closer to CPU+1.05VS_VCCSTHSW_ULT_DDR3LUC1B+1.05VS_VCCSTD61 K61 N62PROC_DETECT CATERRPECIXDP_TDIRC164 1

36、XDP 2MISC J62 K6211RC2 62_0402_5%H_PECIXDP_PRDY# XDP_PREQ# H_PECIPRDY PREQ PROC_TCK PROC_TMS PROC_TRSTT1 T2XDP_TDORC3 1 XDP 2E60XDP_TCLKE61 XDP_TMS1XDP_TCLKRC412 51_0402_1%T31VR_HOT#RC5256_0402_5%VR_HOT#_RK63JTAGE59 XDP_TRST# F63 XDP_TDI VR_HOT#PROCHOT1XDP_TRST# RC6 1 2 51_0402_1%THERMALPROC_TDI PRO

37、C_TDOT4F62XDP_TDORC71210K_0402_5%H_CPUPWRGDC61PROCPWRGDPWRJ60 H60BPM#0 BPM#1 BPM#2 BPM#3 BPM#4 BPM#5 BPM#6 BPM#7BBH61 H62RC8 RC9122200_0402_1%SM_RCOMP0 SM_RCOMP1AU60 AV60K59 H63SM_RCOMP0 SM_RCOMP1 SM_RCOMP2 SM_DRAMRST SM_PG_CNTL111120_0402_1%DDR3LRC102100_0402_1%SM_RCOMP2 DDR3_DRAMRST#AU61K60AV15 AV

38、61J61DDR3_DRAMRST#DDR_PG_CTRL DDR_PG_CTRLDDR3 COMPENSATION SIGNALSBroadwell-ULT_CL8064701614813_Q2FOSFY 191. Trace width=1215 mil, Spcing=20 mils, Max trace length= 500 mil,2. All of R Close to MCPAATitleSecurity ClassificationLC Future Center Secret DataBDW_DDI/EDP/XDPIssued Date2013/09/07Deciphere

39、d Date2014/09/07THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIALSizeDocument NumberRev 1.0AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DCustomAITE1_NM-A221DEPARTMENT EXCEPT A

40、S AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.Date:Thursday, November 06, 2014Sheet5of81543212 1 XDP PU/PD portion need to check agian.51_0402_1%51_0402_1%54321Inter

41、leaved (Butterfly Topology)Broadwell Platform System Memory Interface Document Number: 528378BDW U DDR3L/DDR3L-RS SO-DIMM Interleaved RecommendationsDD DDR_A_D0.63 DDR_A_DQS#0.7 DDR_A_DQS0.7 DDR_A_MA0.15 DDR_B_D0.63 DDR_B_DQS#0.7 DDR_B_DQS0.7 DDR_B_MA0.15HSW_ULT_DDR3LUC1CUC1DHSW_ULT_DDR3LAH63 AH62AU

42、37SA_CLK_DDR#0DDR_A_D0 DDR_A_D1SA_DQ0 SA_DQ1 SA_DQ2 SA_DQ3 SA_DQ4 SA_DQ5 SA_DQ6 SA_DQ7 SA_DQ8 SA_DQ9 SA_DQ10 SA_DQ11 SA_DQ12 SA_DQ13 SA_DQ14 SA_DQ15 SA_DQ16 SA_DQ17 SA_DQ18 SA_DQ19 SA_DQ20 SA_DQ21 SA_DQ22 SA_DQ23 SA_DQ24 SA_DQ25 SA_DQ26 SA_DQ27 SA_DQ28 SA_DQ29 SA_DQ30 SA_DQ31 SA_DQ32 SA_DQ33 SA_DQ34

43、 SA_DQ35 SA_DQ36 SA_DQ37 SA_DQ38 SA_DQ39 SA_DQ40 SA_DQ41 SA_DQ42 SA_DQ43 SA_DQ44 SA_DQ45 SA_DQ46 SA_DQ47 SA_DQ48 SA_DQ49 SA_DQ50 SA_DQ51 SA_DQ52 SA_DQ53 SA_DQ54 SA_DQ55 SA_DQ56 SA_DQ57 SA_DQ58 SA_DQ59 SA_DQ60 SA_DQ61 SA_DQ62 SA_DQ63SA_CLK#0 SA_CLK0 SA_CLK#1 SA_CLK1SA_CLK_DDR#0AV37 AW36SA_CLK_DDR0 SA

44、_CLK_DDR#1DDR_A_D32AY31 AW31AM38 AN38SB_CLK_DDR#0 SB_CLK_DDR0SB_CLK_DDR#0 SB_CLK_DDR0 SB_CLK_DDR#1 SB_CLK_DDR1 SA_CLK_DDR0SB_DQ0 SB_DQ1 SB_DQ2 SB_DQ3 SB_DQ4 SB_DQ5 SB_DQ6 SB_DQ7 SB_DQ8 SB_DQ9 SB_DQ10 SB_DQ11 SB_DQ12 SB_DQ13 SB_DQ14 SB_DQ15 SB_DQ16 SB_DQ17 SB_DQ18 SB_DQ19 SB_DQ20 SB_DQ21 SB_DQ22 SB_D

45、Q23 SB_DQ24 SB_DQ25 SB_DQ26 SB_DQ27 SB_DQ28 SB_DQ29 SB_DQ30 SB_DQ31 SB_DQ32 SB_DQ33 SB_DQ34 SB_DQ35 SB_DQ36 SB_DQ37 SB_DQ38 SB_DQ39 SB_DQ40 SB_DQ41 SB_DQ42 SB_DQ43 SB_DQ44 SB_DQ45 SB_DQ46 SB_DQ47 SB_DQ48 SB_DQ49 SB_DQ50 SB_DQ51 SB_DQ52 SB_DQ53 SB_DQ54 SB_DQ55 SB_DQ56 SB_DQ57 SB_DQ58 SB_DQ59 SB_DQ60

46、SB_DQ61 SB_DQ62 SB_DQ63SB_CK#0 SB_CK0 SB_CK#1 SB_CK1AK63DDR_A_D2DDR_A_D33SA_CLK_DDR#1 SA_CLK_DDR1 DDR_A_D3AK62 AH61AY36SA_CLK_DDR1DDR_A_D34AY29 AW29AK38SB_CLK_DDR#1DDR_A_D4 DDR_A_D5DDR_A_D35 DDR_A_D36AL38SB_CLK_DDR1AH60 AK61AU43 AW43DDRA_CKE0_DIMMA DDRA_CKE1_DIMMAAV31 AU31SA_CKE0 SA_CKE1 SA_CKE2 SA_CKE3DDRA_CKE0_DIMMA DDRA_CKE1_DIMMADDR_A_D6DDR_A_D37AY49 AU50DDRB_CKE0_DIMMB DDRB_CKE1_DIMMBDDRB_CKE0_DIMMB DDRB_CKE1_DIMMB SB_CKE0 SB_CKE1 SB_CKE2 SB_CKE3SB_CS#0 SB_CS#1CDDR_A_D7 DDR_A_D8AK60 AM63AY42 AY43DDR_A_D38AV29CDDR_A_D39 D

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