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外外文资料文资料 Pseudorandom Noise Sequences Direct sequence(DS). Direct-sequence spread spectrum(DS-SS) is produced when a bipolar data-modulated signal is linearly multiplied by the spreading signal in a special balanced modulator called a spreading correlator .The spreading code rate Rcw=1/Tc, where Tc is the duration of a single bipolar pulse(i,e., the chip). Chip rates are 100 to 1000 times faster than the data message,therefore,chip times are 100 to 1000 times shorter in duration than the time of a single data bit. As a result, the transmitted output frequency spectrum using spread spectrum is 100 to 1000 times wider than the bandwidth of the initial PSK data-modulated signal. The spreading codes used in spread-spectrum systems are either maximal-length sequence codes, sometimes called m-sequence codes, or Gold codes. Gold codes are combinations of maximal-length codes invented by Magnavox Corporation in 1967 especially for multiple-access CDMA applications .There is a relatively large set of Glod codes available with minimal correlation between chip codes.For a reasonable number of satellite users,it is impossible to achieve perfectly orthogonal codes.You can only design for a minimum cross correlation among chips. One of the advantages of CDMA was that the entire bandwidth of a satellite channel or system may be used for each transmission from every earth station. For our example, the chip rate was six times the original bit rate. Consequently, the actual transmission rate of information was one-sixth of the PSK modulation rate,and the bandwidth required is six times that required to simply transmit the original data as binary. Because of the coding inefficiency resulting from transmitting chips for bits, the advantage of more bandwidth is partially offset and is, thus, less of an advantage. Also, if the transmission of chips from various earth station must be synchronized, precise timing is required for the system to work. Therefore, the disadvantage of requiring time synchronization in TDMA systems is also present with CDMA. In short, CDMA is not all that it is cracked up to be.The most significant advantage of CDMA is immunity to interference, which makes CDMA ideally suited for military applications Pseudorandom Noise Sequences In CDMA systems, PN sequences are used to Spread the bandwidth of the modulated signal to the larger transmission bandwidth Distinguish between the different user signals by utilizing the same transmission bandwidth in the multiple access scheme. PN squences are not random; they are deterministic, periodic sequences. The following are the three key properties of an ideal PN sequence: 1. The relative frequencies of 0 and 1 are each 1/2. 2. The run length(of 0s or 1s)are: 1/2 of all run lengths are of length 1; 1/4 are of length 2;1/8 are of length 3; and so on. 3. If a PN sequence is shifted by any nonzero number of elements, the resulting sequence will have an equal number of agreements and disagreements with respect to the original sequence. PN sequence are generated by combining the outputs of feedback shift registers. A feedback shift register consists of consecutive two-stage memory or storage stages and feedback lobic. Binary sequences are shifted register in response to clock pulses. The contents of the stages are olgically combined to produce the input to the first stage. The initial contents of the stages and feedback olgic determine the successive contents of the stages. A feedback shift register and its output are called linear when the feedback logic consists entirely of modulo-2 adders. To demonstrate the properties of a PN a binary sequence, we consider a linear feedback shift register(see Fig. 1) that has a four-stage register for storage and shifting, a modulo-2 adder, and a feedback path from adder to the input of the register.The operation of the shift register is controlled by a sequence of clock pulses. At each clock pulse the contents of each stage in the register is shifted by one stage to the right. Also, at each clock pulse the contents of stages x3 and x4 are modulo-2 added, and the result is fed back to stage x1. The shift register sequence is defined to be the output of stage x4. W assume that stage x1 is initially filled with a 0 and the other remaining stages are filled with 0, 0, and 1; i.e., the initial state of the register is 0 0 0 1. Next, we perform the shifting, adding , and feeding operations, where we obtain the results after each cycle that is shown in Table 1. We notice that the contents of the registers repeat after 24-1=15 cycles. The output sequence is given as 0 0 0 1 0 0 1 1 0 1 0 1 1 1 1 ,where the left-most bit is the earliest bie. In the output sequence, the total number of 0s is 7 and total number of 1s is 8; the numbers differ by 1. If a linear feedback shift register reached the 0 state an some time, it would always remain in the 0 state and the output sequence would subsequently be all 0s. Since there are exactly 2n-1 nonzero states, the period of a linear n-stage shift register output sequence can not exceed 2n-1. The output sequences are classified as either maximal length or nonmaximal length. Maximal-length sequences are the longest sequences that can be generated by a given shift register of a given length. In the binary shift register sequence generators, the maximal length sequence is 2n-1 chips, where n is the number of stages in the shift registers. Maximal-length sequences have this property for an n-stage linear feedback shift register: the sequence repetition period in clock pulses is T0=2n-1. If a linear feedback shift register generates a maximal sequence, then all of its nonzero output sequences are maximal, regardless of the initial stage. A maximal sequence contains(2n-1-1) 0s and (2n-1) 1s per period. Modulo-2 Adder Output Clock Figure1 Four-Stage Linear Feedback Shift Register Shift Stage X1 Stage X2 Stage X3 Stage X4 Output sequence 0 0 0 0 1 1 1 1 0 0 0 0 2 0 1 0 0 0 3 0 0 1 0 0 4 1 0 0 1 1 5 1 1 0 0 0 6 0 1 1 0 0 7 1 0 1 1 1 8 0 1 0 1 1 X1 X2 X3 X4 9 1 0 1 0 0 10 1 1 0 1 1 11 1 1 1 0 0 12 1 1 1 1 1 13 0 1 1 1 1 14 0 0 1 1 1 15 0 0 0 1 1 16 1 0 0 0 0 Table 1 Results of Shifting after Each Cycle 二、译文二、译文 伪随机序列伪随机序列 直接序列(DS)。 当双极性的数据调制信号被一个特别的平衡扩频相关器线 性调制的时候,生成直接扩频序列 (DS-SS) 。扩频码元的传送速率 Rcw=1/Tc, 这里的 Tc 是单个双极性脉冲的周期(即码片)。 而扩频码速要比原始数字信息的 速率高 100 到 1000 倍, 因此原始的数字信息的单一比特的时间要比扩频码的的 周期长 100 到 1000 倍。 结果, 使用扩频码调制而输出的信号频谱比开始的 PSK 数据调制的基带信号带宽宽 100 到 1000 倍。 被用于扩频通信系统中的最大长度序列码的, 通常叫做 m 序列码或 Gold 码。 Gold 码是在 1967 年由 Magnavox 公司发明的最大长度密码的组,它尤其是为 了 CDMA 多址技术的应用而生的, Glod 码之间有较小的相关性的而却可得到 较长的码长。因为移动用户的实际数量,想得到完全正交的码序列是不可能的。 我们只能尽量设计出相对较小相关性的码序列。 CDMA 通信系统的优点之一是人造卫星站的频道或系统的整个带宽可能被 用作传输每一个来自地球站点的数据信息。 例如, 码速是原始比特率的六倍, 结 果数据的真实传输率只是 PSK 调制速率的六分之一, 而且所需要的带宽是仅仅 是传输最初的二进制数据带宽的六倍。 因为从码片到比特的转换导致编码效率的 降低,丧失了部分更大带宽所带来的好处,因此优势被减弱了, 因此这同时也 是一个缺点。 同时,如果来自地球不同站点的所传输的码元一定要同步,就需 要精确的时间同步性来保证系统的工作运行。因此,在 TDMA 系统所要求的时 间同步性的缺点也同样表现在 CDMA 系统中。简而言之,CDMA 并不是没有任 何的缺点,它最重要的优势就在于它抗干扰性比较强,正因为这个特点,使得 CDMA 系统很适合军事应用。 PN 序列 在 CDMA 系统中,PN 序列通常用于: 将被调制信号的带宽扩展到一个较大的传输带宽。 在多址方案中利用相同的传输带宽区别不同的使用者信号。 PN 序列不是任意的,它们是确定的周期序列。下面是理想的 PN 序列的三 个主要特性: (1)0 和 1 出现的概率相对各为 1/2。 (2) 游程长度 ( 连 0 或连 1) 是:游程长度为 1 的占总游程数的 1/2;游 程长度为 2 的占总游程数的 1/4; 游程长度为 3 的占总游程数的 1/8; 如此类 推,游程长为 n 的占总游程数的 1/2 n。 (3) 如果 PN 序列是被任何非零数字来循环,产生的序列将会有有关于最初 的序列一个相符或不符的相等数字。 PN 序列是由一个级联的移位反馈寄存器的输出端来生成的。一个移位反馈 寄存器是由连续的记忆级和一个反馈逻辑组成。 二进制的序列在时钟脉冲的作用 下通过移寄存器来转移。 每一级的状态通过一定的逻辑组合和运算从而给第一 级产生一个输入。 各级的初始状态和反馈逻辑电路决定了各级连续变化的状态的 规律。当一个反馈移位寄存器的反馈逻辑完全由模二加法器组成的时候,我们称 它和它的输出是线性的。 为了要说明 PN 二进位的序列特性, 我们考虑一个线性的移位寄存器( 见图 1) ,它具有用来移位和存储的四级寄存器,还有一个模 2 加法器以及和一个从 寄存器的输入端到加法器的反馈抽头。 移位寄存器的工作是通过一个时钟脉冲序 列来控制的。 每作用一次脉冲, 移位寄存器的每一级的状态将由此向右边移一位, 即变成了下一级的状态。同时,在每个时钟跳动下第三级的状态通过模二加法器 与第四级的状态相加后再将其状态反馈到第一级。 第四级寄存器输出比特作为移 位寄存器的输出序列。现在,我们假设把第一级寄存器的状态置位为 0 电平,而 其他的则保持在 0,0,1,这样寄存器的开始状态是 0 0 0 1。 然后,我们通过脉冲 的作用进行移位,相加以及反馈让移位寄存器工作
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