RIID硬件原理及其实现.ppt

RFID硬件原理简介 以AS3990阅读器芯片为例,涉及的一些基础概念 RFID硬件结构及各部分作用 AS3990阅读器芯片介绍,基带：指信号的频谱从零频率附近开始。 频带：指信号的频谱具有带通形式且中心频率远离零频。携带有消息；适合在信道中传输。,ASK调制和PSK调制,PSK,ASK信号波形(OOK),RFID使用的ASK信号的调制度是80100%。,ASK解调,非相干解调（包络检波法）,相干解调,PLL(锁相环),混频（器件的非线性）,(光的颜色),RFID中发射机混频结构,低中频 超外差 零中频 中频选为0（本振与载波同频）时的超外差结构。,GEN2协议,EPC physical layer Interrogator!tag: Carrier: 860-960Mhz (depending on local regulations) EU:865.5-867.6Mhz, US: 902-928Mhz , divided into channels (200kHz, 500kHz) yes, FDMA is possible! Modulation: ASK (DSB-ASK,SSB-ASK, PR-ASK tag undestands all) Encoding: PIE Bandwidth: 26.7-128kbit/s Tag!interrogator: Modulation: ASK or PSK ( reader understands all) Encoding: reader decides FM0 baseband (40-640kbit/s) Miller of a subcarrier (5-320kbit/s) Data rate depends on Divide Ratio and TRcal, selected by reader QUERY command,RFID系统工作原理,1.读写器开始工作之后，先内向空间发送860960 MHz频率范围的载波，激活标签。 2.标签从射频信号获得能量后，响应读写器发送的指令。 3.读写器开始发送带调制的命令信息，标签从载有信息的调制信号获取能量的同时得到指令，标签依照指令做出响应。,相互认证通过之后，阅读器会向电子标签发出读、写、锁定、kill、盘存等操作指令。,阅读器发射未调载波信号作用,为标签供电； 为标签反向散射信号提供载； 为零中频接收机提供本振。,电磁反向散射,阅读器发出的射频信号传播标签的天线上，标签需要向将阅读器发送信息时，就通过调整天线的复阻抗，改变天线对电磁波的反射系数，从而对反射波进行相位或振幅的调制。,一种反射调制的电路实现,RFID系统工作波形,RFID读写器硬件组成,AS3990/AS3991芯片简介,各部分硬件结构 各部分功能、工作原理 只涉及少芯片引脚 各部分相关寄存器设置单独由word文档列出,Comprise of,analog and digital functionality with complete EPC Gen2 or ISO18000-6C digital protocol support. on-board PLL section with integrated VCO supply section DAC and ADC section Host interface section Configuration registers( configures operation of all blocks),Power up and operations,Needs to be correctly supplied via. VEXT and VEXT2 pins and enabled via. EN pin At power-up. The configuration registers are preset to a default operation mode. Access and change registers(P23) to choose other options. Communication,Communication,The communication between the reader and the transponder follows the reader talk first method. After power-up and configuring IC, the host system starts communication by turning on the RF field by setting option bit rf_on。,Transmitting and receiving modes,Normal Data Mode: the TX and RX data is transferred through the FIFO register and all protocol data processing is done internally. Direct Data Mode: the data processing is done by the host system.,接口总线(interface bus),parallel 10-pin bus can be configured and used as a serial peripheral interface(SPI) exclusive , can not switch between them in a single application. The parallel mode is selected if all IO pins are low during low to high transition of the EN pin (enable).,The reader will always behave as the “slave” connected to the host system (MCU), which behaves as the “master” device. The host system initiates all communications. The reader has an IRQ pin to ask for host system attention.,Communication is initialized by a Start condition, which should be followed by an Address or Command word. The Address and Command words are 8-bits long. Communication is closed by an appropriate stop condition.,命令/地址格式,Continuous address mode noncontinuous address mode command mode. Continuous address mode needs to be closed by StopCont condition while the other two modes need to be terminated by StopSgl condition.,communication modes,Continuous address mode,Cont mode=1, the first data that follows the address is written (or read) to (from) the given address. For each additional data, the address is incremented by one. can be used to write part of the control registers in a single stream without changing the address.,组合模式,Registers 12, 14, 15, 16, and 17 are three bytes deep. They can be accessed by Continuous address mode only. The least significant byte is accessed first. It is possible to access only deep register in a single communication stream。,The 24 bytes deep FIFO register can be accessed by Continuous address mode only.) It is allowed to use communication stream combined of command mode and address mode. Example: Reset FIFO, Transmit, write to 1D, 1E for transmission length, and continuously to 1F for filling FIFO with transmission data.,Start = start condition Adr = address with Cont bit low Adrc = address with the Cont bit high Cmd = command byte Data = data byte StopSgl = stop condition for termination of the command or non-continuous address mode StopCont = stop condition for termination of the continuous address mode,命令后可以是地址，可以是命令，但不可以是数据。 地址后只能是数据。 地址和命令是定义的，数据是随机的。这样可以保证不会混淆,并行接口（以StopSgl结尾）,VDD_I0,此引脚很重要，定义了芯片与MCU的通信电平(1.8-5.5v)。如果使用芯片内部高压器供电(VDD_D)，则应将VDD_IO与VDD_D相连。如果MCU单独供电，则应调节相关设置寄存器。,SUPPLY,A set of 3.4V regulators is used for supplying the reference block, AD and DA converters, low frequency receiver cells, the RF part, and digital part. It is possible to use the digital part supply VDD_D for supplying the external MCU with a current consumption up to 20mA.,An additional 4.8V regulator is used for the input RF mixers supply. The input of this regulator is VEXT, output is VDD_MIX pin. The VEXT voltage needs to be between 5.3V and 5.5V.,Power Down Mode: EN pin low (EN=L). the OAD2 pin not be connected. Normal Mode: EN=H. The chip is ready to move to transmit or receive operation. Standby Mode: stby=H. In the standby mode the regulators, reference voltage system, and crystal oscillator are operating in low power mode; but the PLL,transmitter output stages and receiver are switched off.,PLL,composed of a voltage control oscillator (VCO), prescaler, main and reference divider, phasefrequency detector, charge pump, and loop filter. All building blocks excluding the loop filter are completely integrated.,external RF source can be used. It is also possible to use external VCO and internal PLL circuitry.(使用于对相位噪声要求较高的场合),每次启动RF模块之前，主机都要先对PLL模块各项参数进行设置（主要是预定标）。 跳频(Frequency hopping)：主机以命令形式控制。（相关命令参考手册）。,protocol processing digital part shaping Modulator amplifier circuitry.,发射机(TRANSMITTER),三种工作模式,Normal Mode(正常模式) Direct Mode Using Parrallele Interface Direct Mode using Serial interface(SPI),Normal Mode,In normal mode, all signal processing (protocol coding, adding preamble or frame-sync and CRC, signal shaping, and modulation) is done internally. Frame-sync: 帧同步。,The transmission is started by sending the transmit command followed by information on the number of bytes that should be transmitted and the data. The number of bytes needs to be written in the TX length registers and the data to the FIFO register. The transmission actually starts when the first data byte is written into the FIFO.,The second possibility is to start transmission with one of the direct Gen2 commands (Query, QueryRep, QueryAdjust,ACK, NAK, ReqRN). In this case, the transmission is started after receiving the command.,The reader chip starts transmission and sends an interrupt request when only 3 bytes are left in the FIFO. When interrupt is received, the host system needs to read th