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1924_基于单片机的交通灯控制带CAD图

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黄河科技学院毕业设计(文献综述) 第 4 页 文献综述随着信息技术革命的不断深入,以及计算机技术的快速发展,单片机的应用越来越广泛了,并且已经逐渐地发展成为了一门比较关键的技术学科。本人设计的论题是基于单片机的交通灯设计。本文所介绍的是一种比较简易的单片机交通灯的设计以及其相关的实现方案,利用的是单片机。随着电子技术的发展,单片机在现代科学技术的发展中起着越来越重要的作用,多媒体技术、网络技术、智能信息处理技术、自适用控制技术、数据挖掘与处理技术等都离不开计算机。本课程设计是基于单片机的简单应用。运用所学的单片机知识完成交通灯系统。通过单片机设计,用我们刚刚学过的有关单片机的知识模拟分析了现代城市交通控制与管理问题的现状,结合交通的实际情况阐述了交通灯控制系统的工作原理,给出了一种简单实用的交通灯控制系统的设计方案。该系统适用于单主干道的十字路口,。现假定其主干道为东西方向,次干道为南北方向。可随意进行更改双向的通行时间,该功能红绿灯切换时有闪烁功能以警示车辆和行人将进行红绿灯切换。当有交通堵塞或紧急状况时可进行中断手动控制,使交通安全与交通流畅度得以保证。在国内单片机学习呈上升趋势,但是很多人学习时没有头绪,不知道从何下手。面对种类繁多的各类开发板,仿真器,让初学者无所事从,不但多花钱还多走不少弯路,学生学习单片机没有大的资金投入,能够做到少花钱多办事才是最好的。 Intel8051系列是我们在大学课堂中学习的。因此本课题围绕8051系列单片机设计,从电路图绘制,PCB板设计,硬件焊接,程序设计,在线仿真到各项功能实现,目的在于让学生将课堂上学来的理论知识与实践相结合,提高对单片机的认识,学习专业软件的操作,熟悉制作过程,掌握一门技能,加强专业知识的掌握。也增加学生的实践经历,为学生就业提供一个可选方向,拓展就业渠道。肖华在构建芯片与整机大产业链中回顾了集成电路产业的发展历程,分析了各种内外因素,指出我国的集成电路产业将在“十二五”期间得到迅猛发展。我国自己的芯片自主创新能力有较大提高,产业结构逐步优化,资源整合步伐加快,封装测试仍然是产业的主体。分析当前的形势,全球竞争更加激烈,竞争中有挑战也有机遇,“Google-ARM模式”的出现使原有的“WINTEL体系”受到了挑战,基于ARM公司CPU核的嵌入式处理器已占据市场总销售量的75%以上,只要我们正视并解决自身所存在的问题,在积极政策的环境下就会有新的突破。蒋力培在单片机微机系统实用教程中以掌握国内最为流行的MCS-51系列单片机系统工业应用技术为教学目标,以实例分析与动手训练为主线,系统地阐述了单片微机应用系统的结构、原理及应用技术。本教程改变了传统教材文献资料式的编写形式,以培养学生的实际动手应用能力为教学突破口,在应用中不断发现问题、解决问题。在简要讲述单片机基本知识的基础上,通过一系列实例分析与动手实践及进一步扩展应用知识,使教学内容理论结合实际,深入浅出,通俗易懂,便于理解,培养学生具有一定的动手解决工程实践问题的能力。全书主要内容有单片微机内部结构与资源,单片微机工作原理,存储器的结构与地址分配,汇编语言程序设计,单片微机接口技术及应用实例等。MS-C51系列单片机的各种资料中对单片机的基础知识进行了导入式介绍,包括单片机的发展历史、基本结构及特性,还介绍了目前单片机的各个应用方面,接下来简要介绍了单片机的系统结构和开发方法,并以8051单片机为例讲解了单片机的引脚及相关功能,最后对常见到C51系列单片机分厂家进行了介绍,这是C51系列单片机选择的指南。文章还介绍了单片机的其他内容,包括应用前景及安全等。作者以实战经验绞尽脑汁,通过多种人性化角度的思维模式,试图划清这新兴嵌入式系统技术的轮廓,引导读者洞悉其模糊地带,彻底分析整合通信、信息与娱乐于一身的嵌入式系统技术。书中第二章嵌入式SoC硬件系统概论,对嵌入式CPU的各大家族的发展进行了详尽的描绘,对了解各种芯片的基本知识很有帮助。胡文金在单片机应用技术实训教程中指出单片机技术重在应用。单片机从实训概述、开发环境、指令系统实验、程序设计实验、CPU集成功能部件实验、接口实验、基本型训练项目、强化实训项目、应用系统开发技术和应用系统开发实例。本书虽以高职高专实训教程的名义编写,但就实质而言,单片机的应用大多和学历层次无关,而是取决于要从事的这项工作本身的需要或已经具有多少这方面的知识和技能,所以,本书可作为电气类、计算机类和机电类专业的实践教学用书,也可用做广大工程技术人员的参考书。教材单片机微型机原理、应用与实验中以AT89C52为例阐明了单片机的一般原理和应用技术,详细介绍了单片机的基本部件、基本概念和系统结构,对51指令系统和汇编语言程序设计方法进行了简要介绍,然后介绍了系统扩展、设备接口技术等硬件知识,最后以典型实例介绍了C51的程序设计方法。古龙电子公司在如何选择嵌入式微处理器中介绍了在选择嵌入式芯片时所考虑的几个因素:性能、功耗、价格、供货保证、开发工具的配备以及工程师过去对这种处理器的经验和软件的支持等,来决定用户使用哪一种处理器。接着对市场上常见的嵌入式微处理器及其主要应用进行了简要介绍,然后分别对要求高性能、低功耗和集成化三方面的芯片进行了介绍。该文是选择芯片的一个指导。英国ARM公司的调试嵌入式处理器的几种常用方法中简要回顾了几种调试处理器系统的常见方法,并介绍了ARM公司新开发的调试方法,即通过使用电路内仿真器(In Circuit Emulators)、监控程序(Monitor Programs) 和逻辑分析仪(Logic Analysers)解决存在的问题,这种方法到现在已经得到了广泛应用。Design and Implementation of Embedded SNMP Network Management Manager in Web-based Mode一文中介绍了将网络SNMP管理器嵌入到嵌入式设备中,实现嵌入式设备的网络管理。该文将嵌入式网络管理的结构基于SNMP代理和web模式在Linux系统中呈现了出来,最后阐明了SNMP在嵌入式网络管理下的实现策略。在目前的国内外市场中,主要单片机学习教学电路中,仿真器与开发板是分开的,且仿真器造价高,使用中仿真头易损坏。开发板种类多,不系统,应用中两者接合投资太高,学校投入太大。因仿真器与学习板是分开的,学生学习东西也少,板子做完后,学生只能留有学习板,想在课余再学习,终究因没有仿真器而受限止,实用性小,不能达到预期目的。现在可以说单片机是百花齐放,百家争鸣的时期,世界上各大芯片制造公司都推出了自己的单片机,从8位、16位到32位,数不胜数,应有尽有,有与主流C51系列兼容的,也有不兼容的,但它们各具特色,互成互补,为单片机的应用提供广阔的天地。微型单片化:现在常规的单片机普遍都是将中央处理器(CPU)、随机存取数据存储(RAM)、只读程序存储器(ROM)、并行和串行通信接口,中断系统、定时电路、时钟电路集成在一块单一的芯片上,增强型的单片机集成了如A/D转换器、PMW(脉宽调制电路)、WDT(看门狗)、有些单片机将LCD(液晶)驱动电路都集成在单一的芯片上,这样单片机包含的单元电路就更多,功能就越强大。甚至单片机厂商还可以根据用户的要求量身定做,制造出具有自己特色的单片机芯片。此外,现在的产品普遍要求体积小、重量轻,这就要求单片机除了功能强和功耗低外,还要求其体积要小。现在的许多单片机都具有多种封装形式,其中SMD(表面封装)越来越受欢迎,使得由单片机构成的系统正朝微型化方向发展。单位代码 02 学号 080105627 分 类 号 TH 密 级 秘密 毕业设计文献综述 院(系)名称工学院机械系 专业名称机械设计制造及其自动化 学生姓名张建松 指导教师牛月兰2012年03月 07日Intelligent traffic lightWith economic development, increased the number of vehicles, road congestion is becoming increasingly serious, intelligent traffic lights on the emerged. At present, the worlds Intelligent Transportation System will be: a huge structure, management difficulties, such as the maintenance of large inputs. In order to improve the existing traffic conditions, and to overcome the existing shortcomings of intelligent transportation system I designed analog control traffic lights in urban and rural areas of small-scale smart traffic lights. It has small size, intelligence, maintenance into small, easy to install and so on. And other intelligent transportation system compared to the system to adapt to economic and social development, in line with the current status of scientific and technological development.Intelligent traffic lights are a comprehensive use of computer network communication technology, sensor technology to manage the automatic control system of traffic lights. Urban traffic control system is used for urban traffic data monitoring, traffic signal control and traffic management computer system; it is the modern urban traffic control system command and the most important component. In short, how to use the appropriate control method to maximize the use of costly cities to build high-speed roads, trunk road and the ramp to alleviate urban areas with the neighboring state of traffic congestion has become more and more traffic management and urban planning departments need to address the main problem. To this end, this article on the urban traffic light control system analog circuit theory, design calculation and experimental testing and other issues to discuss specific analysis.The General Situation of AT89C51Microcontrollers are used in a multitude of commercial applications such as modems, motor-control systems, air conditioner control systems, automotive engine and among others. The high processing speed and enhanced peripheral set of these microcontrollers make them suitable for such high-speed. However, these critical application domains also require that these microcontrollers are highly reliable. The high reliability and low market risks can be ensured by a robust testing process and a proper tools environment for the validation of these microcontrollers both at the component and at the system level. Intel Platform Engineering department developed an object-oriented multi-threaded test environment for the validation of its AT89C51 automotive microcontrollers. The goals of this environment was not only to provide a robust testing environment for the AT89C51 automotive microcontrollers, but to develop an environment which can be easily extended and reused for the validation of several other future microcontrollers. The environment was developed in conjunction with Microsoft Foundation Classes (AT89C51). The paper describes the design and mechanism of this test environment, its interactions with various hardware/software environmental components, and how to use AT89C51.1.1 IntroductionThe 8-bit AT89C51 CHMOS microcontrollers are designed to handle high-speed calculations and fast input/output operations. MCS 51 microcontrollers are typically used for high-speed event control systems. Commercial applications include modems, motor-control systems, printers, photocopiers, air conditioner control systems, disk drives, and medical instruments. The automotive industry use MCS 51 microcontrollers in engine-control systems, airbags, suspension systems, and antilock braking systems (ABS). The AT89C51 is especially well suited to applications that benefit from its processing speed and enhanced on-chip peripheral functions set, such as automotive power-train control, vehicle dynamic suspension, antilock braking, and stability control applications. Because of these critical applications, the market requires a reliable cost-effective controller with a low interrupt latency needed in real time applications, and a CPU with above average processing power in a single package. The financial and legal risk of having devices that operate unpredictably is very high. Once in the market, particularly in mission critical applications such as an autopilot or anti-lock braking system, mistakes are financially prohibitive. Redesign costs can run as high as a $500K, much more if the fix means 2 back annotating it across a product family that share the same core and/or peripheral design flaw. In addition, field replacements of components are extremely expensive, as the devices are typically sealed in modules with a total value several times that of the component. To mitigate these problems, it is essential that comprehensive testing of the controllers be carried out at both the component level and system level under worst case environmental and voltage conditions. This complete and thorough validation necessitates not only a well-defined process but also a proper environment and tools to facilitate and execute the mission successfully. Intel Chandler Platform Engineering group provides post silicon system validation (SV) of various micro-controllers and processors. The system validation process can be broken into three major parts. The type of the device and its application requirements determine which types of testing are performed on the device.1.2 The AT89C51 provides the following standard features:4Kbytes of flash, 128 bytes of RAM, 32 I/O lines, two 16-bittimer/counters, a five vector two-level interrupt architecture, a full duplex serial port, on-chip oscillator and clock circuitry. In addition, the AT89C51 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port and interrupt sys -tem to continue functioning. The Power-down Mode saves the RAM contents but freezes the oscillator disabling all other chip functions until the next hardware reset.1.3Pin DescriptionGND Ground.Port 0:Port 0 is an 8-bit open-drain bi-directional I/O port. As an output port, each pin can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as high impedance inputs .Port 0 may also be configured to be the multiplexed low order address/data bus during accesses to external program and data memory. In this mode P0 has internal pull-ups. Port 0 also receives the code bytes during Flash programming, and outputs the code bytes during program verification. External pull-ups are required during program verification.Port 1:Port 1 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 1 output buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins they are pulled high by the internal pull-ups and can be used as inputs. As inputs, Port 1 pins that are externally being pulled low will source current (IIL) because of the internal pull-ups. Port 1 also receives the low-order address bytes during Flash programming and verification.Port 2:Port 2 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 2 output buffers can sink/source four TTL inputs. When 1s are written to Port 2 pins they are pulled high by the internal pull-ups and can be used as inputs. As inputs, Port 2 pins that are externally being pulled low will source current (IIL) because of the internal pull-ups. Port 2 emits the high-order address byte during fetches from external program memory and during accesses to Port 2 pins that are externally being pulled low will source current (IIL) because of the internal pull-ups. Port 2 emits the high-order address byte during fetches from external program memory and during accesses to external data memory that uses 16-bit addresses . In this application, it uses strong internal pull-ups when emitting 1s. During accesses to external data memory that uses 8-bit addresses, Port 2 emits the contents of the P2 Special Function Register. Port 2 also receives the high-order address bits and some control signals during Flash programming and verification. Output buffers can sink/source four TTL inputs. When 1s are written to Port 3 pins they are pulled high by the internal pull-ups and can be used as inputs. As inputs, Port 3 pins that are externally being pulled low will source current (IIL) because of the pull-ups. Port 3 also serves the functions of various special feature soft the AT89C51 as listed below:RST:Reset input. A high on this pin for two machine cycles while the oscillator is running resets the device.ALE/PROG:Address Latch Enable output pulse for latching the low byte of the address during accesses to external memory. This pin is also the program pulse input (PROG) during Flash programming. In normal operation ALE is emitted at a constant rate of 1/6 the oscillator frequency, and may be used for external timing or clocking purposes. Note, however, that one ALE pulse is skipped during each access to external Data Memory. If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is weakly pulled high. Setting the ALE-disable bit has no effect if the microcontroller is in external execution mode.PSEN:Program Store Enable is the read strobe to external program memory. When the AT89C51 is executing code from external program memory, PSEN is activated twice each machine cycle, except that two PSEN activations are skipped during each access to external data memory.EA/VPP:External Access Enable. EA must be strapped to GND in order to enable the device to fetch code from external program memory locations starting at 0000H up to FFFFH. Note, however, that if lock bit 1 is programmed, EA will be internally latched on reset. EA should be strapped to VCC for internal program executions. This pin all receives the 12-volt programming enable voltage (VPP) during Flash programming, for parts that require 12-volt VPP. Chip erase The power to erase the entire Flash array, through the appropriate combination of control signals and by holding ALE / 10 ms compiled low. 1 written in code array chip erase operation must be performed before the code memory can be reprogrammed. Byte of each code in the flash memory array can be written, and the entire array can be erased through the appropriate combination of control signals. Write cycle is self-timed, and once started, will be automatically done. Information between the computer interface into a computer electronic system to process the information outside the two forms. There is a physical signal, it represents the value of the plan. Any interface functions can be divided into the number of operations that modify data in some way, the conversion process between the internal and external form of a number of steps. Analog digital converter for continuously variable signals into digital form, may be taken by a fixed binary value. If the discontinuous change in the output of the sensor, there is no ADC is necessary. In this case, the signal conditioning section must input signals into a direct connection to the part of the form next to the interface, input / output section of the output interface of the computer itself, takes a similar form, the obvious difference is that the information the flow in the opposite direction, it is through to the outside world, in this case, the program may call an output routine supervision and operator interface, and implementation ratio can be used for digital - analog converter digital . This subroutine in turn pass the information generated, it can be converted into a corresponding electrical signal output device using the DAC analog form. In the form of operating conditions of the last signal for the implementing agency.
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