外文翻译--基于物理实验Simatic ® PLC运行的实时显示测量 英文版.pdf
基于物理实验Simatic ® PLC运行的实时显示测量
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机械毕业设计英文翻译
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基于物理实验Simatic ® PLC运行的实时显示测量,机械毕业设计英文翻译
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毕业设计(论文)外文资料翻译学院 (系) : 机 械 工 程 学 院 专 业: 武器系统与工程 姓 名: 学 号: 外文出处: IEEE TRANSACTIONS ON NUCLEAR SCIENCE 附 件: 1.外文资料翻译译文;2.外文原文。 指导教师评语:翻译内容符合毕业设计内容的要求,翻译工作量较大,翻译基本正确、符合科技外语的翻译习惯和用法,较好的完成了翻译工作。签名: 年 月 日(用外文写)注:请将该封面与附件装订成册。附件 1:外文资料翻译译文基于物理实验 Simatic PLC 运行的实时显示测量摘要:当今,在 Forschungszentrum Jlich,大部分适合于物理实验的低速控制系统是由 PLC技术和场线系统完成的。在多数情况下,需要通过 PLCs 得到确定性的答案。这就提出期望从PLC 得到精确的、关于实时性能的问题。Simatic PLCs 是主导全球市场的西门子公司制造的。我们将介绍它的响应时间的测量,还将讨论程序结构和硬件配置对 PLC 运行情况和确定性行为的影响。I. 实验控制系统中的 PLC当今,工业自动化技术在物理实验各分系统内得到了很好的应用,例如水或气的供给系统。这导致了 PLC 的大量应用,尤其是智能自动控制部位已成了工业系统的核心。这其中主要的原因有:1、 大量市场导致的价格低廉;2、 坚固耐用;3、 来自制造商的长期有效的技术支持;4、 专业化(编译器,顺应标准化) ;除了单纯的基础设施系统范围,PLC 渐渐成为实验控制系统的重要组成部分,代替以 VME 或 PC 为基础的实时系统。这取决于现代 PLC 系列产品的以下特性:1、 高度可测量性:现代 PLC 系列产品有大量的 CPU 类型,不仅性能而且功能和结构都可升级。为满足户外使用或容错要求,还可提供特殊版本。 2、 可扩展性: PLC 的标准化设计使其能通过一系列数字或模拟输入/输出模块扩展。并且,集成工艺块可用在不同领域,如:步进电动机控制器,饲服电动机控制器和 PID 控制器。3、 较强的通信能力:现代 PLC 至少有一个集成的通信端口,并且针对不同现场和进程总线系统,通过多种通信控制器实现扩展,以实现和其它工业设备的连接。一个重要的应用就是,通过专用场线(如 PROFIBUS DP)把中央 PLC 系统扩展到分散外设间,实现了与非智能的 I/O 模块间的透明连接。这样一个 PLC 不仅能进行现场控制,还可以用于远程监控。4、 有利的发展环境:现代 PLC 系列产品有一个和谐交互的发展环境,支持主要的IEC1311 编程语言。典型的,指令表、功能块图和梯形图的表示能动态的转换。发展工具允许半图解式的硬件结构,提供强劲的编译机制,而且,在运行期间允许区段的交换逐渐增加发展。 今天,在 FZ Juelich ,全新先进的实验控制系统在很大程度上依赖 PLC。如图 1 中,中子谱仪(分光计)控制系统体系机构所阐明。由于国际市场权威西门子控制着欧洲市场,Simatic S7 PLCs 几乎独家占领了 FZ Juelich 市场,最流行的是中范围系列 S7-300,高端系列 S7-400 的目标是应用在有极端表现需求和支持多处理器配置的场合。微型 PLC 系列 S7200 很少用,他被称作 S7 系列纯粹是市场的原因,并且,他的执行环境与其他 S7 系列产品不兼容。IM151/CPU 可代替 S7-200 作为微型 PLC 使用。IM151/CPU 是一适用于分散外围设备 ET200S 系列的智能控制器。同样,分散外围设备系统ET200L 和 ET200M 在 Jlich 的使用也很普遍。迄今为止,仅 SoftPLC WinAC 这一软件在实验室得到测试。以 PLC 为基础的控制系统的可靠设计需要他们实时特征方面的知识。1、 取决于 PLC 的类型,PLC 响应时间的数量级是多少?2、 能保证截止期限吗?3、 必须遵守的设计规则是什么?通过对 Simatic S7 系列不同类型 PLC 作测试,本论文对这些问题发表观点。标准 IEC 1311 对 PLC 功能和程序设计语言定义了参考标准,专业的 PLC 制造商必须遵守。如此普遍的结果也能推广到他们的 PLC 系列产品中。II. SIMATIC S7 设计模型正如在 POSIX 中有详细说明的,传统的实时应用研究是通过实时核心(如OS9 或 Vx Works) ,伴随异步并行的程序设计方法完成的。软件开发者依据要解决问题的逻辑结构来组织它的程序结构。这些任务被操作系统准并行执行,并且,这些执行基本上是事件触发的。程序员对各任务分配优先权的同时,把待执行命令的指针送给操作系统。因此,程序员没必要规划程序执行顺序的细节。另一方面,很难理解执行顺序以及判断一个特定的任务是否能赶上它的截止期限。PLC 系统中的程序机制就完全不同了,他们采用同步的命令方式。在这里,任务的执行完全是时间触发的,当一个任务需要执行时,程序员必须依照时序把它组织到原任务中去。因此,他必须亲自安排执行顺序,这不仅增大了复杂度而且有了更多的限制。如 IEC1131 中定义的 S7 的发展环境,在 Step7 中 ,所有的代码存在块中。由组织块送出各任务。OBs 是预设的操作,在出现特定事件(如定时器溢出或出现错误)时,PLC 操作系统访问这些 OBs。这样,OBs 就成为了操作系统对项目使用者的接口。如图 2 指出,OBs 能调用函数(符合程序语言功能的函数块) 。OBs 可以调用其它函数,或在 POSIX 环境中符合操作系统要求的系统函数。功能块/系统功能块是为静态函数分配了数据块的函数类/系统函数类。如图 3 所示,一个“标准”的 PLC 程序储于 OB1 中,被操作系统循环调用。在调用 OB1 前,操作系统把数据从输入模块调入存储区(过程映象区) 。调用 OB1后,数据从过程映象区复制到输出模块。这种经过程映象区而间接存取的输入/输出模块减少了存取时间,增加了协调性。监控 OBs 的执行时间,一旦超出了提前设定的最大时间,将调用时间错误函数命令 OB80。对于 S7-400 和 WinAC,也可以设定 OB1 的最小周期时间。如果 OB1 的执行时间少于最小时间,将调用优先级最低的后台命令 OB90,其余所有 OBs 的优先级依次加 1。只有对于 S7-400 和 WinAC,可改动这个默认的优先级。每个 OB 都能被优先级更高的 OB 中断。表 I 列出了有可能的 OBs。OBs 的有效性取决于 CPU 类型。如需要较多类型的 OBs,必须买个更好的 CPU。中断命令 OBs 在预定时间启动,例如:一次移动结束,尽管时间延迟,中断命令在点计时器结束时启动。定时中断按周期时间反复执行。 (循环中断命令 OBs以固定的频率启动) 。间隔时间和偏移相位可以设成 1 ms。硬件中断命令由一个输入事件或功能模块引起。例如:探测到一个数字信号的上升沿。这种功能仅对所谓的“高性能”输入模块有效。异步错误由 PLC 的错误引起,反之同步错误由用户程序出错引起, 如电源失效,模块失效,或时基出错。当 OB 无法满足他的计划启动时间,就发生了时间错误,并且是 PLCs 的一个特点。III. 实时性能测定A. 性能评估目的实时性能的关键是它对外部事件的反应时间。PLC 系统基本上遵循同步编程模型,这是由周期时间 Tc 直接决定的,空运行周期和循环中断(如 OB35)必须分析Tc。为确定不同种类 PLC 的应用范围,必须测定不同类型 PLC 的 Tc 最小值。当然,在特定应用场合中 Tc 的实际值取决于循环块中的代码数量。Tc 的波动是循环中断的主要影响因素,它决定了 PLC 的确定表现。虽有高性能的输入模块,也可能发生硬件中断。必须测量最小的响应时间Tr,即激活 OB40 的时间,以及它的波动。为了得到一完整图片,必须对微型、中型、高端 PLC 分别进行测量。表 II 显示的是本论文中为测量选用的 CPU。为了表现出它们的相关性,对变化显著的浮点增量重复测量 106 次。鉴于以 PLC 为核心的系统的分布式特性,PROFIBUS 通讯对响应时间的影响非常重要。因此必须分析由于通信导致的额外延迟及波动。但是,与通信相关的测试内容不在本论文讨论范围内,将在以后文章中予以讨论。在像 POSIX 一样的传统的实时系统中,由硬盘启动、通信及后台运算引起系统运行响应时间,对分析非常关键。由于 PLC 系统是同步循环操作,所以无需对响应时间做特殊分析。甚至,像 PROFIBUS DP V0 or ASinterface 这样场线的循环通信也只是引起恒负载。对于异步通信,如 TCP/IP,使用智能通信控制器,可以不使用 CPU。CPU 集成内置的场线 MPI(多点接口,专有场线)是一个例外。但在 Jlich MPI 仅用于编程。B. 测试方案根据图 4,待测 PLCs 的输入端连接到一个脉冲发生器。一个输入信号的上升沿来到时,OB40 起作用,输出信号被锁住。脉冲发生器和待测 PLCs 的输出端接到NI6062E 的电压输入端。以 100KHz 的频率对这些信号采样。Matlab 代码已发展到能探测到采样信号的上升沿,计算所需的时差,并据测量数据输出柱状图。这样就可以测量 PLC 响应时间 Tr 的分布情况。周期时间 Tc 的分布可通过类似方法测量。可选择的,信号也可以从系统连接到 TDC 模块 SIS3400。这样,测量数据的正确性和精确度可以得到验证。C. 主程序扫描周期块的测量图 57 是对表 I 中前三个 PLC 测量得到的 OB1 的 Tc 分布情况。模块 OB1 包含锁住不使用过程映象区而直接数字输出的代码,并且除了 OB1 没有其它模块起作用。Tc 的最小值和它的波动由操作系统的激活引起并随待测 PLC 运行时间的增加而趋于稳定。尽管 S7-300 的 Tc 值和变化好于 IM151/CPU 的,最坏的情况是可比拟的。CPU412-2 几乎是决定性的(determistic) ,基本上有两个离散值。这不是CPU 行为引起的必要反应,因为在这样的频率,数字输出行为的影响也变得重要。这导致了 CPU414-1 的典型后果。在测量到 0.2ms 的最小周期时,在两种输出状态之间的时间有几毫秒的变化,并且伴随着极高的波动。当我们增加 CPU414-1 中OB1 的最小期间值到 1ms 时,在输出之间变化的时间将大幅降低,并 CPU 的周期与输出速度一致。这个例子表明必须精心选择 I/O 模块。为了保护电路,增加电流以减少电磁噪音,过滤以稳定开关读取等,标准模块有几毫秒的次序的延迟。如预计的,图 8 是对 CPU412-2 测量时得到的 OB1 中 Tc 的波动情况,每毫秒调用一次 OB35 引起后台负荷,Tc 随后台负荷的持续而增加。Tc 的分布几乎是离散的也表示一定存在约 0.2ms 的内循环。由于 PLC 是同步操作的,只要知道了每个模块的持续时间就可估计 Tc 的最大值。结果显示,OB1 需要一固定的扫描速率,不足以满足所有应用,例如在操纵系统中.IIID 检验循环中断块 OB 是否能满足这些需求。D. 循环中断块 OB35 的测量图 9、图 10 表明:和 OB1 相比,循环中断块 OB35 的波动是非常小的。同样,CPU412-2 表现出几乎离散分布的 Tc。任务以 1KHz 的频率被循环激活,它的精度要好于 0.1ms,PLCs 的这个特点甚至是基于 Pentium II 平台的 Lynx 操作系统不可能实现的。IMI151/CPU 的低性能决定它可能的最小的 OB35 周期是 2ms。E. 硬件响应时间测量图 11、12 是分别使用 CPU314C-2DP 和 IMI151/CPU 测量时得到的 Tr,Tr 是输入上升沿引起的 OB40 的激活时间,其中包含所有相关硬件时间部分。因为没有符合 S7-400 的高性能输入,所以无法对 S7-400 系列测量。即使对低档 PLC,在IMI151/CPU 中测得的 Tr 平均值和方差值都不能令人满意。虽然在 CPU314C-2DP 上测得的 Tr 值比基于 Pentium II 的 Lynx 操作系统的差五倍,但对于典型的 PLC应用场合已经足够了。IV. 结论如上所述,在物理实验中,PLCs 的使用提供了众多有利条件。它们以同步循环方式工作并具有高度可预测性。结合它们的实时特性,它们完全能够应用在需要达到毫秒级的确定响应时间的场合。1ms 甚至更短的响应时间要求我们在选择硬件时必须非常认真。PLCs 不适合用在需要 0.5ms 或更短的响应时间时。 由于它们的低波动性,循环中断块 OBs 最适合需要固定扫描速率的场合,然而可以通过硬件中断块来减少响应时间。主循环块 OB1 不适用于 RT 操作。以后的工作将关注 SoftPLC WinAC ,它不仅可应用在基于 PC 平台的WindowsNT 系统,Venturecom RTX 实时扩展,同样也可用在 MIPS 平台的WindowsCE 系统。另外一个焦点是全新的 S7-400 基于循环同步的等时机制。这一特性将允许在分散外围系统中,与 CPU 周期同步的对 I/O 端口进行读写操作。附件 2:外文原文(复印件)IEEE TRANSACTIONS ON NUCLEAR SCIENCE, VOL. 51, NO. 3, JUNE 2004 489Measurement of Real-Time Aspects of SimaticPLCOperation in the Context of Physics ExperimentsHarald Kleines, Janos Sarkadi, Frank Suxdorf, and Klaus ZwollAbstractToday, most slow control systems for physics ex-periments at Forschungszentrum Jlich are implemented withProgrammable Logic Controller (PLC) technology and fieldbussystems. In many cases, even deterministic response is requiredfrom the PLCs. This raises the question about the real-timeperformance that can be expected from a PLC. Response-timemeasurements of SimaticPLCsmanufactured by the worldmarket leader Siemensare presented. Influence of programstructure and hardware configuration on performance anddeterministic behavior of a PLC is discussed.I. PROGRAMMABLE LOGIC CONTROLLERS (PLCS) INEXPERIMENT CONTROL SYSTEMSTODAY, industrial automation technology is well estab-lished in infrastructure systems for physics experiments,e.g., in water or gas supply systems. This leads to the heavy useof Programmable Logic Controllers (PLCs), which typicallyare the intelligent automation stations forming the core ofindustrial systems 1. Main reasons includelow prices induced by mass market;robustness;long term availability and support from manufacturer;professionality (connectors, conformance to standards,)Beyond the scope of pure infrastructure systems, PLCs are in-creasingly becoming central components of experiment controlsystems, replacing VME- or PC-based real-time systems 2,3. This is caused by the following features of modern PLCfamilies.High degree of scalability: Modern PLC families have awide spectrum of CPU types, that is scalable not only withregard to performance, but also with regard to function-ality and form factor. For outdoor or fault tolerant appli-cations special versions are available.Extensibility: The modular design of PLCs enablesthe extension with a wide range of digital and analogI/O modules. Additionally, integrated technology mod-ules are available for different application areas, e.g.,stepper motor controllers, servo motor controllers, or PIDcontrollers.Extensive communication capabilities: Modern PLCshave at least one integrated communication port and canbe extended by a variety of communication controllersManuscript received May 16, 2003; revised October 1, 2003.The authors are with Zentrallabor fr Elektronik, Forschungszentrum Jlich,D-52425 Jlich, Germany (e-mail: h.kleinesfz-juelich.de).Digital Object Identifier 10.1109/TNS.2004.828504for different field and process bus systems, thus enablingconnection of other industrial devices. A key issue isthe extension of a central PLC system with decentralperiphery via special fieldbusses (e.g., PROFIBUS DP),that allows the transparent connection of “unintelligent”I/O-modules. Thus a PLC program can access this decen-tral periphery in the same way as central PLC periphery.Powerful development environment: Modern PLC fami-lies come with a homogeneous cross development envi-ronment, that supports all the major IEC 1131 program-ming languages 4. Typically, representations in instruc-tion list (IL), function block diagram (FBD) or ladderdiagram (LD) can be switched dynamically. The develop-ment tools allow semigraphical hardware configuration,offer strong debugging mechanisms and allow incrementaldevelopment by the exchange of blocks during runtime.Today, in FZ Juelich, all new and advanced experiment con-trol systems are heavily PLC-based 3, as illustrated by the ar-chitecture of a neutron spectrometer control system shown inFig. 1.Because the world market leader Siemens dominates theEuropean market, SimaticS7 PLCs are used in FZ Juelich,almost exclusively. The midrange series S7-300is mostpopular. The high-end series S7-400is targeted at applicationswith extreme performance requirements and supports alsomultiprocessor configurations. The mini PLC series S7-200is rarely used, because it got the name S7 by pure marketingreasons and its programming environment is incompatible tothe other S7 devices. Instead of the S7-200, the IM151/CPUserves as a mini PLC. The IM151/CPU is an intelligentcontroller for the decentral periphery family ET200S. Alsothe decentral periphery systems ET200Land ET200Mareused commonly in Jlich. The SoftPLC WinAChas only beentested in the Lab, so far.The responsible planning of PLC-based control systems re-quires knowledge on their real-time features.What is the magnitude of PLC response time, dependingon PLC type?Can deadlines be guaranteed?What programming rules have to be followed?The paper addresses these issues by measurements at dif-ferent PLC types of the SimaticS7 family. The standard IEC1131 defines a common framework for PLC functionality andprogramming languages 4, which all the major PLC manufac-turers conform to. Thus general results can be generalized alsoto their PLC families.0018-9499/04$20.00 2004 IEEE490 IEEE TRANSACTIONS ON NUCLEAR SCIENCE, VOL. 51, NO. 3, JUNE 2004Fig. 1. Control system architecture of the neutron spectrometer KWS3.Fig. 2. Block calling hierarchy.II. SIMATICS7 PROGRAMMING MODELClassical real-time applications in research are implementedwith real-time kernels like OS-9 or VxWorks, that follow anasynchronous parallel programming approach, as defined inPOSIX 5, for example. The software developer structureshis program in tasks according to the logical structure of theproblem to solve. These tasks are executed quasiparallel by theoperating system, and the execution is basically event-triggered.By assigning priorities to the tasks the programmer gives hintsto the operating system about the desired execution order. Thusthe programmer does not have to plan the scheduling details.On the other hand it is difficult to understand the executionorder and to decide, if a specific task can meet its deadlines.The programming mechanisms in PLC systems are totallydifferent, because they follow the older approach of syn-chronous programming 6. Here, the execution of tasks iscompletely time-triggered, and the programmer has to organizehis program into tasks according to the time, when a task hasto run. So he must plan the execution order himself, which ismore complicated but also gives more control.In Step7, the development environment of the S7, all codeexists in blocks, as defined in IEC1131. Tasks are representedby Organization Blocks (OBs). OBs are the schedulable items,that are called by the operating system of the PLC at certainevents, e.g., when a timer expires or an error occurs. Thus, theOBs are the interface of the operating system to the user pro-gram. As indicated in Fig. 2, OBs can call Functions (FCs),which are blocks that correspond to functions in a procedurallanguage. FCs can call other FCs or system functions (SFCs),which correspond to operating system calls in a POSIX environ-ment. Function Blocks (FBs)/System Function Blocks (SFCs)are FCs/SFCs with an assigned data block for static functiondata.A “normal” PLC program is contained in OB1, which iscalled cyclically by the operating system, as indicated in Fig. 3.Before OB1 is called the operating system transfers data fromthe input modules to a memory area called process imagetable. After OB1 has been called, data from the process imagetable is copied to the output modules. The indirect access toI/O-modules via the process image table reduces access timeand increases consistency.KLEINES et al.: SIMATICPLC OPERATION 491Fig. 3. Execution of main program scan cycle OB1.The execution time of OB1 is monitored, and if a preconfig-ured maximum is exceeded, the time error OB80 is called.On S7-400and WinACalso a minimum for the cycletime of OB1 can be configured. If the execution time forOB1 is less then , the background OB90 is called, whichhas the lowest priority. The priority of all other OBs increaseswith its number. Only on S7-400and WinACthis default pri-ority can be changed. Each OB can be interrupted by OBs witha higher priority. Table I lists the possible OBs. Availability ofOBs depends on the CPU type. If more OBs of a certain typeare required, a more expensive CPU has to be bought.Time-of-day interrupt OBs are started at a preconfiguredtime, e.g., end of a shift, whereas time delays interrupt OBs arestarted at the expiration of a one-shot-timer. Cyclic interruptOBs are started with a fixed frequency. The time interval andthe phase offset can be configured with a granularity of 1 ms.Hardware interrupts OBs are started by a an event at an input orfunction module, e.g., detection of the rising edge of a digitalsignal. This functionality is only available with so-called “HighFeature” input modules. Synchronous error OBs are startedby errors in the user program, whereas asynchronous errorinterrupt OBs are started by PLC faults, like power failure,module failure or time errors. A time error occurs, when an OBcannot meet its scheduled start time, and is an unique featureof PLCs.III. REAL-TIME PERFORMANCE MEASUREMENTSA. Performance Evaluation GoalsA key issue of real-time performance is the reaction time toexternal events. Because PLC systems basically conform to asynchronous programming model, this is directly determined bythe cycle time , which has to be analyzed for the free runningcycle OB1 and cyclic interrupts; e.g., OB35. To determine theapplication area of PLC classes, the minimum of has to bemeasured for different PLC types. The actual value of in aspecific application depends on the amount of code in the cyclicOB, of course.TABLE IOB TYPES OF A SIMATICS7TABLE IIPLCS UNDER TESTDeterministic behavior of a PLC is determined by the jitter of, which is of primary interest for cyclic interrupts.With “High Feature” input modules, also hardware interruptsare possible. Here the minimum response time , which isdefined as the time to activate OB 40, and its jitter has to bemeasured.In order to get a complete picture, the measurements have tobe conducted for a mini PLC, a midrange PLC and a high-endPLC. Table II shows the CPUs, that have been selected for themeasurements in this paper. The time for a floating point addi-tion has been measured by repeating it times, in order toconvey an impression of their relative performance, which dif-fers considerably.Because of the distributed nature of PLC-based systems, theimpact of PROFIBUS communication to response time is an im-492 IEEE TRANSACTIONS ON NUCLEAR SCIENCE, VOL. 51, NO. 3, JUNE 2004Fig. 4. Experiment setup.Fig. 5. Histogram of OB1 cycle time at IM151/CPU.portant issue. Thus the additional delays introduced by commu-nication as well as the additional jitter have to be analyzed. Butpresentation of communication-related measurements would gobeyond the scope of this paper and will be covered by a futurepublication.The analysis of the response time as a function of the systemload, e.g., induced by harddisk activity, communication or back-ground computing, is a key issue on conventional POSIX-likereal-time systems. This is not an issue on PLC systems be-cause of their synchronous cyclic operation. Even the commu-nication on fieldbusses like PROFIBUS DP V0 or AS-Interfaceis cyclically, thus inducing a constant load. For asynchronoustype of communication, e.g., TCP/IP, intelligent communica-tion controllers are used, thus offloading the CPU. An exceptionfrom this rule is the MPI (Multipoint Interface, a proprietaryfieldbus), that is integrated in each CPU. But in Jlich MPI isonly used for programming.B. Measurement ScenarioAccording to Fig. 4 the inputs of the PLCs under test (listedin Table II) are connected to a pulse generator. OB40 is acti-vated by a rising edge of the input signal and toggles a outputsignal. The output of the pulse generator and outputs of thePLC under test are connected to the National Instruments analoginput module NI6062 E. The signals are sampled with a fre-Fig. 6. Histogram of OB1 cycle time at CPU314C-2DP.quency of 100 kHz. Matlab code has been developed that de-tects rising edges in the sampled signals, computes the requiredtime differences and forms an histogram of the measured data.Thus the distribution of the response time of the PLC can bemeasured. The distribution of the cycle time is measured inan analogous way. Alternatively, the signals are connected to theTDC module SIS 3400 from Struck Innovative Systems. Thusthe correctness and the sufficient precision of the measured datacould be verified.C. Measurements of the Main Program Scan Cycle OB1Figs. 57 show the distribution of for OB1 measured onthe first three PLC in Table I. There was no other activity onthe system than OB1, which only contained code for toggling adigital output directly without using the process image table.The minimum for and its jitter are caused by operatingsystem activities and get better with increasing performance ofthe PLC under test. Although me value and variance of forthe S7-300are much better than for IM151/CPU the worstcase is comparable. CPU412-2 is almost determistic, basicallytaking two discrete values. This is not necessarily caused byCPU behavior, because at these frequencies the behavior of thedigital outputs gets significant, too. This caused artifacts onthe CPU414-1 where we measured a minimum cycle time of0.2 ms. But in this situation the time between two state changesKLEINES et al.: SIMATICPLC OPERATION 493Fig. 7. Histogram of OB1 cycle time at CPU412-2.Fig. 8. Histogram of OB1 cycle time at CPU412-2 with background load.of the output was several milliseconds with a extremely highjitter. When we increased the minimum duration of OB1 at theCPU414-1 to 1 ms, the time between output changes becamemuch lower, and cycle time on the CPU was consistent with thespeed of the outputs. This illustrates, that I/O modules have tobe selected carefully. Standard modules have delays in the orderof milliseconds, because of protection circuits, additional elec-tronics to reduce electromagnetic noise, filters for stable read ofswitches, etc.As expected, Fig. 8 shows that the jitter of for OB1 mea-sured at CPU412-2 increases with constant background load in-duced by OB35 (called every ms). Again the distribution ofis almost discrete, which indicates that there must be some in-ternal cycle of about 0.2 ms. Because of the synchronous oper-ation of a PLC, the maximum of can be estimated when theduration of each OB is known. The results show that OB1 is notadequate for applications, which require a fixed scan rate, e.g.,in a control loop. Section III-D examines if a cyclic interruptOB can meet these requirements.Fig. 9. Histogram of OB35 cycle time at CPU314C-2DP.Fig. 10. Histogram of OB35 cycle time at CPU412-2.D. Measurements of the Cyclic Interrupt OB35Figs. 9 and 10 illustrate that the cyclic interrupt OB35 hasan extremely low jitter, compared to OB1. Again CPU412-2exhibits an almost discrete distribution of . Cyclic activationof tasks with a frequency of 1 kHz at a precision better than0.1 ms is a unique feature of PLCs, that is even not possiblewith LynxOS on a Pentium II platform 7. The smallest possibleOB35 cycle time of IM151/CPU is 2 ms, because of the lowperformance of this CPU.E. Hardware Response-Time MeasurementsFigs. 11 and 12 show , the activation time of OB40with a rising edge of the input, including all hardware-relatedtime fractions, measured at CPU314C-2DP and IM151/CPU.Because we had no “High feature” input for the S7-400,we could not measure this metric for the S7-400series. Themean value of and its variance measured at IM151/CPUare unsatisfactory, even for a low-end PLC. The values of494 IEEE TRANSACTIONS ON NUCLEAR SCIENCE, VOL. 51, NO. 3, JUNE 2004Fig. 11. Histogram of OB40 response time at IM151/CPU.Fig. 12. Histog
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