PTPX学习笔记1.docx

PrimeTime PX学习笔记1PTPX is used to accurately analyze power dissipation with PT. PrimeTime PX supports a gate-levelnetlist only.Power = Leakage Power + Dynamic Power(internal power and switching power).You can use the following power analysis techniques with PrimeTime PX:* Averaged power analysisFor purely averaged power analysis, PrimeTime PX supports propagation of switchingactivity based on defaults, user-defined switching, or switching derived from an HDLsimulation (either RTL or gate level).* Time-based power analysisFor extremely accurate analysis of power with respect to time, PrimeTime PX supportsanalysis based on the RTL or gate-level simulation activity over time.PrimeTime PX uses an event-driven algorithm to calculate the power consumption foreach event. Detailed time-based power waveforms are generated to provide bothaverage and peak power results. The tool can produce an average and peak power report.Required Files descriptions:Gate-Level NetlistTechnology LibraryPTPX supports either CCS(composite current source) or NLPM(nonlinear power model).You use the power_model_preference nlpm | ccs variable to specify your power modelpreference when the library contains both NLPM and CCS data. The default is ccs.SDC FileThe SDC file contains the design constraints. The driver cell information is used to calculatethe transition time on the primary inputs.Parasitic FileSwitching ActivityIn the averaged power analysis, you use either SAIF or VCD file formats to read the switchingactivity.If you do not specify switching activity information, the tool assumes certain defaultvalues for the switching activity.In time-based power analysis, you use VCD file formats to read the switching activity.When you read a SAIF file or an RTL VCD file for power estimation, use the set_rtl_to_gate_namecommand to map the RTL and gate-level object names. This command is especially necessary if youhave performed only the RTL simulation for generating the backward SAIF file. Because the RTLobject names can change after synthesis, the read_saif or read_vcd command is not able to map thenames present in the RTL SAIF or VCD file to the gate-level objects, which can result ininaccurate results. You can avoid this by using the set_rtl_to_gate_name command.Averaged Power Analysis ModeScript:# Set the Power Analysis Mode#set power_enable_analysis TRUEset power_analysis_mode averaged# Read and link the Gate Level Netlist#set search_path ./src/hdl/gate ./src/lib/snps . set link_library * core_typ.dbread_verilog mac.vgcurrent_design maclink# Read SDC and set transition time or annotate parasitics#read_sdc ./src/hdl/gate/mac.sdcset_disable_timing get_lib_pins ssc_core_typ/*/Gread_parasitics ./src/annotate/mac.spef.gz# check, update, or report the timing#check_timingupdate_timingreport_timing# read switching activity file#read_vcd -strip_path tb/macinst ./sim/vcd.dump.gzreport_switching_activity -list_not_annotated# check or update or report power#check_powerupdate_powerreport_power -hierarchyquitVector-Free Power AnalysisWhen you select the averaged power analysis mode and do not specify any activityinformation, the tool performs vector-free power analysis. In this mode, PrimeTime PXapplies the default toggle rate on the primary inputs and black box outputs and thenpropagates them. If required, you can change the default toggle rate. This usage model isuseful for quick power estimation.The following commands and variables affect the default toggle rates used by the tool:create_clockset power_default_toggle_rateset power_default_static_probabi